INTEGRATED CIRCUITS 74F597 8-bit shift register with input storage registers Product specification IC15 Data Handbook 1991 Sep 13 Philips Semiconductors Product specification 8-bit shift register with input storage registers FEATURES 74F597 PIN CONFIGURATION • High impedance PNP base inputs for reduced loading (20µA in High and Low states) D1 1 16 VCC D2 2 15 D0 D3 3 14 DS D4 4 13 SHLD D5 5 12 STCP D6 6 11 SHCP D7 7 10 SHRST GND 8 9 • 8-bit parallel storage register • 3-State output buffers • Shift register has asynchronous direct overriding reset • Shift load SHLD is functional when SHCP is Low and locked out when SHCP is High • Guaranteed shift frequency DC to 105MHz QS SF00366 DESCRIPTION The 74F597 consists of an 8-bit storage register feeding a parallel-in/serial-in, serial-out 8-bit shift register. The storage register and shift register have separate positive edge triggered clocks. The shift register has asynchronous reset and when SHCP is Low, it has asynchronous load. The shift register load function has been modified to load when both SHLD and SHCP are Low. When SHCP is High the shift register load operation is not performed. Data will be properly shifted on the rising edge of SHCP when SHLD is High. TYPE TYPICAL fMAX TYPICAL SUPPLY CURRENT (TOTAL) 74F597 135MHz 42mA ORDERING INFORMATION DESCRIPTION COMMERCIAL RANGE VCC = 5V ±10%, Tamb = 0°C to +70°C PKG DWG # 16-pin plastic DIP N74F597N SOT38-4 16-pin plastic SO N74F597D SOT109-1 INPUT AND OUTPUT LOADING AND FAN-OUT TABLE 74F (U.L.) HIGH/LOW LOAD VALUE HIGH/LOW Serial data input 1.0/0.033 20µA/20µA D0–D7 Parallel data inputs 1.0/0.033 20µA/20µA SHCP Shift register clock pulse input 1.0/0.033 20µA/20µA STCP Storage register clock pulse input 1.0/0.033 20µA/20µA SHLD Shift register load input (active Low) 1.0/0.033 20µA/20µA SHRST Shift register reset input (active Low) 1.0/0.033 20µA/20µA 50/33 1.0mA/20mA PINS Ds Qs DESCRIPTION Serial data output NOTE: One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state. 1991 Sep 13 2 853–1556 03964 Philips Semiconductors Product specification 8-bit shift register with input storage registers LOGIC SYMBOL 14 74F597 IEC/IEEE SYMBOL (IEEE/IEC) 15 1 2 3 4 5 6 SRG8 7 10 11 Ds 10 SHRST 11 SHCP 12 STCP D0 D1 D2 D3 D4 D5 D6 D7 13 12 SHLD 13 R C3/ C2 C1 14 3D 15 1D 2D 1 Qs 2 3 14 4 VCC = Pin 16 GND = Pin 8 5 SF01107 6 7 9 SF01108 FUNCTION TABLE INPUTS OPERATING MODES H L X ↑ ↑ STCP SHCP SHLD SHRST ↑ X X X Data loaded to storage registers ↑ L L H Data loaded from inputs to shift register ↑ L L H Data transferred from storage registers to shift registers X L L L Invalid logic, state of shift register indeterminate when signals removed X X H L Shift register cleared X ↑ H H Shift register clocked, Qn=Qn–1, Q0=Ds ↑ H X H Hold = = = = = High voltage level Low voltage level Don’t care Low-to-High clock transition Not a Low-to-High clock transition 1991 Sep 13 3 Philips Semiconductors Product specification 8-bit shift register with input storage registers 74F597 LOGIC DIAGRAM 10 SHRST SHCP SHLD STCP Ds D0 11 13 12 14 15 C2 2D 1D S C1 D1 1 R C2 2D 1D S C1 D2 2 R C2 2D 1D S C1 D3 3 R C2 2D 1D S C1 D4 4 R C2 2D 1D S C1 D5 5 R C2 2D 1D S C1 D6 R 6 C2 2D 1D S C1 D7 R 7 C2 2D 1D S C1 R VCC = Pin 16 GND = Pin 8 1991 Sep 13 9 Qs SF01109 4 Philips Semiconductors Product specification 8-bit shift register with input storage registers 74F597 ABSOLUTE MAXIMUM RATINGS (Operation beyond the limits set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free-air temperature range.) SYMBOL PARAMETER RATING UNIT VCC Supply voltage –0.5 to +7.0 V VIN Input voltage –0.5 to +7.0 V IIN Input current –30 to +5 mA VOUT Voltage applied to output in High output state –0.5 to +VCC V IOUT Current applied to output in Low output state Tamb Operating free-air temperature range Tstg Storage temperature range 40 mA 0 to +70 °C –65 to +150 °C RECOMMENDED OPERATING CONDITIONS LIMITS SYMBOL PARAMETER UNIT MIN NOM MAX 5.0 5.5 VCC Supply voltage 4.5 V VIH High-level input voltage 2.0 VIL Low-level input voltage 0.8 V IIK Input clamp current –18 mA IOH High-level output current –1 mA IOL Low-level output current 20 mA Tamb Operating free-air temperature range +70 °C V 0 DC ELECTRICAL CHARACTERISTICS (Over recommended operating free-air temperature range unless otherwise noted.) LIMITS SYMBOL TEST CONDITIONSNO TAG PARAMETER VCC = MIN, VIL = MAX MAX, VIH = MIN VOH O High level output voltage High-level IOH 1mA O = –1mA VOL O Low level output voltage Low-level VIK Input clamp voltage VCC = MIN, II = IIK II Input current at maximum input voltage IIH MIN ±10%VCC 2.5 ±5%VCC 2.7 TYP NO TAG MAX UNIT V 3.4 V ±10%VCC 0.30 0.50 V ±5%VCC 0.30 0.50 V –0.73 –1.2 V VCC = MAX, VI = 7.0V 100 µA High-level input current VCC = MAX, VI = 2.7V 20 µA IIL Low-level input current VCC = MAX, VI = 0.5V IOS Short-circuit output currentNO TAG VCC = MAX ICC Supply current (total) VCC = MIN,, VIL = MAX,, VIH = MIN, IOL = MAX ICCH ICCL –20 µA –150 mA 43 65 mA 41 60 mA –60 VCC = MAX NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25°C. 3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, IOS tests should be performed last. 1991 Sep 13 5 Philips Semiconductors Product specification 8-bit shift register with input storage registers 74F597 AC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER TEST CONDITION VCC = +5V Tamb = +25°C CL = 50pF, RL = 500Ω MIN TYP VCC = +5V ± 10% Tamb = 0°C to +70°C CL = 50pF, RL = 500Ω MAX MIN UNIT MAX fMAX Maximum clock frequency Waveform NO TAG 120 135 tPLH tPHL Propagation delay SHCP to Qs Waveform NO TAG 7.0 6.0 8.5 7.5 11.0 10.0 6.0 5.5 12.5 10.5 ns tPLH tPHL Propagation delay SHLD to Qs Waveform NO TAG 8.0 6.0 9.5 7.5 12.0 10.0 7.0 5.5 13.5 11.0 ns tPLH tPHL Propagation delay STCP to Qs Waveform NO TAG 7.5 8.0 9.5 9.5 11.5 12.0 6.5 7.5 13.0 13.0 ns tPHL Propagation delay SHRST to Qs Waveform NO TAG 2.5 5.5 9.0 2.5 9.5 ns 105 MHz AC SETUP REQUIREMENTS LIMITS SYMBOL PARAMETER VCC = +5V Tamb = +25°C CL = 50pF, RL = 500Ω TEST CONDITION MIN TYP MAX VCC = +5V ± 10% Tamb = 0°C to +70°C CL = 50pF, RL = 500Ω MIN UNIT MAX ts(H) ts(L) Setup time, High or Low Dn to STCP Waveform NO TAG 1.0 1.5 1.5 2.0 ns th(H) th(L) Hold time, High or Low Dn to STCP Waveform NO TAG 2.0 2.0 2.0 3.0 ns ts(H) ts(L) Setup time, High or Low Ds to SHCP Waveform NO TAG 1.0 1.5 1.0 2.0 ns th(H) th(L) Hold time, High or Low Ds to SHCP Waveform NO TAG 1.5 2.0 2.0 2.5 ns ts(H) Setup time, High STCP to SHLD↑ Waveform 4 8.5 9.0 ns th(L) Hold time, Low STCP to SHLD↑ (hold mode) Waveform NO TAG 0.0 0.0 ns ts(H) Setup time, High SHLD to SHCP↑ Waveform NO TAG 6.0 6.5 ns tW(H) tW(L) SHCP Pulse width High or Low Waveform NO TAG 4.5 4.5 5.5 4.5 ns tW(H) tW(L) STCP Pulse width High or Low Waveform NO TAG 4.5 4.5 5.0 4.5 ns tW(L) SHRST Pulse width, Low Waveform NO TAG 4.5 4.5 ns tW(L) SHLD Pulse width, Low Waveform NO TAG 4.5 4.5 ns tREC Recovery time, SHRST to SHCP Waveform NO TAG 2.0 2.5 ns 1991 Sep 13 6 Philips Semiconductors Product specification 8-bit shift register with input storage registers 74F597 TYPICAL TIMING DIAGRAM SHRST SHLD SHCP STCP Ds D0 Don’t care D1 Don’t care D2 Don’t care D3 Don’t care D4 Don’t care D5 Don’t care D6 Don’t care D7 Don’t care Qs SF01110 1991 Sep 13 7 Philips Semiconductors Product specification 8-bit shift register with input storage registers 74F597 AC WAVEFORMS For all waveforms, VM = 1.5V. The shaded areas indicate when the input is permitted to change for predictable output performance. 1/fMAX STCP, SHCP, SHLD SHRST SHRST VM VM VM VM tw(H) trec tw(L) VM SHCP tPHL tPLH tPHL VM Qs VM VM QS SF01112 SF00371 Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Widths, and Maximum Clock Frequency, Shift Register Reset and Load Inputs to Serial Data Output Dn, Ds SHCP, SHLD SHCP, STCP, SHLD VM VM VM ts(H) th(H) VM ts(L) VM Waveform 2. Propagation Delay, Shift Register Reset and Load Inputs to Serial Data Output, Shift Register Reset and Load Inputs to Shift Register Clock Pulse Input Recovery Time STCP VM VM th(L) ts(H) VM th(L) SHLD, SHCP VM VM SF01113 SF01114 Waveform 3. Setup and Hold Times Waveform 4. Setup and Hold Time TEST CIRCUIT AND WAVEFORMS VCC VIN tw 90% NEGATIVE PULSE 10% D.U.T. RT CL RL AMP (V) VM VM VOUT PULSE GENERATOR 90% 10% tTHL (tf ) tTLH (tr ) tTLH (tr ) tTHL (tf ) 0V AMP (V) 90% POSITIVE PULSE VM VM 10% Test Circuit for Totem-Pole Outputs DEFINITIONS: RL = Load resistor; see AC ELECTRICAL CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC ELECTRICAL CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators. 90% 10% tw 0V Input Pulse Definition INPUT PULSE REQUIREMENTS family amplitude VM 74F 3.0V 1.5V rep. rate tw tTLH tTHL 1MHz 500ns 2.5ns 2.5ns SF00006 1991 Sep 13 8 Philips Semiconductors Product specification 8-bit shift register with input storage registers DIP16: plastic dual in-line package; 16 leads (300 mil) 1991 Sep 13 9 74F597 SOT38-4 Philips Semiconductors Product specification 8-bit shift register with input storage registers SO16: plastic small outline package; 16 leads; body width 3.9 mm 1991 Sep 13 10 74F597 SOT109-1 Philips Semiconductors Product specification 8-bit shift register with input storage registers NOTES 1991 Sep 13 11 74F597 Philips Semiconductors Product specification 8-bit shift register with input storage registers 74F597 Data sheet status Data sheet status Product status Definition [1] Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [1] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 print code Document order number: yyyy mmm dd 12 Date of release: 10-98 9397-750-05144