SA58672 3.0 W mono class-D audio amplifier Rev. 04 — 8 June 2009 Product data sheet 1. General description The SA58672 is a mono, filter-free class-D audio amplifier which is available in a 9 bump WLCSP (Wafer Level Chip-Size Package) and 10-terminal HVSON packages. The SA58672 features shutdown control. Improved immunity to noise and RF rectification is increased by high PSRR and differential circuit topology. Fast start-up time and very small WLCSP package makes it an ideal choice for both cellular handsets and PDAs. The SA58672 delivers 1.7 W at 5 V and 800 mW at 3.6 V into 8 Ω. It delivers 3.0 W at 5 V and 1.6 W at 3.6 V into 4 Ω. The maximum power efficiency is excellent at 90 % into 8 Ω and 84 % to 88 % into 4 Ω. The SA58672 provides thermal and short-circuit shutdown protection. 2. Features n Output power u 3.0 W into 4 Ω at 5 V u 1.6 W into 4 Ω at 3.6 V u 1.7 W into 8 Ω at 5 V u 800 mW into 8 Ω at 3.6 V n Power supply range: 2.0 V to 5.5 V n Shutdown control n High SVRR: −77 dB at 217 Hz n Fast start-up time: 7.0 ms n Low supply current n Low shutdown current n Short-circuit and thermal protection n Space savings with 1.66 mm × 1.71 mm × 0.6 mm 9 bump WLCSP package n Low junction to ambient thermal resistance of 100 K/W with adequate heat sinking of WLCSP n Enhanced power dissipation with 3.0 mm × 3.0 mm × 0.85 mm HVSON10 package SA58672 NXP Semiconductors 3.0 W mono class-D audio amplifier 3. Applications n n n n n n Wireless and cellular handsets and PDAs Portable DVD player USB speakers Notebook PC Portable radio and gaming Educational toys 4. Ordering information Table 1. Ordering information Type number Package Name Description Version SA58672TK HVSON10 plastic thermal enhanced very thin small outline package; no leads; 10 terminals; body 3 × 3 × 0.85 mm SOT650-1 SA58672UK WLCSP9 wafer level chip-size package; 9 bumps; 1.66 × 1.71 × 0.6 mm SA58672UK 5. Block diagram battery CS PVDD, AVDD Rf Ri positive differential input INP OUTP bypass VP bypass internal biasing negative differential input Ri INM PWM OUTM bypass Rf 300 kΩ VIH RL = 8 Ω H-BRIDGE SHUTDOWN CONTROL INTERNAL OSCILLATOR AGND, PGND 002aad820 VIL SD Fig 1. Block diagram SA58672_4 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 04 — 8 June 2009 2 of 27 SA58672 NXP Semiconductors 3.0 W mono class-D audio amplifier 6. Pinning information 6.1 Pinning SA58672UK bump A1 index area 1 2 3 A B C 1 2 3 A INP AGND OUTM B AVDD PVDD PGND C INM SD OUTP 001aai332 002aad854 Transparent top view Transparent top view Fig 2. Pin configuration for WLCSP9 Fig 3. Ball mapping for WLCSP9 terminal 1 index area SD 1 10 OUTP AVDD 2 9 PVDD INM 3 8 PGND INP 4 7 OUTM AGND 5 6 n.c. SA58672TK DAP(1) 002aad822 Transparent top view (1) Exposed Die Attach Paddle (DAP). Fig 4. Pin configuration for HVSON10 SA58672_4 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 04 — 8 June 2009 3 of 27 SA58672 NXP Semiconductors 3.0 W mono class-D audio amplifier 6.2 Pin description Table 2. Symbol Pin description Pin Description WLCSP9 HVSON10 INP A1 4 channel positive input AVDD B1 2 analog supply voltage (level same as PVDD) INM C1 3 channel negative input AGND A2 5 analog ground PVDD B2 9 power supply voltage (level same as AVDD) SD C2 1 channel shutdown input (active LOW) OUTM A3 7 channel negative output PGND B3 8 power ground OUTP C3 10 channel positive output n.c. - 6 not connected DAP - (DAP) exposed die attach paddle; connect to ground plane heat spreader 7. Limiting values Table 3. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDD supply voltage Active mode −0.3 +6.0 V Shutdown mode −0.3 +7.0 V pin SD GND VDD V other pins −0.3 VDD + 0.3 V Tamb = 25 °C - 1250 mW Tamb = 75 °C - 750 mW Tamb = 85 °C - 650 mW Tamb = 25 °C - 3.12 W Tamb = 75 °C - 1.87 W Tamb = 85 °C - 1.62 W VI input voltage P power dissipation WLCSP9; derating factor 10 mW/K HVSON10; derating factor 25 mW/K Tamb ambient temperature operating in free air −40 +85 °C Tj junction temperature operating −40 +150 °C Tstg storage temperature −65 +150 °C VESD electrostatic discharge voltage human body model ±2500 - V machine model ±100 - V charged-device model ±750 - V SA58672_4 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 04 — 8 June 2009 4 of 27 SA58672 NXP Semiconductors 3.0 W mono class-D audio amplifier 8. Static characteristics Table 4. Static characteristics Tamb = 25 °C, unless otherwise specified[1]. Symbol Parameter VDD supply voltage |VO(offset)| output offset voltage Conditions Min Typ Max Unit 2.0 - 5.5 V measured differentially; inputs AC grounded; Gv = 6 dB; VDD = 2.0 V to 5.5 V - 5 25 mV PSRR power supply rejection ratio VDD = 2.0 V to 5.5 V - −93 −70 dB Vi(cm) common-mode input voltage VDD = 2.0 V to 5.5 V 0.5 - VDD − 0.8 V CMRR common mode rejection ratio inputs are shorted together; VDD = 2.0 V to 5.5 V - −69 −50 dB IIH HIGH-level input current VDD = 5.5 V; VI = VDD - - 50 µA IIL LOW-level input current VDD = 5.5 V; VI = 0 V - - 5 µA IDD supply current VDD = 5.5 V; no load - 3.4 4.2 mA 3.2 4.0 mA VDD = 5.0 V; no load VDD = 3.6 V; no load - 2.6 3.4 mA VDD = 2.5 V; no load - 2.2 3.0 mA IDD(sd) shutdown mode supply current no input signal; VSD = GND - 10 1000 nA VSD voltage on pin SD device ON 1.3 - VDD V device OFF GND - 0.35 V Zi input impedance VDD = 2.0 V to 5.5 V 260 300 340 kΩ RDSon drain-source on-state resistance static; VDD = 5.5 V - 430 - mΩ static; VDD = 3.6 V - 475 - mΩ static; VDD = 2.5 V - 550 - mΩ Zo(sd) shutdown mode output impedance VSD = 0.35 V - 2 - kΩ fsw switching frequency VDD = 2.5 V to 5.5 V 250 300 350 kHz Gv(cl) closed-loop voltage gain VDD = 2.0 V to 5.5 V; Ri in kΩ 260 kΩ / Ri 300 kΩ / Ri 340 kΩ / Ri V/V [1] VDD is the supply voltage on pin PVDD and pin AVDD. GND is the ground supply voltage on pin PGND and pin AGND. SA58672_4 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 04 — 8 June 2009 5 of 27 SA58672 NXP Semiconductors 3.0 W mono class-D audio amplifier 9. Dynamic characteristics Table 5. Dynamic characteristics Tamb = 25 °C; RL = 8 Ω; unless otherwise specified[1]. Symbol Parameter Conditions Min Typ Max Unit Po output power f = 1 kHz; THD+N = 10 % RL = 8 Ω; VDD = 5.0 V - 1.7 - W RL = 8 Ω; VDD = 3.6 V - 800 - mW RL = 4 Ω; VDD = 5.0 V - 3.0 - W RL = 4 Ω; VDD = 3.6 V - 1.6 - W RL = 8 Ω; VDD = 5.0 V - 1.6 - W RL = 8 Ω; VDD = 3.6 V - 0.75 - W RL = 4 Ω; VDD = 5.0 V - 2.4 - W f = 1 kHz; THD+N = 1 % RL = 4 Ω; VDD = 3.6 V THD+N ηpo total harmonic distortion-plus-noise output power efficiency SVRR supply voltage ripple rejection - 1.2 - W VDD = 5 V; Gv = 6 dB; RL = 8 Ω; f = 1 kHz; Po = 1 W - 0.08 - % VDD = 3 V; RL = 3 Ω; Po = 1 W - 3 - % Po(RMS) = 2.0 W; RL = 4 Ω - 85 - % Po(RMS) = 1.3 W; RL = 8 Ω - 90 - % VDD = 5.0 V - −77 - dB VDD = 3.6 V Gv = 6 dB; f = 217 Hz - −73 - dB CMRR common mode rejection ratio VDD = 5 V; Gv = 6 dB; f = 217 Hz - −69 - dB td(sd-startup) delay time from shutdown to start-up VDD = 3.6 V - 7.0 - ms Vn(o) output noise voltage VDD = 3.6 V; f = 20 Hz to 20 kHz; inputs are AC grounded no weighting - 35 - µV A weighting - 27 - µV [1] VDD is the supply voltage on pins PVDD and pin AVDD. SA58672_4 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 04 — 8 June 2009 6 of 27 SA58672 NXP Semiconductors 3.0 W mono class-D audio amplifier 10. Typical characterization curves 002aad856 100 ηpo (3) 002aad857 100 ηpo (1) (2) 80 80 60 60 40 40 20 20 (3) (2) (1) 0 0 0 0.5 1.0 2.0 1.5 3.0 2.5 Po (W) 0 0.5 1.0 1.5 2.0 Po (W) a. RL = 2 × 15 µH + 4.11 Ω b. RL = 2 × 15 µH + 8.03 Ω (1) VDD = 5.0 V. (2) VDD = 3.6 V. (3) VDD = 2.5 V. Fig 5. Output power efficiency as a function of output power 002aad858 0.5 P (W) 0.4 002aad859 0.3 (1) (1) P (W) 0.2 0.3 0.2 (2) 0.1 (2) 0.1 0 0 0 1.0 2.0 3.0 0 0.5 1.0 1.5 2.0 Po (W) Po (W) a. VDD = 5.0 V b. VDD = 3.6 V (1) RL = 2 × 15 µH + 4.11 Ω. (2) RL = 2 × 15 µH + 8.03 Ω. Fig 6. Power dissipation as a function of output power SA58672_4 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 04 — 8 June 2009 7 of 27 SA58672 NXP Semiconductors 3.0 W mono class-D audio amplifier 002aad860 400 300 IDD (mA) (1) 600 (2) (2) (3) 200 002aad861 800 (1) IDD (mA) 400 (3) 200 100 0 0 0 0.5 1.0 1.5 2.0 0 1 2 Po (W) 3 Po (W) a. RL = 2 × 15 µH + 8.03 Ω b. RL = 2 × 15 µH + 4.11 Ω (1) VDD = 5.0 V. (2) VDD = 3.6 V. (3) VDD = 2.5 V. Fig 7. Supply current as a function of output power 002aad862 8 IDD (mA) 002aad863 8 (1) IDD(sd) (µA) (1) 6 6 4 (2) 4 (2) 2 (3) 2 0 2.5 0 3.5 4.5 5.5 0 0.5 (1) With ferrite bead + 1 nF capacitor on outputs; RL = 2 × 15 µH + 8.03 Ω. (1) VDD = 5.0 V. (2) Without ferrite beads + 1 nF capacitor on outputs; RL = 2 × 15 µH + 8.03 Ω or no load. (3) VDD = 2.5 V. Fig 8. 1.5 2.0 (2) VDD = 3.6 V. Supply current as a function of supply voltage Fig 9. Shutdown mode supply current as a function of shutdown voltage SA58672_4 Product data sheet 1.0 VSD (V) VDD (V) © NXP B.V. 2009. All rights reserved. Rev. 04 — 8 June 2009 8 of 27 SA58672 NXP Semiconductors 3.0 W mono class-D audio amplifier 002aad864 102 THD+N (%) 10 (1) (2) (3) (4) 1 10−1 10−1 1 (1) 10 1 10−2 10−1 002aad865 102 THD+N (%) 10 10−2 10−2 10−1 (2) (3) (4) 1 10 Po (W) Po (W) a. RL = 2 × 15 µH + 4 Ω; A-weighting THD+N filter b. RL = 2 × 15 µH + 8 Ω; A-weighting THD+N filter (1) VDD = 2.5 V. (2) VDD = 3.6 V. (3) VDD = 5.0 V. (4) VDD = 5.5 V. Fig 10. Total harmonic distortion-plus-noise as a function of output power SA58672_4 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 04 — 8 June 2009 9 of 27 SA58672 NXP Semiconductors 3.0 W mono class-D audio amplifier 002aad869 10 THD+N (%) (1) 1 002aad870 10 THD+N (%) (2) (3) (1) (5) 1 (2) (4) 10−1 10−1 10−2 10−2 (3) (4) 10−3 10 102 103 104 10−3 105 102 10 f (Hz) 103 104 105 f (Hz) (1) VO = 4 dBV. (1) VO = 8 dBV. (2) VO = 3.5 dBV. (2) VO = 7 dBV. (3) VO = 0 dBV. (3) VO = 5 dBV. (4) VO = −10 dBV. (4) VO = 0 dBV. (5) VO = −10 dBV. a. VDD = 2.5 V b. VDD = 3.6 V 002aad871 10 THD+N (%) (1) (5) 1 (2) 10−1 (3) (4) 10−2 10−3 10 102 103 104 105 f (Hz) (1) VO = 11 dBV. (2) VO = 10 dBV. (3) VO = 8 dBV. (4) VO = 0 dBV. (5) VO = −10 dBV. c. VDD = 5.0 V Fig 11. Total harmonic distortion-plus-noise as a function of frequency; RL = 2 × 15 µH + 4 Ω; Gv = 6 dB; A-weighting THD+N filter SA58672_4 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 04 — 8 June 2009 10 of 27 SA58672 NXP Semiconductors 3.0 W mono class-D audio amplifier 002aad866 +20 002aad867 +20 FFT (dB) FFT (dB) −40 −40 −100 −100 −160 −160 0 8 16 24 0 8 16 f (kHz) 24 f (kHz) a. fi = 1 kHz b. fi = 3 kHz 002aad868 +20 FFT (dB) −40 −100 −160 0 8 16 24 f (kHz) c. fi = 5 kHz Fig 12. FFT spectrum as a function of frequency; VDD = 3.6 V; VO = 6 dBV; RL = 2 × 15 µH + 4 Ω SA58672_4 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 04 — 8 June 2009 11 of 27 SA58672 NXP Semiconductors 3.0 W mono class-D audio amplifier 002aad873 −50 002aad874 −50 SVRR (dB) SVRR (dB) −70 −70 (3) −90 −90 (3) (2) (1) (2) (1) −110 10 102 103 104 −110 105 102 10 f (Hz) 103 104 105 f (Hz) a. RL = 2 × 15 µH + 4.11 Ω; inputs AC grounded; Ci = 1 µF b. RL = 2 × 15 µH + 8.03 Ω; inputs AC grounded; Ci = 1 µF 002aad875 −50 SVRR (dB) −70 −90 (3) (1) (2) −110 10 102 103 104 105 f (Hz) c. RL = 2 × 15 µH + 8.03 Ω; inputs floating (1) VDD = 5.0 V. (2) VDD = 3.6 V. (3) VDD = 2.5 V. Fig 13. Supply voltage ripple rejection as a function of frequency; Gv(cl) = 2 V/V SA58672_4 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 04 — 8 June 2009 12 of 27 SA58672 NXP Semiconductors 3.0 W mono class-D audio amplifier 11. Application information 11.1 Power supply decoupling considerations The SA58672 is a mono class-D audio amplifier that requires proper power supply decoupling to ensure the rated performance for THD+N and power efficiency. To decouple high frequency transients, power supply spikes and digital noise on the power bus line, a low Equivalent Series Resistance (ESR) capacitor, of typically 1 µF is placed as close as possible to the PVDD terminals of the device. It is important to place the decoupling capacitor at the power pins of the device because any resistance or inductance in the PCB trace between the device and the capacitor can cause a loss in efficiency. Additional decoupling using a larger capacitor, 4.7 µF or greater may be done on the power supply connection on the PCB to filter low frequency signals. Usually this is not required due to high PSRR of the device. 11.2 Voltage gain The SA58672 is comprised of an analog amplifier stage and a comparator stage. The output of the analog amplifier stage is compared with the periodic ramp signal from the sawtooth ramp generator. The resulting output of the comparator is a Pulse Width Modulated (PWM) signal. The final stage is a power NMOS and PMOS H-bridge that converts the PWM into a high power output signal capable of driving low-impedance loads. The input resistor, Ri sets the gain of the amplifier according to Equation 1: 2 ( 150 kΩ ) Gain = --------------------------Ri (1) 11.3 Input capacitor selection The SA58672 does not require input coupling capacitors when used with a differential audio source that is biased from 0.5 V to VDD − 0.8 V. In other words, the input signal must be biased within the common-mode input voltage range. If high-pass filtering is required or if it is driven using a single-ended source, input coupling capacitors are required. The 3 dB cut-off frequency created by the input coupling capacitor and the input resistors is calculated by Equation 2: 1 f –3dB = -----------------------------2π × R i × C i (2) Using an input resistor of 150 kΩ, the gain is set to 2 V/V. At this gain setting, for input capacitor values from 220 nF to 2.2 µF, the 3 dB cut-off frequency may be set between 22 Hz and 220 Hz. Since the values of the input coupling capacitor and the input resistor affects the low frequency performance of the audio amplifier, it is important to consider in the system design. Small speakers in wireless and cellular phones usually do not respond well to low frequency signals. Their low frequency response may be only 600 Hz; typically 1 kHz. Thus, the 3 dB cut-off frequency should be increased to block the low frequency signals to the speakers. SA58672_4 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 04 — 8 June 2009 13 of 27 SA58672 NXP Semiconductors 3.0 W mono class-D audio amplifier For a required 3 dB cut-off frequency, Equation 3 is used to determine Ci: 1 C i = -------------------------------------2π × R i × f –3dB (3) The input signal may be DC-coupled, but not using input coupling capacitors may increase the output offset voltage. 11.4 PCB layout considerations The component location is very important for performance of the SA58672. Place all external components very close to the device. Placing decoupling capacitors directly at the power supply pins increases efficiency because the resistance and inductance in the trace between the device power supply pins and the decoupling capacitor causes a loss in power efficiency. The trace width and routing are also very important for power output and noise considerations. For high current terminals (PVDD, PGND and audio output), the trace widths should be maximized to ensure proper performance and output power. Use at least 500 µm wide traces. For the input pins (INP, INM), the traces must be symmetrical and run side-by-side to maximize common-mode cancellation. 11.5 Evaluation demo board The SA58672 evaluation demo board schematic is shown in Figure 14. An evaluation demo board is available and it may be used for either differential or single-ended (SE) input configuration. A component position on the PCB is provided to AC ground one of the inputs using a 0 Ω chip resistor. When driving SE, the undriven input must be at the same DC level as driven input. If the input is driven from an iPOD or MP3 player, the undriven input is AC grounded; however, if driven from a CODEC, the undriven input is AC decoupled to the same level as the CODEC output. Usually, a Vref is provided on the CODEC. SA58672_4 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 04 — 8 June 2009 14 of 27 SA58672 NXP Semiconductors 3.0 W mono class-D audio amplifier SV1 GND 1 2 3 GND SD PVDD GND PVDD C7 10 µF GND R4 C3 1 µF SA58672 GND 1 2 3 4 5 C6 1 µF R2 INM INP R3 C2 1 µF R1 SD AVDD INM INP OUTP PVDD PGND OUTM AGND n.c. 10 9 8 7 6 C1 1 µF OUTP OUTP GND FB2 2 A - 220 Ω HVSON10 (3 mm × 3 mm) GND C4 1 nF FB1 2 A - 220 Ω C5 1 nF OUTM OUTM GND GND9 GND6 GND GND EXT_AVDD C8 10 µF 1 2 3 PVDD GND AVDD EXT_AVDD SV2 002aad872 R3 and R4 are not populated for differential input drive. For single-ended input drive, either R3 or R4 are shorted to ground using a 0 Ω resistor (i.e., one input is AC grounded and the other is driven with the input signal). Fig 14. SA58672 evaluation demo board schematic 11.6 Filter-free operation and ferrite bead filters A ferrite bead low-pass filter can be used to reduce radio frequency emissions in applications that have circuits sensitive to greater than 1 MHz. A ferrite bead low-pass filter functions well for amplifiers that must pass FCC unintentional radiation requirements at greater than 30 MHz. Choose a bead with high-impedance at high frequencies and very low-impedance at low frequencies. In order to prevent distortion of the output signal, select a ferrite bead with adequate current rating. Ferrite bead sources are: • TDK MPZ1608S221A: 220 Ω at 100 MHz; 3 A peak max current; 0.04 Ω DC resistance. • KOA CZP2AFTTD221P: 220 Ω at 100 MHz; 2 A peak max current; 0.05 Ω DC resistance. • Murata BLM21PG221SN1: 220 Ω at 100 MHz; 2 A peak max current; 0.05 Ω DC resistance. The DC resistance should be as low as possible and the maximum current must exceed at least 1 A. Impedance of 220 Ω at 100 MHz is common spec, but 600 Ω and 1 kΩ ferrite beads may be used. Generally, the current rating decreases with increasing impedance at 100 MHz. However, larger impedance at 100 MHz allows for a smaller, shunt capacitor that will reduce the quiescent load current; this is important for battery operated applications. SA58672_4 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 04 — 8 June 2009 15 of 27 SA58672 NXP Semiconductors 3.0 W mono class-D audio amplifier For applications in which there are circuits that are EMI sensitive to low frequency (< 1 MHz) and there are long leads from amplifier to speaker, it may be necessary to use an LC output filter. 11.7 Efficiency and thermal considerations The maximum ambient operating temperature depends on the heat transferring ability of the heat spreader on the PCB layout. In Table 3 “Limiting values”, power dissipation, the power derating factor is given as 10 mW/K. The device thermal resistance, Rth(j-a) is the reciprocal of the power derating factor. Convert the power derating factor to Rth(j-a) by Equation 4: 1 1 R th ( j-a ) = ------------------------------------------ = ---------- = 100 K /W derating factor 0.01 (4) For a maximum allowable junction temperature, Tj = 150 °C and Rth(j-a) = 100 K/W and a maximum device dissipation of 0.84 W (420 mW per channel) and for 1.7 W per channel output power, 4 Ω load, 5 V supply, the maximum ambient temperature is calculated using Equation 5: T amb ( max ) = T j ( max ) – ( R th ( j-a ) × P max ) = 150 – ( 100 × 0.84 ) = 66 °C (5) The maximum ambient temperature is 66 °C at maximum power dissipation for 5 V supply and 4 Ω load. If the junction temperature of the SA58672 rises above 150 °C, the thermal protection circuitry turns the device off; this prevents damage to the IC. Using speakers greater than 4 Ω further enhances thermal performance and battery lifetime by reducing the output load current and increasing amplifier efficiency. 11.8 Additional thermal information The SA58672 9 bump WLCSP package ground bumps are soldered directly to the PCB heat spreader. By the use of thermal vias, the bumps may be soldered directly to a ground plane or special heat sinking layer designed into the PCB. The thickness and area of the heat spreader may be maximized to optimize heat transfer and achieve lower package thermal resistance. The SA58672 HVSON10 package has an exposed Die Attach Paddle (DAP), which is soldered directly to the PCB heat spreader to provide enhanced heat transfer and achieve lowest package thermal resistance. SA58672_4 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 04 — 8 June 2009 16 of 27 SA58672 NXP Semiconductors 3.0 W mono class-D audio amplifier 12. Test information 12.1 Test setup for typical characterization curves The SA58672 demo board shown in Figure 14 and the APA (Audio Precision Analyzer) are used to provide the characterization curves. The test setup diagram in Figure 15 shows the setup details. The output load configuration is comprised of 2 × 15 µH power inductors and precision power load resistor. This passive load emulates a small, low power speaker; it facilitates efficiency measurements. A speaker may be substituted for the passive load to yield similar results. 15 µH AP585 AUDIO ANALYZER INP OUTP RL DUT INM OUTM + 15 µH AUX0025 30 kHz LOW-PASS FILTER − POWER SUPPLY AP585 MEASUREMENT INPUTS 002aad855 (1) DUT is the SA58672 evaluation demo board. Fig 15. SA58672 test setup block diagram SA58672_4 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 04 — 8 June 2009 17 of 27 SA58672 NXP Semiconductors 3.0 W mono class-D audio amplifier 13. Package outline HVSON10: plastic thermal enhanced very thin small outline package; no leads; 10 terminals; body 3 x 3 x 0.85 mm SOT650-1 0 1 2 mm scale X A B D A A1 E c detail X terminal 1 index area C e1 terminal 1 index area e 5 y y1 C v M C A B w M C b 1 L Eh 6 10 Dh DIMENSIONS (mm are the original dimensions) UNIT A(1) max. A1 b c D(1) Dh E(1) Eh e e1 L v w y y1 mm 1 0.05 0.00 0.30 0.18 0.2 3.1 2.9 2.55 2.15 3.1 2.9 1.75 1.45 0.5 2 0.55 0.30 0.1 0.05 0.05 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT650-1 --- MO-229 --- EUROPEAN PROJECTION ISSUE DATE 01-01-22 02-02-08 Fig 16. Package outline SOT650-1 (HVSON10) SA58672_4 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 04 — 8 June 2009 18 of 27 SA58672 NXP Semiconductors 3.0 W mono class-D audio amplifier WLCSP9: wafer level chip-size package; 9 bumps; 1.66 x 1.71 x 0.6 mm B A D SA58672UK bump A1 index area A2 A E A1 detail X e1 ∅v ∅w b C C A B C M M y e C e e2 B A bump A1 index area 1 2 3 X 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max A1 A2 b D E e e1 e2 v w y mm 0.64 0.26 0.22 0.38 0.34 0.34 0.30 1.69 1.63 1.74 1.68 0.5 1 1 0.15 0.05 0.08 OUTLINE VERSION REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 08-06-12 SA58672UK Fig 17. Package outline WLCSP9 SA58672_4 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 04 — 8 June 2009 19 of 27 SA58672 NXP Semiconductors 3.0 W mono class-D audio amplifier 14. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description”. 14.1 Introduction to soldering Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both the mechanical and the electrical connection. There is no single soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high densities that come with increased miniaturization. 14.2 Wave and reflow soldering Wave soldering is a joining technology in which the joints are made by solder coming from a standing wave of liquid solder. The wave soldering process is suitable for the following: • Through-hole components • Leaded or leadless SMDs, which are glued to the surface of the printed circuit board Not all SMDs can be wave soldered. Packages with solder balls, and some leadless packages which have solder lands underneath the body, cannot be wave soldered. Also, leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered, due to an increased probability of bridging. The reflow soldering process involves applying solder paste to a board, followed by component placement and exposure to a temperature profile. Leaded packages, packages with solder balls, and leadless packages are all reflow solderable. Key characteristics in both wave and reflow soldering are: • • • • • • Board specifications, including the board finish, solder masks and vias Package footprints, including solder thieves and orientation The moisture sensitivity level of the packages Package placement Inspection and repair Lead-free soldering versus SnPb soldering 14.3 Wave soldering Key characteristics in wave soldering are: • Process issues, such as application of adhesive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave • Solder bath specifications, including temperature and impurities SA58672_4 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 04 — 8 June 2009 20 of 27 SA58672 NXP Semiconductors 3.0 W mono class-D audio amplifier 14.4 Reflow soldering Key characteristics in reflow soldering are: • Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see Figure 18) than a SnPb process, thus reducing the process window • Solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board • Reflow temperature profile; this profile includes preheat, reflow (in which the board is heated to the peak temperature) and cooling down. It is imperative that the peak temperature is high enough for the solder to make reliable solder joints (a solder paste characteristic). In addition, the peak temperature must be low enough that the packages and/or boards are not damaged. The peak temperature of the package depends on package thickness and volume and is classified in accordance with Table 6 and 7 Table 6. SnPb eutectic process (from J-STD-020C) Package thickness (mm) Package reflow temperature (°C) Volume (mm3) < 350 ≥ 350 < 2.5 235 220 ≥ 2.5 220 220 Table 7. Lead-free process (from J-STD-020C) Package thickness (mm) Package reflow temperature (°C) Volume (mm3) < 350 350 to 2000 > 2000 < 1.6 260 260 260 1.6 to 2.5 260 250 245 > 2.5 250 245 245 Moisture sensitivity precautions, as indicated on the packing, must be respected at all times. Studies have shown that small packages reach higher temperatures during reflow soldering, see Figure 18. SA58672_4 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 04 — 8 June 2009 21 of 27 SA58672 NXP Semiconductors 3.0 W mono class-D audio amplifier temperature maximum peak temperature = MSL limit, damage level minimum peak temperature = minimum soldering temperature peak temperature time 001aac844 MSL: Moisture Sensitivity Level Fig 18. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description”. 15. Soldering of WLCSP packages 15.1 Introduction to soldering WLCSP packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering WLCSP (Wafer Level Chip-Size Packages) can be found in application note AN10439 “Wafer Level Chip Scale Package” and in application note AN10365 “Surface mount reflow soldering description”. Wave soldering is not suitable for this package. All NXP WLCSP packages are lead-free. 15.2 Board mounting Board mounting of a WLCSP requires several steps: 1. Solder paste printing on the PCB 2. Component placement with a pick and place machine 3. The reflow soldering itself 15.3 Reflow soldering Key characteristics in reflow soldering are: • Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see Figure 19) than a PbSn process, thus reducing the process window SA58672_4 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 04 — 8 June 2009 22 of 27 SA58672 NXP Semiconductors 3.0 W mono class-D audio amplifier • Solder paste printing issues, such as smearing, release, and adjusting the process window for a mix of large and small components on one board • Reflow temperature profile; this profile includes preheat, reflow (in which the board is heated to the peak temperature), and cooling down. It is imperative that the peak temperature is high enough for the solder to make reliable solder joints (a solder paste characteristic) while being low enough that the packages and/or boards are not damaged. The peak temperature of the package depends on package thickness and volume and is classified in accordance with Table 8. Table 8. Lead-free process (from J-STD-020C) Package thickness (mm) Package reflow temperature (°C) Volume (mm3) < 350 350 to 2000 > 2000 < 1.6 260 260 260 1.6 to 2.5 260 250 245 > 2.5 250 245 245 Moisture sensitivity precautions, as indicated on the packing, must be respected at all times. Studies have shown that small packages reach higher temperatures during reflow soldering, see Figure 19. temperature maximum peak temperature = MSL limit, damage level minimum peak temperature = minimum soldering temperature peak temperature time 001aac844 MSL: Moisture Sensitivity Level Fig 19. Temperature profiles for large and small components For further information on temperature profiles, refer to application note AN10365 “Surface mount reflow soldering description”. 15.3.1 Stand off The stand off between the substrate and the chip is determined by: • The amount of printed solder on the substrate • The size of the solder land on the substrate SA58672_4 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 04 — 8 June 2009 23 of 27 SA58672 NXP Semiconductors 3.0 W mono class-D audio amplifier • The bump height on the chip The higher the stand off, the better the stresses are released due to TEC (Thermal Expansion Coefficient) differences between substrate and chip. 15.3.2 Quality of solder joint A flip-chip joint is considered to be a good joint when the entire solder land has been wetted by the solder from the bump. The surface of the joint should be smooth and the shape symmetrical. The soldered joints on a chip should be uniform. Voids in the bumps after reflow can occur during the reflow process in bumps with high ratio of bump diameter to bump height, i.e. low bumps with large diameter. No failures have been found to be related to these voids. Solder joint inspection after reflow can be done with X-ray to monitor defects such as bridging, open circuits and voids. 15.3.3 Rework In general, rework is not recommended. By rework we mean the process of removing the chip from the substrate and replacing it with a new chip. If a chip is removed from the substrate, most solder balls of the chip will be damaged. In that case it is recommended not to re-use the chip again. Device removal can be done when the substrate is heated until it is certain that all solder joints are molten. The chip can then be carefully removed from the substrate without damaging the tracks and solder lands on the substrate. Removing the device must be done using plastic tweezers, because metal tweezers can damage the silicon. The surface of the substrate should be carefully cleaned and all solder and flux residues and/or underfill removed. When a new chip is placed on the substrate, use the flux process instead of solder on the solder lands. Apply flux on the bumps at the chip side as well as on the solder pads on the substrate. Place and align the new chip while viewing with a microscope. To reflow the solder, use the solder profile shown in application note AN10365 “Surface mount reflow soldering description”. 15.3.4 Cleaning Cleaning can be done after reflow soldering. 16. Abbreviations Table 9. Abbreviations Acronym Description APA Audio Precision Analyzer CODEC compressor-decompressor DAP Die Attach Paddle DUT Device Under Test DVD Digital Video Disc EMI ElectroMagnetic Interference ESR Equivalent Series Resistance FCC Federal Communications Commission FFT Fast Fourier Transform IC Integrated Circuit SA58672_4 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 04 — 8 June 2009 24 of 27 SA58672 NXP Semiconductors 3.0 W mono class-D audio amplifier Table 9. Abbreviations …continued Acronym Description LC inductor-capacitor filter LSB Least Significant Bit MP3 MPEG-1 audio layer 3 MSB Most Significant Bit PC Personal Computer PCB Printed-Circuit Board PDA Personal Digital Assistant PSRR Power Supply Rejection Ratio PWM Pulse Width Modulator RF Radio Frequency USB Universal Serial Bus WLCSP Wafer Level Chip-Size Package 17. Revision history Table 10. Revision history Document ID Release date Data sheet status Change notice Supersedes SA58672_4 20090608 Product data sheet - SA58672_3 Modifications: • Table 3 “Limiting values”: – Symbol changed from “Vesd” to “VESD” – VESD Min value for human body model changed from “±2000 V” to “±2500 V” – VESD Min value for machine model changed from “±200 V” to “±100 V” – Added VESD charged-device model specification SA58672_3 20090421 Product data sheet - SA58672_2 SA58672_2 20090223 Product data sheet - SA58672_1 SA58672_1 20080710 Product data sheet - - SA58672_4 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 04 — 8 June 2009 25 of 27 SA58672 NXP Semiconductors 3.0 W mono class-D audio amplifier 18. Legal information 18.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 18.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 18.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 18.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 19. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] SA58672_4 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 04 — 8 June 2009 26 of 27 SA58672 NXP Semiconductors 3.0 W mono class-D audio amplifier 20. Contents 1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 11.1 11.2 11.3 11.4 11.5 11.6 11.7 11.8 12 12.1 13 14 14.1 14.2 14.3 14.4 15 15.1 15.2 15.3 15.3.1 15.3.2 15.3.3 15.3.4 16 17 18 18.1 18.2 18.3 18.4 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Dynamic characteristics . . . . . . . . . . . . . . . . . . 6 Typical characterization curves . . . . . . . . . . . . 7 Application information. . . . . . . . . . . . . . . . . . 13 Power supply decoupling considerations . . . . 13 Voltage gain . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Input capacitor selection . . . . . . . . . . . . . . . . . 13 PCB layout considerations . . . . . . . . . . . . . . . 14 Evaluation demo board. . . . . . . . . . . . . . . . . . 14 Filter-free operation and ferrite bead filters. . . 15 Efficiency and thermal considerations . . . . . . 16 Additional thermal information . . . . . . . . . . . . 16 Test information . . . . . . . . . . . . . . . . . . . . . . . . 17 Test setup for typical characterization curves . 17 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 18 Soldering of SMD packages . . . . . . . . . . . . . . 20 Introduction to soldering . . . . . . . . . . . . . . . . . 20 Wave and reflow soldering . . . . . . . . . . . . . . . 20 Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 20 Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 21 Soldering of WLCSP packages. . . . . . . . . . . . 22 Introduction to soldering WLCSP packages . . 22 Board mounting . . . . . . . . . . . . . . . . . . . . . . . 22 Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 22 Stand off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Quality of solder joint . . . . . . . . . . . . . . . . . . . 24 Rework . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Cleaning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 25 Legal information. . . . . . . . . . . . . . . . . . . . . . . 26 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 26 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 19 20 Contact information . . . . . . . . . . . . . . . . . . . . 26 Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2009. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 8 June 2009 Document identifier: SA58672_4