PHILIPS NX3L4684GM

NX3L4684
Dual low-ohmic single-pole double-throw analog switch
Rev. 04 — 24 March 2010
Product data sheet
1. General description
The NX3L4684 provides two low-ohmic single-pole double-throw analog switches,
suitable for use as an analog or digital multiplexer/demultiplexer. It has a digital select
input (nS) with Schmitt trigger action, two independent inputs/outputs (nY0, nY1) and a
common input/output (nZ). Schmitt trigger action at the select input (nS) makes the circuit
tolerant to slower input rise and fall times across the entire VCC range from 1.4 V to 4.3 V.
A low input voltage threshold allows pin nS to be driven by lower level logic signals without
a significant increase in supply current ICC. This makes it possible for the NX3L4684 to
switch 4.3 V signals with a 1.8 V digital controller, eliminating the need for logic level
translation.
The NX3L4684 allows signals with amplitude up to VCC to be transmitted from nZ to nY0
or nY1; or from nY0 or nY1 to nZ. Its low ON resistance (0.3 Ω for Y0 port, 0.5 Ω for Y1
port) and flatness (0.1 Ω) ensures minimal attenuation and distortion of transmitted
signals.
2. Features
„ Wide supply voltage range from 1.4 V to 4.3 V
„ Very low ON resistance (peak) for Y0 port:
‹ 0.8 Ω (typical) at VCC = 1.4 V
‹ 0.5 Ω (typical) at VCC = 1.65 V
‹ 0.3 Ω (typical) at VCC = 2.3 V
‹ 0.25 Ω (typical) at VCC = 2.7 V
‹ 0.25 Ω (typical) at VCC = 4.3 V
„ Break-before-make switching
„ High noise immunity
„ ESD protection:
‹ HBM JESD22-A114F Class 3A exceeds 4000 V
‹ MM JESD22-A115-A exceeds 200 V
‹ CDM AEC-Q100-011 revision B exceeds 1000 V
„ CMOS low-power consumption
„ Latch-up performance exceeds 100 mA per JESD 78B Class II Level A
„ 1.8 V control logic at VCC = 3.6 V
„ Control input accepts voltages above supply voltage
„ Very low supply current, even when input is below VCC
„ High current handling capability (350 mA continuous current under 3.3 V supply)
„ Specified from −40 °C to +85 °C and from −40 °C to +125 °C
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
3. Applications
„ Cell phone
„ PDA
„ Portable media player
4. Ordering information
Table 1.
Ordering information
Type number
Package
Temperature range
Name
Description
Version
NX3L4684GM
−40 °C to +125 °C
XQFN10U
plastic extremely thin quad flat package; no leads;
10 terminals; UTLP based; body 2 × 1.55 × 0.5 mm
SOT1049-2
NX3L4684TK
−40 °C to +125 °C
HVSON10
plastic thermal enhanced very thin small outline
package; no leads; 10 terminals; 3 × 3 × 0.85 mm
SOT650-1
5. Marking
Table 2.
Marking
Type number
Marking code
NX3L4684GM
D84
NX3L4684TK
D84
6. Functional diagram
Y1
1Y0
2Y0
1S
2S
1Z
2Z
1Y1
S
Y0
2Y1
001aac355
001aaj085
Fig 1.
Logic symbol
Fig 2.
Logic diagram (one switch)
NX3L4684_4
Product data sheet
Z
© NXP B.V. 2010. All rights reserved.
Rev. 04 — 24 March 2010
2 of 24
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
7. Pinning information
7.1 Pinning
9
2Y0
1S
2
8
2S
1Z
3
7
2Z
1Y1
4
6
2Y1
5
1
VCC
1Y0
10
GND
NX3L4684
terminal 1
index area
VCC
1
10 2Y1
1Y1
2
9
2Z
1Z
3
8
2S
1S
4
7
2Y0
1Y0
5
6
GND
001aaj086
001aaj087
Transparent top view
Fig 3.
NX3L4684
Transparent top view
Pin configuration SOT1049-2 (XQFN10U)
Fig 4.
Pin configuration SOT650-1 (HVSON10)
7.2 Pin description
Table 3.
Pin description
Symbol
Pin
Description
SOT1049-2
SOT650-1
1Y0
1
5
independent input or output
1S
2
4
select input
1Z
3
3
common output or input
1Y1
4
2
independent input or output
VCC
5
1
supply voltage
2Y1
6
10
independent input or output
2Z
7
9
common output or input
2S
8
8
select input
2Y0
9
7
independent input or output
GND
10
6
ground (0 V)
NX3L4684_4
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 04 — 24 March 2010
3 of 24
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
8. Functional description
Table 4.
Function table[1]
Input nS
Channel on
L
nY0
H
nY1
[1]
H = HIGH voltage level;
L = LOW voltage level.
9. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
VCC
supply voltage
VI
input voltage
Conditions
Min
Max
Unit
−0.5
+4.6
V
select input nS
[1]
−0.5
+4.6
V
[2]
−0.5
VCC + 0.5 V
VSW
switch voltage
switch input nY0 or nY1
IIK
input clamping current
VI < −0.5 V
−50
-
mA
ISK
switch clamping current
VI < −0.5 V or VI > VCC + 0.5 V
-
±50
mA
ISW
switch current
VSW > −0.5 V or VSW < VCC + 0.5 V;
source or sink current
-
±350
mA
VSW > −0.5 V or VSW < VCC + 0.5 V;
pulsed at 1 ms duration, < 10 % duty cycle;
peak current
-
±500
mA
−65
+150
°C
-
250
mW
Tstg
storage temperature
Ptot
total power dissipation
Tamb = −40 °C to +125 °C
[3]
[1]
The minimum input voltage rating may be exceeded if the input current rating is observed.
[2]
The minimum and maximum switch voltage ratings may be exceeded if the switch clamping current rating is observed but may not
exceed 4.6 V.
[3]
For XQFN10U packages: above 132 °C the value of Ptot derates linearly with 14.1 mW/K.
For HVSON10 packages: above 135 °C °C the value of Ptot derates linearly with 17.2 mW/K.
10. Recommended operating conditions
Table 6.
Recommended operating conditions
Symbol Parameter
Conditions
VCC
supply voltage
VI
input voltage
select input nS
VSW
switch voltage
switch input nY0 or nY1
[1]
Tamb
ambient temperature
VCC = 1.4 V to 4.3 V
[2]
Δt/ΔV
input transition rise and fall rate
Min
Max
Unit
1.4
4.3
V
0
4.3
V
0
VCC
V
−40
+125
°C
-
200
ns/V
[1]
To avoid sinking GND current from terminal nZ when switch current flows in terminal nYn, the voltage drop across the bidirectional
switch must not exceed 0.4 V. If the switch current flows into terminal nZ, no GND current will flow from terminal nYn. In this case, there
is no limit for the voltage drop across the switch.
[2]
Applies to select input nS signal levels.
NX3L4684_4
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 04 — 24 March 2010
4 of 24
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
11. Static characteristics
Table 7.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground 0 V).
Symbol Parameter
VIH
VIL
Max
Min
VCC = 1.4 V to 1.6 V
0.9
-
-
0.9
-
-
V
VCC = 1.65 V to 1.95 V
0.9
-
-
0.9
-
-
V
VCC = 2.3 V to 2.7 V
1.1
-
-
1.1
-
-
V
VCC = 2.7 V to 3.6 V
1.3
-
-
1.3
-
-
V
VCC = 3.6 V to 4.3 V
1.4
-
-
1.4
-
-
V
VCC = 1.4 V to 1.6 V
-
-
0.3
-
0.3
0.3
V
VCC = 1.65 V to 1.95 V
-
-
0.4
-
0.4
0.3
V
VCC = 2.3 V to 2.7 V
-
-
0.5
-
0.5
0.4
V
VCC = 2.7 V to 3.6 V
-
-
0.5
-
0.5
0.5
V
VCC = 3.6 V to 4.3 V
-
-
0.6
-
0.6
0.6
V
-
-
-
-
±0.5
±1
μA
VCC = 1.4 V to 3.6 V
-
-
±5
-
±10
±100
nA
VCC = 3.6 V to 4.3 V
-
-
±10
-
±50
±200
nA
VCC = 1.4 V to 3.6 V
-
-
±5
-
±20
±200
nA
VCC = 3.6 V to 4.3 V
-
-
±10
-
±50
±400
nA
VCC = 3.6 V
-
-
100
-
300
3000
nA
VCC = 4.3 V
-
-
150
-
500
5000
nA
additional
VSW = GND or VCC
supply current V = 2.6 V; V = 4.3 V
I
CC
-
2.0
4.0
-
7
7
μA
VI = 2.6 V; VCC = 3.6 V
-
0.35
0.7
-
1
1
μA
VI = 1.8 V; VCC = 4.3 V
-
7.0
10.0
-
15
15
μA
VI = 1.8 V; VCC = 3.6 V
-
2.5
4.0
-
5
5
μA
VI = 1.8 V; VCC = 2.5 V
-
50
200
-
300
500
nA
-
1.0
-
-
-
-
pF
HIGH-level
input voltage
LOW-level
input voltage
select input nS;
VI = GND to 4.3 V;
VCC = 1.4 V to 4.3 V
IS(OFF)
OFF-state
leakage
current
nYn port; see Figure 5
ON-state
leakage
current
nZ port; see Figure 6
ΔICC
Unit
Typ
input leakage
current
ICC
Tamb = −40 °C to +125 °C
Min
II
IS(ON)
Tamb = 25 °C
Conditions
Max
Max
(85 °C) (125 °C)
supply current VI = VCC or GND;
VSW = GND or VCC
CI
input
capacitance
CS(OFF)
OFF-state
capacitance
port nY0
-
65
-
-
-
-
pF
port nY1
-
35
-
-
-
-
pF
ON-state
capacitance
port nY0
-
260
-
-
-
-
pF
port nY1
-
160
-
-
-
-
pF
CS(ON)
NX3L4684_4
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 04 — 24 March 2010
5 of 24
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
11.1 Test circuits
VCC
VIL or VIH
nS
nY0
1
nZ
nY1
2
switch
switch
nS
1
VIH
2
VIL
IS
VI
VO
GND
012aaa000
VI = 0.3 V or VCC − 0.3 V; VO = VCC − 0.3 V or 0.3 V.
Fig 5.
Test circuit for measuring OFF-state leakage current
VCC
VIL or VIH
IS
nS
nY0 1
nZ
nY1 2
switch
nS
1
VIH
2
VIL
switch
VI
VO
GND
012aaa001
VI = 0.3 V or VCC − 0.3 V; VO = VCC − 0.3 V or 0.3 V.
Fig 6.
Test circuit for measuring ON-state leakage current
NX3L4684_4
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 04 — 24 March 2010
6 of 24
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
11.2 ON resistance
Table 8.
ON resistance
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for graphs see Figure 9 to Figure 21.
Symbol
RON(peak)
Parameter
ON resistance
(peak)
−40 °C to +85 °C
Conditions
−40 °C to +125 °C Unit
Min
Typ[1]
Max
Min
Max
VCC = 1.4 V
-
0.85
2.0
-
2.2
Ω
VCC = 1.65 V
-
0.55
0.8
-
0.9
Ω
VCC = 2.3 V
-
0.35
0.5
-
0.6
Ω
VCC = 2.7 V
-
0.30
0.45
-
0.5
Ω
VCC = 4.3 V
-
0.30
0.45
-
0.5
Ω
VCC = 1.4 V
-
1.65
3.7
-
4.1
Ω
VCC = 1.65 V
-
0.95
1.6
-
1.7
Ω
VCC = 2.3 V
-
0.55
0.8
-
0.9
Ω
VCC = 2.7 V
-
0.50
0.75
-
0.9
Ω
VCC = 4.3 V
-
0.50
0.75
-
0.9
Ω
-
0.15
0.3
-
0.3
Ω
port nY0; see Figure 7;
VI = GND to VCC; ISW = 100 mA
port nY1; see Figure 7;
VI = GND to VCC; ISW = 100 mA
ΔRON
ON resistance
VI = GND to VCC; ISW = 100 mA
mismatch between
VCC = 1.4 V
channels
VCC = 1.65 V
[2]
-
0.15
0.2
-
0.3
Ω
VCC = 2.3 V
-
0.04
0.08
-
0.1
Ω
VCC = 2.7 V
-
0.04
0.075
-
0.1
Ω
-
0.04
0.075
-
0.1
Ω
VCC = 1.4 V
-
0.5
1.7
-
1.8
Ω
VCC = 1.65 V
-
0.25
0.6
-
0.7
Ω
VCC = 2.3 V
-
0.1
0.2
-
0.2
Ω
VCC = 2.7 V
-
0.1
0.15
-
0.2
Ω
-
0.1
0.20
-
0.25
Ω
VCC = 1.4 V
-
1.0
3.3
-
3.6
Ω
VCC = 1.65 V
-
0.5
1.2
-
1.3
Ω
VCC = 2.3 V
-
0.15
0.3
-
0.35
Ω
VCC = 2.7 V
-
0.13
0.3
-
0.35
Ω
VCC = 4.3 V
-
0.2
0.4
-
0.45
Ω
VCC = 4.3 V
RON(flat)
ON resistance
(flatness)
port nY0; VI = GND to VCC;
ISW = 100 mA
[3]
VCC = 4.3 V
port nY1; VI = GND to VCC;
ISW = 100 mA
[3]
[1]
Typical values are measured at Tamb = 25 °C.
[2]
Measured at identical VCC, temperature and input voltage.
[3]
Flatness is defined as the difference between the maximum and minimum value of ON resistance measured at identical VCC and
temperature.
NX3L4684_4
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 04 — 24 March 2010
7 of 24
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
11.3 ON resistance test circuit and graphs
VSW
V
VCC
nS
VIL or VIH
nY0 1 switch
nY1 2
nZ
VI
switch
nS
1
VIL
2
VIH
ISW
GND
012aaa002
RON = VSW / ISW.
Fig 7.
Test circuit for measuring ON resistance
001aah800
0.8
RON
(Ω)
001aag564
1.6
RON
(Ω)
0.6
1.2
(1)
(1)
0.4
0.8
(2)
(2)
(3)
(3)
(4)
0.2
(5)
(4)
0.4
(6)
0
(5)
0
0
1
2
3
4
5
0
1
2
VI (V)
(1) VCC = 1.5 V.
(2) VCC = 1.8 V.
(2) VCC = 1.8 V.
(3) VCC = 2.5 V.
(3) VCC = 2.5 V.
(4) VCC = 2.7 V.
(4) VCC = 2.7 V.
(5) VCC = 3.3 V.
(5) VCC = 3.3 V.
(6) VCC = 4.3 V.
(6) VCC = 4.3 V.
Measured at Tamb = 25 °C.
4
5
Measured at Tamb = 25 °C.
Typical ON resistance as a function of input
voltage (nY0 port)
Fig 9.
Typical ON resistance as a function of input
voltage (nY1 port)
NX3L4684_4
Product data sheet
3
VI (V)
(1) VCC = 1.5 V.
Fig 8.
(6)
© NXP B.V. 2010. All rights reserved.
Rev. 04 — 24 March 2010
8 of 24
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
001aah805
0.8
001aag565
1.6
RON
(Ω)
RON
(Ω)
1.2
0.6
0.4
(1)
(2)
(3)
(4)
0.8
(1)
(2)
(3)
0.2
0.4
(4)
0
0
0
1
2
0
3
1
2
VI (V)
(1) Tamb = 125 °C.
(1) Tamb = 125 °C.
(2) Tamb = 85 °C.
(2) Tamb = 85 °C.
(3) Tamb = 25 °C.
(3) Tamb = 25 °C.
(4) Tamb = −40 °C.
(4) Tamb = −40 °C.
Fig 10. ON resistance as a function of input voltage;
VCC = 1.5 V (nY0 port)
001aah801
0.6
3
VI (V)
Fig 11. ON resistance as a function of input voltage;
VCC = 1.5 V (nY1 port)
001aag566
1.0
RON
(Ω)
RON
(Ω)
0.8
(1)
(2)
(3)
(4)
0.4
0.6
(1)
(2)
(3)
0.2
0.4
(4)
0.2
0
0
0
1
2
3
0
VI (V)
2
3
VI (V)
(1) Tamb = 125 °C.
(1) Tamb = 125 °C.
(2) Tamb = 85 °C.
(2) Tamb = 85 °C.
(3) Tamb = 25 °C.
(3) Tamb = 25 °C.
(4) Tamb = −40 °C.
(4) Tamb = −40 °C.
Fig 12. ON resistance as a function of input voltage;
VCC = 1.8 V (nY0 port)
Fig 13. ON resistance as a function of input voltage;
VCC = 1.8 V (nY1 port)
NX3L4684_4
Product data sheet
1
© NXP B.V. 2010. All rights reserved.
Rev. 04 — 24 March 2010
9 of 24
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
001aah802
0.6
001aag567
1.0
RON
(Ω)
RON
(Ω)
0.8
0.4
0.6
(1)
(2)
(3)
(4)
(1)
(2)
0.4
(3)
0.2
(4)
0.2
0
0
0
1
2
0
3
1
2
VI (V)
(1) Tamb = 125 °C.
(1) Tamb = 125 °C.
(2) Tamb = 85 °C.
(2) Tamb = 85 °C.
(3) Tamb = 25 °C.
(3) Tamb = 25 °C.
(4) Tamb = −40 °C.
(4) Tamb = −40 °C.
Fig 14. ON resistance as a function of input voltage;
VCC = 2.5 V (nY0 port)
001aah803
0.6
3
VI (V)
RON
(Ω)
Fig 15. ON resistance as a function of input voltage;
VCC = 2.5 V (nY1 port)
001aah802
0.6
RON
(Ω)
0.4
0.4
(1)
(1)
(2)
(2)
(3)
(3)
0.2
0.2
(4)
0
(4)
0
0
1
2
3
0
VI (V)
2
3
VI (V)
(1) Tamb = 125 °C.
(1) Tamb = 125 °C.
(2) Tamb = 85 °C.
(2) Tamb = 85 °C.
(3) Tamb = 25 °C.
(3) Tamb = 25 °C.
(4) Tamb = −40 °C.
(4) Tamb = −40 °C.
Fig 16. ON resistance as a function of input voltage;
VCC = 2.7 V (nY0 port)
Fig 17. ON resistance as a function of input voltage;
VCC = 2.7 V (nY1 port)
NX3L4684_4
Product data sheet
1
© NXP B.V. 2010. All rights reserved.
Rev. 04 — 24 March 2010
10 of 24
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
001aah804
0.6
001aag569
1.0
RON
(Ω)
RON
(Ω)
0.8
0.4
0.6
(1)
(2)
(3)
(4)
(1)
(2)
0.4
(3)
0.2
(4)
0.2
0
0
0
1
2
3
4
0
1
2
3
4
VI (V)
VI (V)
(1) Tamb = 125 °C.
(1) Tamb = 125 °C.
(2) Tamb = 85 °C.
(2) Tamb = 85 °C.
(3) Tamb = 25 °C.
(3) Tamb = 25 °C.
(4) Tamb = −40 °C.
(4) Tamb = −40 °C.
Fig 18. ON resistance as a function of input voltage;
VCC = 3.3 V (nY0 port)
001aaj895
0.6
Fig 19. ON resistance as a function of input voltage;
VCC = 3.3 V (nY1 port)
001aaj896
1.0
RON
(Ω)
RON
(Ω)
0.8
0.4
0.6
(1)
(2)
(3)
(4)
(1)
(2)
(3)
(4)
0.4
0.2
0.2
0
0
0
1
2
3
4
5
0
1
VI (V)
3
4
5
VI (V)
(1) Tamb = 125 °C.
(1) Tamb = 125 °C.
(2) Tamb = 85 °C.
(2) Tamb = 85 °C.
(3) Tamb = 25 °C.
(3) Tamb = 25 °C.
(4) Tamb = −40 °C.
(4) Tamb = −40 °C.
Fig 20. ON resistance as a function of input voltage;
VCC = 4.3 V (nY0 port)
Fig 21. ON resistance as a function of input voltage;
VCC = 4.3 V (nY1 port)
NX3L4684_4
Product data sheet
2
© NXP B.V. 2010. All rights reserved.
Rev. 04 — 24 March 2010
11 of 24
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
12. Dynamic characteristics
Table 9.
Dynamic characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for load circuit see Figure 24.
Symbol Parameter
ten
enable time
tdis
disable time
Tamb = 25 °C
Conditions
Max
Min
Max
(85 °C)
Max
(125 °C)
VCC = 1.4 V to 1.6 V
-
50
100
-
130
130
ns
VCC = 1.65 V to 1.95 V
-
35
80
-
85
95
ns
VCC = 2.3 V to 2.7 V
-
24
50
-
55
60
ns
VCC = 2.7 V to 3.6 V
-
20
45
-
50
55
ns
VCC = 3.6 V to 4.3 V
-
20
45
-
50
55
ns
VCC = 1.4 V to 1.6 V
-
30
70
-
80
90
ns
VCC = 1.65 V to 1.95 V
-
18
55
-
60
65
ns
VCC = 2.3 V to 2.7 V
-
11
25
-
30
35
ns
VCC = 2.7 V to 3.6 V
-
9
20
-
25
30
ns
-
9
20
-
25
30
ns
nS to nZ or nYn;
see Figure 22
nS to nZ or nYn;
see Figure 22
break-before-make see Figure 23
time
VCC = 1.4 V to 1.6 V
[2]
-
20
-
9
-
-
ns
VCC = 1.65 V to 1.95 V
-
19
-
7
-
-
ns
VCC = 2.3 V to 2.7 V
-
13
-
4
-
-
ns
VCC = 2.7 V to 3.6 V
-
10
-
2
-
-
ns
VCC = 3.6 V to 4.3 V
-
10
-
1
-
-
ns
[1]
Typical values are measured at Tamb = 25 °C and VCC = 1.5 V, 1.8 V, 2.5 V, 3.3 V and 4.3 V respectively.
[2]
Break-before-make guaranteed by design.
NX3L4684_4
Product data sheet
Unit
Min
VCC = 3.6 V to 4.3 V
tb-m
Tamb = −40 °C to +125 °C
Typ[1]
© NXP B.V. 2010. All rights reserved.
Rev. 04 — 24 March 2010
12 of 24
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
12.1 Waveform and test circuits
VI
VM
nS input
GND
ten
VOH
tdis
VX
nZ output
nY1 connected to VEXT OFF to HIGH
HIGH to OFF
VX
GND
tdis
nZ output
nY0 connected to VEXT HIGH to OFF
OFF to HIGH
VOH
ten
VX
VX
012aaa003
GND
Measurement points are given in Table 10.
Logic level: VOH is typical output voltage level that occurs with the output load.
Fig 22. Enable and disable times
Table 10.
Measurement points
Supply voltage
Input
Output
VCC
VM
VX
1.4 V to 4.3 V
0.5VCC
0.9VOH
NX3L4684_4
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 04 — 24 March 2010
13 of 24
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
VCC
nS
nY0
nZ
G
VI
V
VO
RL
nY1
VEXT = 1.5 V
CL
GND
012aaa004
a. Test circuit.
VI
0.5VI
0.9VO
0.9VO
VO
tb-m
001aag572
b. Input and output measurement points
Fig 23. Test circuit for measuring break-before-make timing
VCC
G
VI
V
VO
RL
nS
nY0
1
nZ
nY1
2
switch
VEXT = 1.5 V
CL
GND
012aaa005
Test data is given in Table 11.
Definitions test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
VEXT = External voltage for measuring switching times.
Fig 24. Load circuit for switching times
Table 11.
Test data
Supply voltage
Input
VCC
VI
tr, tf
Load
CL
RL
1.4 V to 4.3 V
VCC
≤ 2.5 ns
35 pF
50 Ω
NX3L4684_4
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 04 — 24 March 2010
14 of 24
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
12.2 Additional dynamic characteristics
Table 12. Additional dynamic characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); VI = GND or VCC (unless otherwise
specified); tr = tf ≤ 2.5 ns.
Tamb = 25 °C
Symbol Parameter
Conditions
THD
fi = 20 Hz to 20 kHz; RL = 32 Ω; see Figure 25
total harmonic
distortion
Min
Typ
Max
VCC = 1.4 V; VI = 1 V (p-p)
-
0.06
-
%
VCC = 1.65 V; VI = 1.2 V (p-p)
-
0.02
-
%
VCC = 2.3 V; VI = 1.5 V (p-p)
-
0.02
-
%
VCC = 2.7 V; VI = 2 V (p-p)
-
0.02
-
%
VCC = 4.3 V; VI = 2 V (p-p)
-
0.02
-
%
-
0.01
-
%
-
15
-
MHz
-
20
-
MHz
-
−90
-
dB
-
0.5
-
V
-
0.7
-
V
-
−90
-
dB
VCC = 1.5 V
-
10
-
pC
VCC = 1.8 V
-
14
-
pC
VCC = 2.5 V
-
21
-
pC
VCC = 3.3 V
-
30
-
pC
VCC = 4.3 V
-
50
-
pC
[1]
VCC = 3.0 V; VI = 1 V (p-p); RL = 600 Ω
f(−3dB)
−3 dB frequency
response
RL = 50 Ω; see Figure 26
[1]
port nY0; VCC = 1.4 V to 4.3 V
port nY1; VCC = 1.4 V to 4.3 V
αiso
isolation (OFF-state)
fi = 100 kHz; RL = 50 Ω; see Figure 27
Vct
crosstalk voltage
between digital inputs and switch;
fi = 1 MHz; CL = 50 pF; RL = 50 Ω; see Figure 28
[1]
VCC = 1.4 V to 4.3 V
VCC = 1.4 V to 3.6 V
VCC = 3.6 V to 4.3 V
Xtalk
crosstalk
between switches;
fi = 100 kHz; RL = 50 Ω; see Figure 29
VCC = 1.4 V to 4.3 V
Qinj
[1]
charge injection
Unit
[1]
fi = 1 MHz; CL = 0.1 nF; RL = 1 MΩ; Vgen = 0 V;
Rgen = 0 Ω; see Figure 30
fi is biased at 0.5VCC.
NX3L4684_4
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 04 — 24 March 2010
15 of 24
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
12.3 Test circuits
VCC
0.5VCC
RL
nS
VIL or VIH
switch
nS
1
VIL
2
VIH
nY0 1 switch
nY1 2
nZ
fi
D
GND
012aaa006
Fig 25. Test circuit for measuring total harmonic distortion
VCC
0.5VCC
RL
nS
VIL or VIH
nZ
nY0 1 switch
nY1 2
fi
switch
nS
1
VIL
2
VIH
dB
GND
012aaa007
Adjust fi voltage to obtain 0 dBm level at output. Increase fi frequency until dB meter reads −3 dB.
Fig 26. Test circuit for measuring the frequency response when channel is in ON-state
0.5VCC
VCC
0.5VCC
RL
RL
nS
VIL or VIH
nY0 1 switch
nY1 2
nZ
fi
switch
nS
1
VIH
2
VIL
dB
GND
012aaa008
Adjust fi voltage to obtain 0 dBm level at input.
Fig 27. Test circuit for measuring isolation (OFF-state)
NX3L4684_4
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 04 — 24 March 2010
16 of 24
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
switch
nS
1
VIL
2
VIH
VCC
VI
logic
input
G
nS
nY0 1
nZ
nY1 2
switch
RL
RL
0.5VCC
0.5VCC
CL
V
VO
012aaa009
a. Test circuit
logic
input (nS)
off
on
off
Vct
VO
012aaa010
b. Input and output pulse definitions
Fig 28. Test circuit for measuring crosstalk voltage between digital inputs and switch
0.5VCC
1S
VIH
RL
1Y0 or 1Z
fi
1Z or 1Y0
CHANNEL
ON
50
CL
50 pF
V
VO1
V
VO2
0.5VCC
2S
VIL
RL
2Y0 or 2Z
Ri
50
2Z or 2Y0
CHANNEL
OFF
CL
50 pF
001aaj088
20 log10 (VO2 / VO1) or 20 log10 (VO1 / VO2).
Fig 29. Test circuit for measuring crosstalk between switches
NX3L4684_4
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 04 — 24 March 2010
17 of 24
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
VCC
nS
nY0 1
nZ
nY1 2
switch
Rgen
VI
G
VO
RL
CL
Vgen
GND
012aaa011
a. Test circuit.
logic
(nS) off
input
on
VO
off
ΔVO
012aaa012
b. Input and output pulse definitions
Definition: Qinj = ΔVO × CL.
ΔVO = output voltage variation.
Rgen = generator resistance.
Vgen = generator voltage.
Fig 30. Test circuit for measuring charge injection
NX3L4684_4
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 04 — 24 March 2010
18 of 24
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
13. Package outline
XQFN10U: plastic extremely thin quad flat package; no leads; 10 terminals;
UTLP based; body 2 x 1.55 x 0.5 mm
A
B
D
SOT1049-2
terminal 1
index area
A
E
A1
detail X
e2
L
C
L1
e
v
w
5
4
M
M
y
y1 C
C A B
C
6
e1
b
3
7
e3
1/2 e1
2
8
1
9
terminal 1
index area
metal area
must not be soldered
10
X
0
2.5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
mm
max
nom
min
A
A1
b
D
E
e
e1
e2
e3
L
L1
v
w
y
y1
0.50
0.05
0.03
0.00
0.30
0.23
0.15
1.65
1.55
1.45
2.1
2.0
1.9
0.58
0.5
1.16
1.5
0.4
0.3
0.2
0.15
0.08
0.00
0.1
0.05
0.1
0.05
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
JEITA
SOT1049-2
---
MO-255
---
EUROPEAN
PROJECTION
ISSUE DATE
08-04-22
10-02-05
Fig 31. Package outline SOT1049-2 (XQFN10U)
NX3L4684_4
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 04 — 24 March 2010
19 of 24
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
HVSON10: plastic thermal enhanced very thin small outline package; no leads;
10 terminals; body 3 x 3 x 0.85 mm
SOT650-1
0
1
2 mm
scale
X
A
B
D
A
A1
E
c
detail X
terminal 1
index area
C
e1
terminal 1
index area
e
5
y
y1 C
v M C A B
w M C
b
1
L
Eh
6
10
Dh
DIMENSIONS (mm are the original dimensions)
UNIT
A(1)
max.
A1
b
c
D(1)
Dh
E(1)
Eh
e
e1
L
v
w
y
y1
mm
1
0.05
0.00
0.30
0.18
0.2
3.1
2.9
2.55
2.15
3.1
2.9
1.75
1.45
0.5
2
0.55
0.30
0.1
0.05
0.05
0.1
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
JEITA
SOT650-1
---
MO-229
---
EUROPEAN
PROJECTION
ISSUE DATE
01-01-22
02-02-08
Fig 32. Package outline SOT650-1 (HVSON10)
NX3L4684_4
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 04 — 24 March 2010
20 of 24
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
14. Abbreviations
Table 13.
Abbreviations
Acronym
Description
CDM
Charged Device Model
CMOS
Complementary Metal-Oxide Semiconductor
ESD
ElectroStatic Discharge
HBM
Human Body Model
MM
Machine Model
PDA
Personal Digital Assistant
15. Revision history
Table 14.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
NX3L4684_4
20100324
Product data sheet
-
NX3L4684_3
NX3L4684_3
20100209
Product data sheet
-
NX3L4684_2
Modifications:
•
Table 8: ON resistance (flatness) for pins nY0 and nY1 changed at VCC = 4.3 V.
NX3L4684_2
20090401
Product data sheet
-
NX3L4684_1
NX3L4684_1
20081127
Product data sheet
-
-
NX3L4684_4
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 04 — 24 March 2010
21 of 24
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
16. Legal information
16.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
16.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
16.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use in automotive applications — This NXP
Semiconductors product has been qualified for use in automotive
applications. The product is not designed, authorized or warranted to be
suitable for use in medical, military, aircraft, space or life support equipment,
nor in applications where failure or malfunction of an NXP Semiconductors
product can reasonably be expected to result in personal injury, death or
severe property or environmental damage. NXP Semiconductors accepts no
liability for inclusion and/or use of NXP Semiconductors products in such
equipment or applications and therefore such inclusion and/or use is at the
customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on a weakness or default in the
customer application/use or the application/use of customer’s third party
customer(s) (hereinafter both referred to as “Application”). It is customer’s
sole responsibility to check whether the NXP Semiconductors product is
suitable and fit for the Application planned. Customer has to do all necessary
testing for the Application in order to avoid a default of the Application and the
product. NXP Semiconductors does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
16.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
NX3L4684_4
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 04 — 24 March 2010
22 of 24
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
17. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
NX3L4684_4
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 04 — 24 March 2010
23 of 24
NX3L4684
NXP Semiconductors
Dual low-ohmic single-pole double-throw analog switch
18. Contents
1
2
3
4
5
6
7
7.1
7.2
8
9
10
11
11.1
11.2
11.3
12
12.1
12.2
12.3
13
14
15
16
16.1
16.2
16.3
16.4
17
18
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
Pinning information . . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
Functional description . . . . . . . . . . . . . . . . . . . 4
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
Recommended operating conditions. . . . . . . . 4
Static characteristics. . . . . . . . . . . . . . . . . . . . . 5
Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
ON resistance . . . . . . . . . . . . . . . . . . . . . . . . . . 7
ON resistance test circuit and graphs. . . . . . . . 8
Dynamic characteristics . . . . . . . . . . . . . . . . . 12
Waveform and test circuits . . . . . . . . . . . . . . . 13
Additional dynamic characteristics . . . . . . . . . 15
Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 19
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 21
Legal information. . . . . . . . . . . . . . . . . . . . . . . 22
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 22
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Contact information. . . . . . . . . . . . . . . . . . . . . 23
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2010.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 24 March 2010
Document identifier: NX3L4684_4