PD - 95090A
IRLR3915PbF
IRLU3915PbF
AUTOMOTIVE MOSFET
HEXFET® Power MOSFET
Features
l
l
l
l
l
l
Advanced Process Technology
Ultra Low On-Resistance
175°C Operating Temperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
Lead-Free
D
VDSS = 55V
RDS(on) = 14mΩ
G
Description
ID = 30A
S
Specifically designed for Automotive applications,
this HEXFET® Power MOSFET utilizes the latest
processing techniques to achieve extremely low
on-resistance per silicon area. Additional features
of this product are a 175°C junction operating
temperature, fast switching speed and improved
repetitive avalanche rating. These features combine to make this design an extremely efficient and
reliable device for use in Automotive applications
and a wide variety of other applications.
I-Pak
D-Pak
IRLR3915PbF IRLU3915PbF
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
ID @ TC = 25°C
IDM
PD @TC = 25°C
VGS
EAS
EAS (6 sigma)
IAR
EAR
TJ
TSTG
Max.
Continuous Drain Current, VGS @ 10V (Silicon limited)
Continuous Drain Current, VGS @ 10V (See Fig.9)
Continuous Drain Current, VGS @ 10V (Package limited)
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Single Pulse Avalanche Energy Tested Value
Avalanche Current
Repetitive Avalanche Energy
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Units
61
43
30
240
120
0.77
± 16
200
600
See Fig.12a, 12b, 15, 16
A
W
W/°C
V
mJ
A
mJ
-55 to + 175
°C
300 (1.6mm from case )
Thermal Resistance
Parameter
RθJC
RθJA
RθJA
Junction-to-Case
Junction-to-Ambient (PCB mount)
Junction-to-Ambient–––
Typ.
Max.
Units
–––
–––
110
1.3
50
°C/W
HEXFET(R) is a registered trademark of International Rectifier.
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1
12/7/04
IRLR/U3915PbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
RDS(on)
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Min.
55
–––
–––
–––
1.0
42
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
0.057
12
14
–––
–––
–––
–––
–––
–––
61
9.0
17
7.4
51
83
100
VGS(th)
gfs
Gate Threshold Voltage
Forward Transconductance
IDSS
Drain-to-Source Leakage Current
LD
Internal Drain Inductance
–––
4.5
LS
Internal Source Inductance
–––
7.5
Ciss
Coss
Crss
Coss
Coss
Coss eff.
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
–––
–––
–––
–––
–––
–––
1870
390
74
2380
290
540
V(BR)DSS
∆V(BR)DSS/∆TJ
IGSS
Max. Units
Conditions
–––
V
VGS = 0V, ID = 250µA
––– V/°C Reference to 25°C, ID = 1mA
14
VGS = 10V, ID = 30A
mΩ
17
VGS = 5.0V, ID = 26A
3.0
V
VDS = 10V, ID = 250µA
–––
S
VDS = 25V, ID = 30A
20
VDS = 55V, VGS = 0V
µA
250
VDS = 55V, VGS = 0V, TJ = 125°C
200
VGS = 16V
nA
-200
VGS = -16V
92
ID = 30A
14
nC
VDS = 44V
25
VGS = 10V
–––
VDD = 28V
ns
–––
ID = 30A
–––
RG = 8.5Ω
–––
VGS = 10V
D
Between lead,
–––
nH
6mm (0.25in.)
G
from package
–––
and center of die contact
S
–––
VGS = 0V
–––
VDS = 25V
–––
pF
ƒ = 1.0MHz, See Fig. 5
–––
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 44V, ƒ = 1.0MHz
–––
VGS = 0V, VDS = 0V to 44V
Source-Drain Ratings and Characteristics
IS
ISM
VSD
trr
Qrr
ton
2
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
––– –––
61
showing the
A
G
integral reverse
––– ––– 240
p-n junction diode.
S
––– ––– 1.3
V
TJ = 25°C, IS = 30A, VGS = 0V
––– 62
93
ns
TJ = 25°C, IF = 30A, VDD = 25xjkl V
––– 110 170
nC
di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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IRLR/U3915PbF
1000
TOP
1000
100
BOTTOM
10
VGS
15V
10V
5.0V
3.0V
2.7V
2.5V
2.25V
2.0V
1
2.0V
0.1
0.01
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
10000
100
BOTTOM
10
2.0V
1
20µs PULSE WIDTH
Tj = 175°C
20µs PULSE WIDTH
Tj = 25°C
0.001
0.1
0.1
1
10
100
0.1
1000
1
10
100
1000
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
70
T J = 25°C
G fs , Forward Transconductance (S)
1000.00
ID, Drain-to-Source Current (Α)
VGS
15V
10V
5.0V
3.0V
2.7V
2.5V
2.25V
2.0V
T J = 175°C
100.00
10.00
1.00
VDS = 25V
20µs PULSE WIDTH
0.10
1.0
3.0
5.0
7.0
9.0
11.0
13.0
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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60
T J = 25°C
50
40
TJ = 175°C
30
20
10
0
15.0
0
10
20
30
40
50
60
ID,Drain-to-Source Current (A)
Fig 4. Typical Forward Transconductance
vs. Drain Current
3
IRLR/U3915PbF
100000
I D = 30A
10
VGS , Gate-to-Source Voltage (V)
Ciss
1000
Coss
100
VDS = 11V
Crss
8
6
4
2
10
0
1
10
0
100
20
30
40
50
60
70
Fig 6. Typical Gate Charge vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance vs.
Drain-to-Source Voltage
1000
ID, Drain-to-Source Current (A)
1000
100
I SD , Reverse Drain Current (A)
10
QG, Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)
OPERATION IN THIS AREA
LIMITED BY R DS (on)
100
TJ = 175
10
°C
TJ = 25
°C
1
V GS = 0 V
0.1
0.0
0.5
1.0
1.5
V SD,Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
VDS = 44V
VDS = 27V
Coss = Cds + Cgd
10000
C, Capacitance(pF)
12
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
100µsec
10
1msec
Tc = 25°C
Tj = 175°C
Single Pulse
10msec
1
2.0
1
10
100
1000
VDS, Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRLR/U3915PbF
70
2.5
LIMITED BY PACKAGE
I D = 61A
60
I D , Drain Current (A)
40
30
20
10
0
25
50
75
100
125
150
175
(Normalized)
RDS(on) , Drain-to-Source On Resistance
2.0
50
1.5
1.0
0.5
V GS = 10V
0.0
-60
-40
-20
0
20
40
60
80
100 120 140 160 180
( ° C)
TJ , Junction Temperature
TC , Case Temperature ( °C)
Fig 10. Normalized On-Resistance
vs. Temperature
Fig 9. Maximum Drain Current vs.
Case Temperature
(Z thJC )
10
1
Thermal Response
D = 0.50
0.20
0.10
0.1
P DM
0.05
0.02
0.01
t1
SINGLE PULSE
(THERMAL RESPONSE)
t2
Notes:
1. Duty factor D =
2. Peak T
0.01
0.00001
0.0001
0.001
0.01
t1 / t 2
J = P DM x Z thJC
+TC
0.1
1
t1, Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRLR/U3915PbF
500
15V
20V
VGS
+
V
- DD
IAS
E AS , Single Pulse Avalanche Energy (mJ)
D.U.T
RG
400
DRIVER
L
VDS
A
0.01Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
TOP
ID
12A
21A
BOTTOM
30A
300
200
100
0
25
50
75
100
Starting Tj, Junction Temperature
I AS
125
150
175
( ° C)
Fig 12c. Maximum Avalanche Energy
vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
QG
QGS
QGD
2.0
VG
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
12V
.2µF
.3µF
D.U.T.
+
V
- DS
VGS(th) Gate threshold Voltage (V)
10 V
1.5
ID = 250µA
1.0
0.5
VGS
-75 -50 -25
3mA
0
25
50
75 100 125 150 175 200
T J , Temperature ( °C )
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
6
Fig 14. Threshold Voltage vs. Temperature
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IRLR/U3915PbF
Avalanche Current (A)
1000
Duty Cycle = Single Pulse
100
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming ∆ Tj = 25°C due to
avalanche losses
0.01
0.05
10
0.10
1
0.1
1.0E-08
1.0E-07
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current vs.Pulsewidth
220
TOP
Single Pulse
BOTTOM 10% Duty Cycle
ID = 30A
EAR , Avalanche Energy (mJ)
200
180
160
140
120
100
80
60
40
20
0
25
50
75
100
125
150
Starting T J , Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy
vs. Temperature
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Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of T jmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asT jmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
175
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav ) = Transient thermal resistance, see figure 11)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
7
IRLR/U3915PbF
D.U.T
Driver Gate Drive
P.W.
+
+
-
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
+
RG
•
•
•
•
dv/dt controlled by RG
Driver same type as D.U.T.
I SD controlled by Duty Factor "D"
D.U.T. - Device Under Test
P.W.
Period
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D=
Period
V DD
+
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
-
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
VDS
V GS
RG
RD
D.U.T.
+
-V DD
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 18a. Switching Time Test Circuit
VDS
90%
10%
VGS
td(on)
tr
t d(off)
tf
Fig 18b. Switching Time Waveforms
8
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IRLR/U3915PbF
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
D-Pak (TO-252AA) Part Marking Information
EXAMPLE: T HIS IS AN IRFR120
WITH AS S EMBLY
LOT CODE 1234
AS S EMBLED ON WW 16, 1999
IN THE AS S EMBLY LINE "A"
PART NUMBER
INTERNATIONAL
RECTIFIER
LOGO
Note: "P" in as sembly line pos ition
indicates "Lead-Free"
IRFU120
12
916A
34
AS S EMBLY
LOT CODE
DAT E CODE
YEAR 9 = 1999
WEEK 16
LINE A
OR
INT ERNAT IONAL
RECT IFIER
LOGO
PART NUMBER
IRFU120
12
AS S EMBLY
LOT CODE
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34
DATE CODE
P = DES IGNAT ES LEAD-FREE
PRODUCT (OPT IONAL)
YEAR 9 = 1999
WEEK 16
A = AS S EMBLY S ITE CODE
9
IRLR/U3915PbF
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
I-Pak (TO-251AA) Part Marking Information
EXAMPLE: T HIS IS AN IRFU120
WIT H AS S EMBLY
LOT CODE 5678
AS S EMBLED ON WW 19, 1999
IN T HE AS S EMBLY LINE "A"
INT ERNAT IONAL
RECT IFIER
LOGO
PART NUMBER
IRF U120
919A
56
78
AS S EMBLY
LOT CODE
Note: "P" in assembly line
position indicates "Lead-Free"
DAT E CODE
YEAR 9 = 1999
WEEK 19
LINE A
OR
INT ERNAT IONAL
RECT IFIER
LOGO
PART NUMBER
IRFU120
56
AS S EMBLY
LOT CODE
10
78
DAT E CODE
P = DES IGNAT ES LEAD-FREE
PRODUCT (OPT IONAL)
YEAR 9 = 1999
WEEK 19
A = AS S EMBLY S IT E CODE
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IRLR/U3915PbF
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRR
TRL
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
FEED DIRECTION
16.3 ( .641 )
15.7 ( .619 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
Limited by TJmax, starting TJ = 25°C,
L = 0.45mH, RG = 25Ω, IAS = 30A, VGS =10V.
Part not recommended for use above this
value.
ISD ≤ 30A, di/dt ≤ 280A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C.
Pulse width ≤ 1.0ms; duty cycle ≤ 2%.
Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS .
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive
avalanche performance.
This value determined from sample failure population. 100%
tested to this value in production.
When mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to
application note #AN-994.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Automotive [Q101] market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 12/04
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11