PD - 95880
IRF3805
IRF3805S
IRF3805L
AUTOMOTIVE MOSFET
Features
l
l
l
l
l
HEXFET® Power MOSFET
Advanced Process Technology
Ultra Low On-Resistance
175°C Operating Temperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
D
VDSS = 55V
RDS(on) = 3.3mΩ
G
Description
Specifically designed for Automotive applications,
this HEXFET® Power MOSFET utilizes the latest
processing techniques to achieve extremely low onresistance per silicon area. Additional features of
this design are a 175°C junction operating temperature, fast switching speed and improved repetitive
avalanche rating . These features combine to make
this design an extremely efficient and reliable device
for use in Automotive applications and a wide variety
of other applications.
ID = 75A
S
D2Pak
IRF3805S
TO-220AB
IRF3805
TO-262
IRF3805L
Absolute Maximum Ratings
ID @ TC = 25°C
ID @ TC = 100°C
ID @ TC = 25°C
IDM
PD @TC = 25°C
VGS
EAS (Thermally limited)
EAS (Tested )
IAR
EAR
TJ
TSTG
Parameter
Max.
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V (Package limited)
Pulsed Drain Current
220
160
75
890
130
W
2.2
± 20
W/°C
V
730
940
See Fig.12a, 12b, 15, 16
mJ
c
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Single Pulse Avalanche Energy Tested Value
Avalanche Current
Repetitive Avalanche Energy
d
c
Operating Junction and
Storage Temperature Range
g
Parameter
Junction-to-Case
RθCS
Case-to-Sink, Flat Greased Surface
RθJA
Junction-to-Ambient
RθJA
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i
A
mJ
°C
i
RθJC
A
-55 to + 175
Soldering Temperature, for 10 seconds
Mounting Torque, 6-32 or M3 screw
Thermal Resistance
h
Units
i
Junction-to-Ambient (PCB Mount) j
300 (1.6mm from case )
10 lbf in (1.1N m)
y
y
Typ.
Max.
Units
–––
0.45
°C/W
0.50
–––
–––
62
–––
40
1
10/21/04
IRF3805/S/L
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
V(BR)DSS
Drain-to-Source Breakdown Voltage
55
–––
–––
∆V(BR)DSS/∆TJ
Breakdown Voltage Temp. Coefficient
–––
0.051
–––
RDS(on)
Static Drain-to-Source On-Resistance
–––
2.6
3.3
VGS(th)
Gate Threshold Voltage
2.0
–––
4.0
V
Conditions
VGS = 0V, ID = 250µA
V/°C Reference to 25°C, ID = 1mA
mΩ VGS = 10V, ID = 75A
e
V
VDS = VGS, ID = 250µA
gfs
Forward Transconductance
75
–––
–––
V
VDS = 25V, ID = 75A
IDSS
Drain-to-Source Leakage Current
–––
–––
20
µA
VDS = 55V, VGS = 0V
–––
–––
250
–––
–––
200
nA
VGS = 20V
IGSS
Gate-to-Source Forward Leakage
VDS = 55V, VGS = 0V, TJ = 125°C
VGS = -20V
Gate-to-Source Reverse Leakage
–––
–––
-200
Qg
Total Gate Charge
–––
190
290
Qgs
Gate-to-Source Charge
–––
52
–––
Qgd
Gate-to-Drain ("Miller") Charge
–––
72
–––
VGS = 10V
td(on)
Turn-On Delay Time
–––
150
–––
VDD = 28V
tr
Rise Time
–––
20
–––
td(off)
Turn-Off Delay Time
–––
93
–––
tf
Fall Time
–––
87
–––
VGS = 10V
LD
Internal Drain Inductance
–––
4.5
–––
Between lead,
LS
Internal Source Inductance
–––
7.5
–––
6mm (0.25in.)
from package
Ciss
Input Capacitance
–––
7960
–––
and center of die contact
VGS = 0V
Coss
Output Capacitance
–––
1260
–––
Crss
Reverse Transfer Capacitance
–––
630
–––
Coss
Output Capacitance
–––
4400
–––
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
Coss
Output Capacitance
–––
980
–––
VGS = 0V, VDS = 44V, ƒ = 1.0MHz
Coss eff.
Effective Output Capacitance
–––
1550
–––
VGS = 0V, VDS = 0V to 44V
ID = 75A
nC
VDS = 44V
e
ID = 75A
ns
nH
RG = 2.6 Ω
e
VDS = 25V
pF
ƒ = 1.0MHz
f
Source-Drain Ratings and Characteristics
Parameter
Min. Typ. Max. Units
IS
Continuous Source Current
–––
–––
75
ISM
(Body Diode)
Pulsed Source Current
–––
–––
890
VSD
(Body Diode)
Diode Forward Voltage
–––
–––
1.3
V
trr
Reverse Recovery Time
–––
36
54
ns
Qrr
Reverse Recovery Charge
–––
47
71
nC
ton
Forward Turn-On Time
2
c
Conditions
MOSFET symbol
A
showing the
integral reverse
p-n junction diode.
TJ = 25°C, IS = 75A, VGS = 0V
TJ = 25°C, IF = 75A, VDD = 28V
di/dt = 100A/µs
e
e
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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IRF3805/S/L
1000
1000
100
BOTTOM
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
4.5V
10
BOTTOM
100
4.5V
≤ 60µs PULSE WIDTH
Tj = 25°C
10
1
0.1
1
10
0.1
100
1
≤ 60µs PULSE WIDTH
Tj = 175°C
10
100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000.0
200
Gfs, Forward Transconductance (S)
ID, Drain-to-Source Current(Α)
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
TJ = 175°C
100.0
10.0
TJ = 25°C
1.0
VDS = 20V
≤ 60µs PULSE WIDTH
TJ = 25°C
160
TJ = 175°C
120
80
40
VDS = 10V
380µs PULSE WIDTH
0.1
4.0
5.0
6.0
7.0
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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8.0
0
0
20
40
60
80 100 120 140 160 180
ID, Drain-to-Source Current (A)
Fig 4. Typical Forward Transconductance
Vs. Drain Current
3
IRF3805/S/L
14000
ID= 75A
VGS, Gate-to-Source Voltage (V)
12000
C, Capacitance (pF)
20
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
10000
Ciss
8000
6000
4000
Coss
2000
Crss
VDS= 28V
16
12
8
4
0
0
1
10
0
100
100
150
200
250
300
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000.0
10000
TJ = 175°C
ID, Drain-to-Source Current (A)
ISD , Reverse Drain Current (A)
50
QG Total Gate Charge (nC)
VDS , Drain-to-Source Voltage (V)
100.0
10.0
TJ = 25°C
1.0
OPERATION IN THIS AREA
LIMITED BY R DS (on)
1000
100
100µsec
10
1
Tc = 25°C
Tj = 175°C
Single Pulse
VGS = 0V
1msec
10msec
0.1
0.1
0.0
0.4
0.8
1.2
1.6
2.0
VSD , Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
VDS = 44V
2.4
1
10
100
1000
VDS , Drain-toSource Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRF3805/S/L
2.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
240
LIMITED BY PACKAGE
ID , Drain Current (A)
200
160
120
80
40
0
25
50
75
100
125
150
ID = 75A
VGS = 10V
1.5
1.0
0.5
175
-60 -40 -20
TC , Case Temperature (°C)
0
20 40 60 80 100 120 140 160 180
TJ , Junction Temperature (°C)
Fig 10. Normalized On-Resistance
Vs. Temperature
Fig 9. Maximum Drain Current Vs.
Case Temperature
1
Thermal Response ( Z thJC )
D = 0.50
0.1
0.20
0.10
0.05
0.01
0.02
0.01
τJ
R1
R1
τJ
τ1
R2
R2
τ2
τ1
τC
τ
τ2
Ri (°C/W) τi (sec)
0.11
0.001016
0.097
0.012816
Ci= τi/Ri
Ci i/Ri
0.001
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
0.0001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRF3805/S/L
D.U.T
RG
VGS
20V
DRIVER
L
VDS
+
V
- DD
IAS
A
0.01Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
EAS, Single Pulse Avalanche Energy (mJ)
1600
15V
ID
15A
20A
BOTTOM 75A
TOP
1200
800
400
0
25
50
75
100
125
150
175
Starting TJ, Junction Temperature (°C)
I AS
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
QG
QGS
QGD
4.5
VG
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
12V
.2µF
.3µF
D.U.T.
+
V
- DS
VGS(th) Gate threshold Voltage (V)
10 V
4.0
ID = 250µA
3.5
3.0
2.5
2.0
1.5
-75
VGS
-50 -25
0
25
50
75
100 125 150 175
TJ , Temperature ( °C )
3mA
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
6
Fig 14. Threshold Voltage Vs. Temperature
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IRF3805/S/L
10000
Avalanche Current (A)
Duty Cycle = Single Pulse
1000
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming ∆Tj = 25°C due to
avalanche losses. Note: In no
case should Tj be allowed to
exceed Tjmax
0.01
100
0.05
0.10
10
1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current Vs.Pulsewidth
EAR , Avalanche Energy (mJ)
800
TOP
Single Pulse
BOTTOM 1% Duty Cycle
ID = 75A
600
400
200
0
25
50
75
100
125
150
Starting TJ , Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy
Vs. Temperature
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Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
175
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see figure 11)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
7
IRF3805/S/L
D.U.T
Driver Gate Drive
+
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
+
RG
•
•
•
•
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
P.W.
Period
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
-
D=
Period
P.W.
+
VDD
+
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
-
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
VDS
VGS
RG
RD
D.U.T.
+
-VDD
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 18a. Switching Time Test Circuit
VDS
90%
10%
VGS
td(on)
tr
t d(off)
tf
Fig 18b. Switching Time Waveforms
8
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IRF3805/S/L
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
2.87 (.113)
2.62 (.103)
10.54 (.415)
10.29 (.405)
-B-
3.78 (.149)
3.54 (.139)
4.69 (.185)
4.20 (.165)
-A-
1.32 (.052)
1.22 (.048)
6.47 (.255)
6.10 (.240)
4
15.24 (.600)
14.84 (.584)
1.15 (.045)
MIN
1
2
3
14.09 (.555)
13.47 (.530)
4.06 (.160)
3.55 (.140)
3X
3X
LEAD ASSIGNMENTS
1 - GATE
2 - DRAIN
3 - SOURCE
4 - DRAIN
1.40 (.055)
1.15 (.045)
0.93 (.037)
0.69 (.027)
0.36 (.014)
3X
M
B A M
0.55 (.022)
0.46 (.018)
2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
2 CONTROLLING DIMENSION : INCH
3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
TO-220AB Part Marking Information
E XAMPL E : T HIS IS AN IR F 1010
L OT CODE 1789
AS S E MB L E D ON WW 19, 1997
IN T H E AS S E MB L Y L INE "C"
Note: "P" in assembly line
position indicates "Lead-Free"
INT E R NAT IONAL
R E CT IF IE R
L OGO
AS S E MB L Y
L OT CODE
www.irf.com
PAR T NU MB E R
DAT E CODE
YE AR 7 = 1997
WE E K 19
L INE C
9
IRF3805/S/L
D2Pak Package Outline (Dimensions are shown in millimeters (inches))
D2Pak Part Marking Information
T HIS IS AN IRF530S WIT H
LOT CODE 8024
AS S EMBLED ON WW 02, 2000
IN T HE AS S EMBLY LINE "L"
Note: "P" in assembly line
position indicates "Lead-Free"
OR
INT ERNAT IONAL
RECT IFIER
LOGO
DAT E CODE
YEAR 0 = 2000
WEEK 02
LINE L
AS S EMBLY
LOT CODE
INT ERNAT IONAL
RECT IFIER
LOGO
AS S EMBLY
LOT CODE
10
PART NUMBER
F530S
PART NUMBER
F530S
DAT E CODE
P = DES IGNAT ES LEAD-FREE
PRODUCT (OPT IONAL)
YEAR 0 = 2000
WEEK 02
A = AS S EMBLY S IT E CODE
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IRF3805/S/L
TO-262 Package Outline (Dimensions are shown in millimeters (inches))
IGBT
1- GATE
2- COLLECTOR
3- EMITTER
4- COLLECTOR
TO-262 Part Marking Information
EXAMPLE: T HIS IS AN IRL3103L
LOT CODE 1789
ASS EMBLED ON WW 19, 1997
IN T HE ASS EMBLY LINE "C"
Note: "P" in assembly line
pos ition indicates "Lead-Free"
INT ERNAT IONAL
RECT IFIER
LOGO
ASS EMBLY
LOT CODE
PART NUMBER
DAT E CODE
YEAR 7 = 1997
WEEK 19
LINE C
OR
INT ERNAT IONAL
RECT IFIER
LOGO
AS SEMBLY
LOT CODE
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PART NUMBER
DAT E CODE
P = DESIGNAT ES LEAD-FREE
PRODUCT (OPTIONAL)
YEAR 7 = 1997
WEEK 19
A = ASS EMBLY SITE CODE
11
IRF3805/S/L
D2Pak Tape & Reel Information
TRR
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
FEED DIRECTION 1.85 (.073)
1.65 (.065)
1.60 (.063)
1.50 (.059)
11.60 (.457)
11.40 (.449)
0.368 (.0145)
0.342 (.0135)
15.42 (.609)
15.22 (.601)
24.30 (.957)
23.90 (.941)
TRL
10.90 (.429)
10.70 (.421)
1.75 (.069)
1.25 (.049)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
60.00 (2.362)
MIN.
26.40 (1.039)
24.40 (.961)
3
30.40 (1.197)
MAX.
4
Notes:
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive
max. junction temperature. (See fig. 11).
avalanche performance.
Limited by TJmax, starting TJ = 25°C, L = 0.26mH This value determined from sample failure population. 100%
RG = 25Ω, IAS = 75A, VGS =10V. Part not
tested to this value in production.
recommended for use above this value.
This is only applied to TO-220AB pakcage.
Pulse width ≤ 1.0ms; duty cycle ≤ 2%.
This is applied to D2Pak, when mounted on 1" square PCB (FR Coss eff. is a fixed capacitance that gives the
4 or G-10 Material). For recommended footprint and soldering
same charging time as Coss while VDS is rising
techniques refer to application note #AN-994.
from 0 to 80% VDSS .
Repetitive rating; pulse width limited by
TO-220AB package is not recommended for Surface Mount Application.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Automotive [Q101]market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 10/04
12
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