BUK754R0-55B; BUK764R0-55B N-channel TrenchMOS standard level FET Rev. 04 — 4 October 2007 Product data sheet 1. Product profile 1.1 General description N-channel enhancement mode power Field-Effect Transistor (FET) in a plastic package using NXP High-Performance Automotive (HPA) TrenchMOS technology. 1.2 Features n Very low on-state resistance n 175 °C rated n Q101 compliant n Standard level compatible 1.3 Applications n Automotive systems n Motors, lamps and solenoids n General purpose power switching n 12 V and 24 V loads 1.4 Quick reference data n EDS(AL)S ≤ 1.2 J n ID ≤ 75 A n RDSon = 3.4 mΩ (typ) n Ptot ≤ 300 W 2. Pinning information Table 1. Pinning Pin Description 1 gate (G) 2 drain (D) 3 source (S) mb mounting base; connected to drain (D) Simplified outline Symbol D mb mb G mbb076 2 123 03ab54 SOT78A (TO-220AB) 1 3 SOT404 (D2PAK) S BUK754R0-55B; BUK764R0-55B NXP Semiconductors N-channel TrenchMOS standard level FET 3. Ordering information Table 2. Ordering information Type number Package Name Description Version BUK754R0-55B SC-46 plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB SOT78A BUK764R0-55B D2PAK plastic single-ended surface-mounted package (D2PAK); 3 leads (one lead cropped) SOT404 4. Limiting values Table 3. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDS drain-source voltage VDGR drain-gate voltage (DC) VGS gate-source voltage drain current ID Conditions RGS = 20 kΩ Min Max Unit - 55 V - 55 V - ±20 V [1][3] - 193 A see Figure 2 and 3 [2] - 75 A Tmb = 100 °C; VGS = 10 V; see Figure 2 [2] - 75 A Tmb = 25 °C; VGS = 10 V; IDM peak drain current Tmb = 25 °C; pulsed; tp ≤ 10 µs; see Figure 3 - 774 A Ptot total power dissipation Tmb = 25 °C; see Figure 1 - 300 W Tstg storage temperature −55 +175 °C Tj junction temperature −55 +175 °C Source-drain diode reverse drain current IDR IDRM peak reverse drain current Tmb = 25 °C [1][2] - 193 A [2] - 75 A Tmb = 25 °C; pulsed; tp ≤ 10 µs - 774 A unclamped inductive load; ID = 75 A; VDS ≤ 55 V; RGS = 50 Ω; VGS = 10 V; starting at Tj = 25 °C - 1.2 J - - J Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy EDS(AL)R repetitive drain-source avalanche energy [1] Current is limited by chip power dissipation rating. [2] Continuous current is limited by package. [4] [3] Refer to document 9397 750 12572 for further information. [4] Conditions: a) Maximum value not quoted. Repetitive rating defined in Figure 16. b) Single-pulse avalanche rating limited by Tj(max) of 175 °C. c) Repetitive avalanche rating limited by an average junction temperature of 170 °C. d) Refer to application note AN10273 for further information. BUK75_764R0-55B_4 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 04 — 4 October 2007 2 of 14 BUK754R0-55B; BUK764R0-55B NXP Semiconductors N-channel TrenchMOS standard level FET 03na19 120 001aaf871 200 ID (A) Pder (%) 150 80 100 (1) 40 50 0 0 0 50 100 150 200 25 75 125 Tmb (°C) 175 Tmb (°C) VGS ≥ 10 V P tot P der = ------------------------ × 100 % P tot ( 25°C ) (1) Capped at 75 A due to package. Fig 1. Normalized total power dissipation as a function of mounting base temperature Fig 2. Continuous drain current as a function of mounting base temperature 03ng55 103 tp = 10 µ s ID (A) Limit RDSon = VDS / ID 102 100 µ s (1) 1 ms DC 10 ms 10 100 ms 1 10-1 1 10 102 VDS (V) Tmb = 25 °C; IDM is single pulse (1) Capped at 75 A due to package. Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage BUK75_764R0-55B_4 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 04 — 4 October 2007 3 of 14 BUK754R0-55B; BUK764R0-55B NXP Semiconductors N-channel TrenchMOS standard level FET 5. Thermal characteristics Table 4. Thermal characteristics Symbol Parameter Rth(j-mb) thermal resistance from junction to mounting base Rth(j-a) thermal resistance from junction to ambient Conditions Min Typ Max Unit - - 0.5 K/W SOT78A (TO-220AB) vertical in free air - 60 - K/W SOT404 (D2PAK) mounted on a printed-circuit board; minimum footprint - 50 - K/W 03ng56 1 Zth(j-mb) (K/W) 10-1 δ = 0.5 0.2 0.1 0.05 10-2 δ= P 0.02 single shot tp T t tp T 10-3 10-6 10-5 10-4 10-3 10-2 10-1 tp (s) 1 Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration BUK75_764R0-55B_4 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 04 — 4 October 2007 4 of 14 NXP Semiconductors BUK754R0-55B; BUK764R0-55B N-channel TrenchMOS standard level FET 6. Characteristics Table 5. Characteristics Tj = 25 °C unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit Tj = 25 °C 55 - - V Tj = −55 °C 50 - - V Static characteristics V(BR)DSS VGS(th) IDSS drain-source breakdown voltage gate-source threshold voltage drain leakage current ID = 250 µA; VGS = 0 V ID = 1 mA; VDS = VGS; see Figure 9 Tj = 25 °C 2 3 4 V Tj = 175 °C 1 - - V Tj = −55 °C - - 4.4 V VDS = 55 V; VGS = 0 V Tj = 25 °C - 0.02 1 µA Tj = 175 °C - - 500 µA - 2 100 nA Tj = 25 °C - 3.4 4.0 mΩ Tj = 175 °C - - 8 mΩ IGSS gate leakage current VGS = ±20 V; VDS = 0 V RDSon drain-source on-state resistance VGS = 10 V; ID = 25 A; see Figure 6 and 8 Dynamic characteristics QG(tot) total gate charge QGS gate-source charge QGD gate-drain charge Ciss input capacitance Coss output capacitance Crss reverse transfer capacitance td(on) turn-on delay time tr rise time ID = 25 A; VDD = 44 V; VGS = 10 V; see Figure 14 VGS = 0 V; VDS = 25 V; f = 1 MHz; see Figure 12 VDS = 30 V; RL = 1.2 Ω; VGS = 10 V; RG = 10 Ω - 86 - nC - 18 - nC - 25 - nC - 5082 6776 pF - 1054 1265 pF - 450 617 pF - 23 - ns - 51 - ns td(off) turn-off delay time - 71 - ns tf fall time - 41 - ns LD internal drain inductance from drain lead 6 mm from package to center of die - 4.5 - nH from contact screw on mounting base to center of die SOT78A - 3.5 - nH from upper edge of drain mounting base to center of die SOT404 - 2.5 - nH from source lead to source bonding pad - 7.5 - nH LS internal source inductance Source-drain diode VSD source-drain voltage IS = 40 A; VGS = 0 V; see Figure 15 - 0.85 1.2 V trr reverse recovery time - 95 - ns Qr recovered charge IS = 20 A; dIS/dt = −100 A/µs; VGS = −10 V; VR = 30 V - 251 - nC BUK75_764R0-55B_4 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 04 — 4 October 2007 5 of 14 BUK754R0-55B; BUK764R0-55B NXP Semiconductors N-channel TrenchMOS standard level FET 03nh22 300 ID 20 (A) 10 250 7 6.5 03nh21 7 RDSon (m Ω) 6 6 5.5 200 150 5 5 100 4.5 4 50 VGS (V) = 4 0 3 0 2 4 6 8 VDS (V) 10 5 Tj = 25 °C 10 15 VGS (V) 20 Tj = 25 °C; ID = 25 A Fig 5. Output characteristics: drain current as a function of drain-source voltage; typical values Fig 6. Drain-source on-state resistance as a function of gate-source voltage; typical values 03nh23 7 RDSon (m Ω) 03ne89 2 a VGS (V) = 6 6 6.5 1.5 7 1 5 8 10 0.5 4 3 0 50 100 150 200 250 300 ID (A) Tj = 25 °C 0 -60 60 120 Tj (°C) 180 R DSon a = ----------------------------R DSon ( 25°C ) Fig 7. Drain-source on-state resistance as a function of drain current; typical values Fig 8. Normalized drain-source on-state resistance factor as a function of junction temperature BUK75_764R0-55B_4 Product data sheet 0 © NXP B.V. 2007. All rights reserved. Rev. 04 — 4 October 2007 6 of 14 BUK754R0-55B; BUK764R0-55B NXP Semiconductors N-channel TrenchMOS standard level FET 03aa32 5 03aa35 10−1 ID (A) VGS(th) (V) 4 3 2 min 10−2 max typ 10−3 min 10−4 typ max 10−5 1 0 −60 0 60 120 10−6 180 0 Tj (°C) 2 4 6 VGS (V) Tj = 25 °C; VDS = VGS ID = 1 mA; VDS = VGS Fig 9. Gate-source threshold voltage as a function of junction temperature Fig 10. Sub-threshold drain current as a function of gate-source voltage 03nh19 120 gfs (S) 100 C (pF) 03nh24 7000 6000 Ciss 5000 80 4000 60 3000 40 Coss 2000 20 1000 0 0 20 40 ID (A) 60 Tj = 25 °C; VDS = 25 V 0 10-1 1 10 VDS (V) 102 VGS = 0 V; f = 1 MHz Fig 11. Forward transconductance as a function of drain current; typical values Fig 12. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values BUK75_764R0-55B_4 Product data sheet Crss © NXP B.V. 2007. All rights reserved. Rev. 04 — 4 October 2007 7 of 14 BUK754R0-55B; BUK764R0-55B NXP Semiconductors N-channel TrenchMOS standard level FET 03nh20 100 03nh18 10 ID (A) VGS (V) 80 8 60 6 VDS (V) = 14 40 VDS (V) = 44 4 Tj = 175 °C 20 2 Tj = 25 °C 0 0 0 2 4 6 VGS (V) 0 20 40 60 80 100 QG (nC) Tj = 25 °C; ID = 25 A VDS = 25 V Fig 13. Transfer characteristics: drain current as a function of gate-source voltage; typical values 03nh17 100 ID (A) Fig 14. Gate-source voltage as a function of gate charge; typical values 003aab677 102 IAL (A) 80 (1) 10 60 (2) 40 (3) 1 Tj = 175 °C 20 Tj = 25 °C 0 0.0 0.2 0.4 0.6 0.8 1.0 VSD (V) VGS = 0 V 10-1 10-3 10-2 10-1 1 tAL (ms) 10 See Table note 4 of Table 3 Limiting values. (1) Single-pulse; Tj = 25 °C. (2) Single-pulse; Tj = 150 °C. (3) Repetitive. Fig 15. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values Fig 16. Single-pulse and repetitive avalanche rating; avalanche current as a function of avalanche time BUK75_764R0-55B_4 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 04 — 4 October 2007 8 of 14 BUK754R0-55B; BUK764R0-55B NXP Semiconductors N-channel TrenchMOS standard level FET 7. Package outline Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB E SOT78A A A1 p q mounting base D1 D L2 L1(1) Q b1 L 1 2 3 c b e e 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 b b1 c D D1 E e L L1(1) L2 max. p q Q mm 4.5 4.1 1.39 1.27 0.9 0.6 1.3 1.0 0.7 0.4 15.8 15.2 6.4 5.9 10.3 9.7 2.54 15.0 13.5 3.30 2.79 3.0 3.8 3.6 3.0 2.7 2.6 2.2 Note 1. Terminals in this zone are not tinned. OUTLINE VERSION SOT78A REFERENCES IEC JEDEC JEITA 3-lead TO-220AB SC-46 EUROPEAN PROJECTION ISSUE DATE 03-01-22 05-03-14 Fig 17. Package outline SOT78A (TO-220AB) BUK75_764R0-55B_4 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 04 — 4 October 2007 9 of 14 BUK754R0-55B; BUK764R0-55B NXP Semiconductors N-channel TrenchMOS standard level FET SOT404 Plastic single-ended surface-mounted package (D2PAK); 3 leads (one lead cropped) A A1 E mounting base D1 D HD 2 Lp 1 3 c b e e Q 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 b c D max. D1 E e Lp HD Q mm 4.50 4.10 1.40 1.27 0.85 0.60 0.64 0.46 11 1.60 1.20 10.30 9.70 2.54 2.90 2.10 15.80 14.80 2.60 2.20 OUTLINE VERSION REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 05-02-11 06-03-16 SOT404 Fig 18. Package outline SOT404 (D2PAK) BUK75_764R0-55B_4 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 04 — 4 October 2007 10 of 14 BUK754R0-55B; BUK764R0-55B NXP Semiconductors N-channel TrenchMOS standard level FET 8. Soldering 10.85 10.60 10.50 1.50 7.50 7.40 1.70 2.25 2.15 8.15 8.275 8.35 1.50 4.60 0.30 4.85 5.40 7.95 8.075 3.00 0.20 1.20 1.30 1.55 solder lands solder resist 5.08 msd057 occupied area solder paste Fig 19. Reflow soldering footprint for SOT404 BUK75_764R0-55B_4 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 04 — 4 October 2007 11 of 14 BUK754R0-55B; BUK764R0-55B NXP Semiconductors N-channel TrenchMOS standard level FET 9. Revision history Table 6. Revision history Document ID Release date Data sheet status Change notice Supersedes BUK75_764R0-55B_4 20071004 Product data sheet - BUK75_764R0-55B_3 Product data sheet - BUK75_764R0_55B-02 Modifications: BUK75_764R0-55B_3 Modifications: • Figure 7 updated. 20070124 • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • • Legal texts have been adapted to the new company name where appropriate. Crss (typ) and (max) value in Section 6 “Characteristics” changed from 289 (typ) and 396 (max) to 450 (typ) and 617 (max). BUK75_764R0_55B-02 20020930 Product data sheet - BUK75_764R0_55B-01 BUK75_764R0_55B-01 20020328 Product data sheet - - BUK75_764R0-55B_4 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 04 — 4 October 2007 12 of 14 NXP Semiconductors BUK754R0-55B; BUK764R0-55B N-channel TrenchMOS standard level FET 10. Legal information 10.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 10.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 10.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of a NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 10.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. TrenchMOS — is a trademark of NXP B.V. 11. Contact information For additional information, please visit: http://www.nxp.com For sales office addresses, send an email to: [email protected] BUK75_764R0-55B_4 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 04 — 4 October 2007 13 of 14 NXP Semiconductors BUK754R0-55B; BUK764R0-55B N-channel TrenchMOS standard level FET 12. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 10 10.1 10.2 10.3 10.4 11 12 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description. . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 13 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Contact information. . . . . . . . . . . . . . . . . . . . . 13 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2007. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 4 October 2007 Document identifier: BUK75_764R0-55B_4