DISCRETE SEMICONDUCTORS DATA SHEET M3D173 PDTA114EE PNP resistor-equipped transistor Preliminary specification Supersedes data of 1997 Jul 03 File under Discrete Semiconductors, SC04 1998 Jul 23 Philips Semiconductors Preliminary specification PNP resistor-equipped transistor PDTA114EE FEATURES • Built-in bias resistors R1 and R2 (typ. 10 kΩ each) • Simplification of circuit design handbook, halfpage • Reduces number of components and board space. 3 3 R1 1 R2 APPLICATIONS 1 • Especially suitable for space reduction in interface and driver circuits Top view • Inverter circuit configurations without use of external resistors. 2 2 MAM345 Fig.1 Simplified outline (SC-75) and symbol. DESCRIPTION MARKING PNP resistor-equipped transistor in an SC-75 plastic package. NPN complement: PDTC114EE. 1 TYPE NUMBER 3 MARKING CODE PDTA114EE PINNING PIN 03 2 DESCRIPTION 1 base/input 2 emitter/ground (+) 3 collector/output MGA893 - 1 Fig.2 Equivalent inverter symbol. QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VCEO collector-emitter voltage − − −50 V IO output current (DC) − − −100 mA ICM peak collector current − − −100 mA Ptot total power dissipation Tamb ≤ 25 °C − − 150 mW hFE DC current gain IC = −5 mA; VCE = −5 V 30 − − R1 input resistor 7 10 13 R2 ------R1 resistor ratio 0.8 1 1.2 1998 Jul 23 open base 2 kΩ Philips Semiconductors Preliminary specification PNP resistor-equipped transistor PDTA114EE LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VCBO collector-base voltage open emitter − −50 V VCEO collector-emitter voltage open base − −50 V VEBO emitter-base voltage open collector − −10 V VI input voltage positive − +10 V negative − −40 V − −100 mA IO output current (DC) ICM peak collector current Ptot total power dissipation Tstg − −100 mA − 150 mW storage temperature −65 +150 °C Tj junction temperature − 150 °C Tamb operating ambient temperature −65 +150 °C Tamb ≤ 25 °C; note 1 Note 1. Transistor mounted on an FR4 printed-circuit board. THERMAL CHARACTERISTICS SYMBOL Rth j-a PARAMETER CONDITIONS thermal resistance from junction to ambient VALUE UNIT 833 K/W note 1 Note 1. Transistor mounted on an FR4 printed-circuit board. CHARACTERISTICS Tamb = 25 °C unless otherwise specified. SYMBOL PARAMETER ICBO collector cut-off current ICEO collector cut-off current CONDITIONS MIN. TYP. MAX. UNIT IC = 0; VCB = −50 V − − −100 nA IB = 0; VCE = −30 V − − −1 µA IB = 0; VCE = −30 V; Tj = 150 °C − − −50 µA µA IEBO emitter cut-off current IC = 0; VEB = −5 V − − −400 hFE DC current gain IC = −5 mA; VCE = −5 V 30 − − VCEsat collector-emitter saturation voltage IC = −10 mA; IB = −0.5 mA − − −150 mV Vi(off) input-off voltage IC = −100 µA; VCE = −5 V − −1100 −800 mV Vi(on) input-on voltage IC = −10 mA; VCE = −300 mV −2.5 −1.8 − V R1 input resistor 7 10 13 kΩ R2 ------R1 resistor ratio 0.8 1 1.2 Cc collector capacitance − 3 1998 Jul 23 IE = ie = 0; VCB = −10 V; f = 1 MHz − 3 pF Philips Semiconductors Preliminary specification PNP resistor-equipped transistor PDTA114EE MBK780 103 handbook, halfpage MBK779 −1 handbook, halfpage hFE VCEsat (1) (2) 102 (V) (3) −10−1 (1) (2) (3) 10 1 −10−1 −1 −10 IC (mA) −10−2 −1 −102 −10 VCE = −5 V. (1) Tamb = 150 °C. (2) Tamb = 25 °C. (3) Tamb = −40 °C. IC/IB = 20. (1) Tamb = 100 °C. (2) Tamb = 25 °C. (3) Tamb = −40 °C. Fig.3 Fig.4 DC current gain as a function of collector current; typical values. MBK782 −10 Collector-emitter saturation voltage as a function of collector current; typical values. MBK781 −102 handbook, halfpage handbook, halfpage −102 IC (mA) Vi(on) (V) Vi(off) (V) −10 (1) (2) −1 (1) (2) (3) (3) −1 −10−1 −10−2 −10−1 −1 IC (mA) −10−1 −10−1 −10 VCE = −5 V. (1) Tamb = −40 °C. (2) Tamb = 25 °C. (3) Tamb = 100 °C. VCE = −0.3 V. (1) Tamb = −40 °C. (2) Tamb = 25 °C. (3) Tamb = 100 °C. Fig.5 Fig.6 Input-off voltage as a function of collector current; typical values. 1998 Jul 23 4 −1 −10 IC (mA) −102 Input-on voltage as a function of collector current; typical values. Philips Semiconductors Preliminary specification PNP resistor-equipped transistor PDTA114EE PACKAGE OUTLINE Plastic surface mounted package; 3 leads SOT416 D E B A X HE v M A 3 Q A 1 A1 2 e1 c bp w M B Lp e detail X 0 0.5 1 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 max bp c D E e e1 HE Lp Q v w mm 0.95 0.60 0.1 0.30 0.15 0.25 0.10 1.8 1.4 0.9 0.7 1 0.5 1.75 1.45 0.45 0.15 0.23 0.13 0.2 0.2 OUTLINE VERSION SOT416 1998 Jul 23 REFERENCES IEC JEDEC EIAJ SC-75 5 EUROPEAN PROJECTION ISSUE DATE 97-02-28 Philips Semiconductors Preliminary specification PNP resistor-equipped transistor PDTA114EE DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. 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