Philips Semiconductors Product specification TrenchMOS transistor Standard level FET GENERAL DESCRIPTION N-channel enhancement mode standard level field-effect power transistor in a plastic envelope suitable for surface mounting. Using ’trench’ technology, the device features very low on-state resistance and has integral zener diodes giving ESD protection up to 2kV. It is intended for use in automotive and general purpose switching applications. PINNING - SOT223 PIN BUK7830-30 QUICK REFERENCE DATA SYMBOL PARAMETER MAX. UNIT VDS ID Drain-source voltage Drain current (DC) Tsp = 25 ˚C Drain current (DC) Tamb = 25 ˚C Total power dissipation Junction temperature Drain-source on-state resistance VGS = 10 V 30 12.8 5.9 8.3 150 30 V A A W ˚C mΩ Ptot Tj RDS(ON) PIN CONFIGURATION SYMBOL DESCRIPTION d 4 1 gate 2 drain 3 source 4 drain (tab) g 2 1 s 3 LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VDS VDGR ±VGS ID Drain-source voltage Drain-gate voltage Gate-source voltage Drain current (DC) ID Drain current (DC) IDM Drain current (pulse peak value) Ptot Total power dissipation Tstg, Tj Storage & operating temperature RGS = 20 kΩ Tsp = 25 ˚C Tamb = 25 ˚C Tsp = 100 ˚C Tamb = 100 ˚C Tsp = 25 ˚C Tamb = 25 ˚C Tsp = 25 ˚C Tamb = 25 ˚C - - 55 30 30 16 12.8 5.9 9 4.1 51.2 23.6 8.3 1.8 150 V V V A A A A A A W W ˚C TYP. MAX. UNIT 12 15 K/W - 70 K/W THERMAL RESISTANCES SYMBOL PARAMETER CONDITIONS Rth j-sp Thermal resistance junction to solder point Thermal resistance junction to ambient Mounted on any PCB Rth j-amb December 1997 Mounted on PCB of Fig.19 1 Rev 1.100 Philips Semiconductors Product specification TrenchMOS transistor Standard level FET BUK7830-30 ESD LIMITING VALUE SYMBOL PARAMETER CONDITIONS VC Electrostatic discharge capacitor voltage, all pins Human body model (100 pF, 1.5 kΩ) MIN. MAX. UNIT - 2 kV STATIC CHARACTERISTICS Tj= 25˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS V(BR)DSS Drain-source breakdown voltage Gate threshold voltage VGS = 0 V; ID = 0.25 mA; VGS(TO) Tj = -55˚C VDS = VGS; ID = 1 mA Tj = 150˚C Tj = -55˚C IDSS Zero gate voltage drain current VDS = 30 V; VGS = 0 V; VGS = ±10 V; VDS = 0 V IGSS Gate source leakage current ±V(BR)GSS RDS(ON) Gate source breakdown voltage IG = ±1 mA; Drain-source on-state VGS = 10 V; ID = 3.2 A resistance Tj = 150˚C Tj = 150˚C Tj = 150˚C MIN. TYP. MAX. UNIT 30 27 2.0 1.0 16 - 3.0 0.05 0.02 24 - 4.0 4.4 10 500 1 20 30 51 V V V V µA µA µA µA V mΩ mΩ MIN. TYP. MAX. UNIT DYNAMIC CHARACTERISTICS Tj = 25˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS gfs Forward transconductance VDS = 25 V; ID = 5.9 A 5 10 - S Qg(tot) Qgs Qgd Total gate charge Gate-source charge Gate-drain (Miller) charge ID = 5.9 A; VDD = 24 V; VGS = 10 V - 22.5 4.5 9 - nC nC nC Ciss Coss Crss Input capacitance Output capacitance Feedback capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz - 740 270 130 - pF pF pF td on tr td off tf Turn-on delay time Turn-on rise time Turn-off delay time Turn-off fall time VDD = 15 V; ID = 5.9 A; VGS = 10 V; RG = 5 Ω Resistive load - 16 30 35 25 22 60 50 38 ns ns ns ns Ld Internal drain inductance - 3.5 - nH Ld Internal drain inductance - 4.5 - nH Ls Internal source inductance Measured from contact screw on tab to centre of die Measured from drain lead 6 mm from package to centre of die Measured from source lead 6 mm from package to source bond pad - 7.5 - nH December 1997 2 Rev 1.100 Philips Semiconductors Product specification TrenchMOS transistor Standard level FET BUK7830-30 REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS Tj = 25˚C unless otherwise specified SYMBOL PARAMETER IDR IDRM VSD Continuous reverse drain current Pulsed reverse drain current Diode forward voltage trr Qrr Reverse recovery time Reverse recovery charge CONDITIONS MIN. TYP. MAX. UNIT - - 6.2 A IF = 3.2 A; VGS = 0 V IF = 5.9 A; VGS = 0 V - 0.75 0.85 24.8 1.2 - A V IF = 5.9 A; -dIF/dt = 100 A/µs; VGS = -10 V; VR = 25 V - 115 0.3 - ns µC MIN. TYP. MAX. UNIT - - 60 mJ AVALANCHE LIMITING VALUE SYMBOL PARAMETER CONDITIONS WDSS Drain-source non-repetitive unclamped inductive turn-off energy ID = 5.9 A; VDD ≤ 25 V; VGS = 10 V; RGS = 50 Ω; Tsp = 25 ˚C December 1997 3 Rev 1.100 Philips Semiconductors Product specification TrenchMOS transistor Standard level FET Normalised Power Derating PD% 120 BUK7830-30 1E+02 110 100 90 1E+01 80 70 60 50 1E+00 BUKX83 Zth j-amb / (K/W) D= 0.5 0.2 0.1 0.05 0.02 PD tp D= 40 30 1E-01 20 10 0 20 40 60 80 100 Tmb / C 120 1E-02 1E-07 140 1E-03 1E-01 1E+01 1E+03 Fig.4. Transient thermal impedance. Zth j-mb = f(t); parameter D = tp/T Normalised Current Derating ID% 1E-05 t/s Fig.1. Normalised power dissipation. PD% = 100⋅PD/PD 25 ˚C = f(Tmb) 120 t T 0 0 ID / A 60 BUK7830-30 12 110 10 8 100 90 50 80 40 VGS / V = 70 6.5 60 50 30 40 20 6 5.5 30 20 10 5 10 0 0 20 40 60 80 Tmb / C 100 120 0 140 ID / A S 10 VD 2 4 6 6 8 RDS(ON) / mOhm 6 / ID 10 7830-30 8 6.5 5 O ( DS 0 Fig.5. Typical output characteristics, Tj = 25 ˚C. ID = f(VDS); parameter VGS 7830-30 = N) 4.5 4 VDS / V Fig.2. Normalised continuous drain current. ID% = 100⋅ID/ID 25 ˚C = f(Tmb); conditions: VGS ≥ 10 V 100 tp T tp = 10 us R 4 10 100 us 1 3 1 ms 12 DC 10 ms 0.1 2 VGS / V = 100 ms 1 0.01 0.1 1 10 VDS / V 100 0 1000 Fig.3. Safe operating area. Tmb = 25 ˚C ID & IDM = f(VDS); IDM single pulse; parameter tp December 1997 0 10 20 30 ID / A 40 50 60 Fig.6. Typical on-state resistance, Tj = 25 ˚C. RDS(ON) = f(ID); parameter VGS 4 Rev 1.100 Philips Semiconductors Product specification TrenchMOS transistor Standard level FET BUK7830-30 ID / A 60 7830-30 5 VGS(TO) / V max. Tj / C = 25 50 BUK759-60 4 150 40 typ. 3 30 min. 2 20 1 10 0 0 2 4 6 8 0 -100 10 -50 0 50 Tj / C VGS / V Fig.7. Typical transfer characteristics. ID = f(VGS) ; conditions: VDS = 25 V; parameter Tj gfs / S 15 100 150 200 Fig.10. Gate threshold voltage. VGS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS 7830-30 Sub-Threshold Conduction 1E-01 1E-02 Tj / C = 25 10 2% 1E-03 150 typ 98% 1E-04 5 1E-05 0 0 10 20 30 ID / A 40 50 60 1E-06 Fig.8. Typical transconductance, Tj = 25 ˚C. gfs = f(ID); conditions: VDS = 25 V 2 a SOT223 30V Trench 0 1 2 3 4 5 Fig.11. Sub-threshold drain current. ID = f(VGS); conditions: Tj = 25 ˚C; VDS = VGS Normalised RDS(ON) = f(Tj) 10000 7528-30 C / pF 1.5 Ciss 1 1000 Coss 0.5 Crss 0 -50 0 50 Tj / C 100 100 0.1 150 10 100 VDS / V Fig.9. Normalised drain-source on-state resistance. a = RDS(ON)/RDS(ON)25 ˚C = f(Tj); ID = 3.2 A; VGS = 10 V December 1997 1 Fig.12. Typical capacitances, Ciss, Coss, Crss. C = f(VDS); conditions: VGS = 0 V; f = 1 MHz 5 Rev 1.100 Philips Semiconductors Product specification TrenchMOS transistor Standard level FET 10 BUK7830-30 VGS / V VDS / V = 6 8 7830-30 120 110 24 100 WDSS% 90 80 70 6 60 50 4 40 30 2 20 10 0 0 0 5 10 15 20 20 25 40 60 QG / nC Fig.13. Typical turn-on gate-charge characteristics. VGS = f(QG); conditions: ID = 5.9 A; parameter VDS 60 IF / A 80 100 Tmb / C 120 140 Fig.15. Normalised avalanche energy rating. WDSS% = f(Tmb); conditions: ID = 5.9 A 7830-30 VDD + 50 L VDS 40 -ID/100 T.U.T. 0 20 Tj / C = 150 25 R 01 shunt RGS 10 0 - VGS 30 0 0.5 1 VSDS / V 1.5 2 Fig.16. Avalanche energy test circuit. WDSS = 0.5 ⋅ LID2 ⋅ BVDSS /(BVDSS − VDD ) Fig.14. Typical reverse diode current. IF = f(VSDS); conditions: VGS = 0 V; parameter Tj + VDD RD VDS - VGS 0 RG T.U.T. Fig.17. Switching test circuit. December 1997 6 Rev 1.100 Philips Semiconductors Product specification TrenchMOS transistor Standard level FET BUK7830-30 MOUNTING INSTRUCTIONS Dimensions in mm. 3.8 min 1.5 min 2.3 1.5 min 6.3 (3x) 1.5 min 4.6 Fig.18. soldering pattern for surface mounting SOT223. PRINTED CIRCUIT BOARD December 1997 7 Rev 1.100 Philips Semiconductors Product specification TrenchMOS transistor Standard level FET BUK7830-30 Dimensions in mm. 36 18 60 4.5 4.6 9 10 7 15 50 Fig.19. PCB for thermal resistance and power rating for SOT223. PCB: FR4 epoxy glass (1.6 mm thick), copper laminate (35 µm thick). December 1997 8 Rev 1.100 Philips Semiconductors Product specification TrenchMOS transistor Standard level FET BUK7830-30 MECHANICAL DATA Dimensions in mm 6.7 6.3 Net Mass: 0.11 g B 3.1 2.9 0.32 0.24 0.2 4 A A 0.10 0.02 16 max M 7.3 6.7 3.7 3.3 13 2 1 10 max 1.8 max 1.05 0.80 2.3 0.60 0.85 4.6 3 0.1 M B (4x) Fig.20. SOT223 surface mounting package. Notes 1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent damage to MOS gate oxide. 2. Refer to surface mounting instructions for SOT223 envelope. 3. Epoxy meets UL94 V0 at 1/8". December 1997 9 Rev 1.100 Philips Semiconductors Product specification TrenchMOS transistor Standard level FET BUK7830-30 DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. Philips Electronics N.V. 1997 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. December 1997 10 Rev 1.100