INTEGRATED CIRCUITS DATA SHEET 74HC3G07; 74HCT3G07 Buffer with open-drain outputs Product specification 2003 Oct 15 Philips Semiconductors Product specification Buffer with open-drain outputs 74HC3G07; 74HCT3G07 FEATURES DESCRIPTION • Wide supply voltage range from 2.0 to 6.0 V The 74HC3G/HCT3G07 is a high-speed Si-gate CMOS device. Specified in compliance with JEDEC standard no. 7A. • High noise immunity • Low power dissipation The 74HC3G/HCT3G07 provides three non-inverting buffers. • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V. The outputs of the 74HC3G/HCT3G07 devices are open drains and can be connected to other open-drain outputs to implement active-LOW, wired-OR or active-HIGH wired-AND functions. For digital operation this device must have a pull-up resistor to establish a logic HIGH-level. • Multiple package options • Specified from −40 to +85 °C and −40 to +125 °C. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf ≤ 6.0 ns. TYPICAL SYMBOL PARAMETER CONDITIONS UNIT HC3G HCT3G tPZL propagation delay nA to nY CL = 50 pF; VCC = 4.5 V 9 11 ns tPLZ propagation delay nA to nY CL = 50 pF; VCC = 4.5 V 11 10 ns CI input capacitance 1.5 1.5 pF CPD power dissipation capacitance 4 4 pF notes 1 and 2 Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = total load switching outputs; ∑ (CL × VCC2 × fo) = sum of outputs. 2. For 74HC3G07 the condition is VI = GND to VCC. For 74HCT3G07 the condition is VI = GND to VCC − 1.5 V. 2003 Oct 15 2 Philips Semiconductors Product specification Buffer with open-drain outputs 74HC3G07; 74HCT3G07 FUNCTION TABLE See note 1. INPUT OUTPUT nA nY L L H Z Note 1. H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state. ORDERING INFORMATION PACKAGES TYPE NUMBER TEMPERATURE RANGE PINS PACKAGE MATERIAL CODE MARKING 74HC3G07DP −40 to +125 °C 8 TSSOP8 plastic SOT505-2 H07 74HCT3G07DP −40 to +125 °C 8 TSSOP8 plastic SOT505-2 T07 74HC3G07DC −40 to +125 °C 8 VSSOP8 plastic SOT765-1 H07 74HCT3G07DC −40 to +125 °C 8 VSSOP8 plastic SOT765-1 T07 PINNING PIN 2003 Oct 15 SYMBOL DESCRIPTION 1 1A data input 2 3Y data output 3 2A data input 4 GND ground (0 V) 5 2Y data output 6 3A data input 7 1Y data output 8 VCC supply voltage 3 Philips Semiconductors Product specification Buffer with open-drain outputs 74HC3G07; 74HCT3G07 handbook, halfpage 1 1A 1Y 7 3 2A 2Y 5 6 3A 3Y 2 handbook, halfpage 1A 1 8 VCC 3Y 2 7 1Y 07 2A 3 6 3A GND 4 5 2Y MNB135 MNB136 Fig.1 Pin configuration. handbook, halfpage 1A 1 1 7 3 1 5 Fig.2 Logic symbol. 1Y Y handbook, halfpage 2A 2Y A 3A 6 GND 1 2 MNA591 3Y MNB137 Fig.3 IEC logic symbol. 2003 Oct 15 Fig.4 Logic diagram (one driver). 4 Philips Semiconductors Product specification Buffer with open-drain outputs 74HC3G07; 74HCT3G07 RECOMMENDED OPERATING CONDITIONS 74HC3G07 SYMBOL PARAMETER 74HCT3G07 CONDITIONS UNIT MIN. TYP. MAX. MIN. VCC supply voltage 2.0 5.0 6.0 4.5 VI input voltage 0 − 6.0 VO output voltage 0 − VCC Tamb operating ambient temperature +25 tr, tf input rise and fall times see DC and AC −40 characteristics per device TYP. MAX. 5.0 5.5 V 0 − 5.5 V 0 − VCC V +125 −40 +25 +125 °C VCC = 2.0 V − − 1000 − − − ns VCC = 4.5 V − 6.0 500 − 6.0 500 ns VCC = 6.0 V − − 400 − − − ns LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT −0.5 +7.0 V − ±20 mA VCC supply voltage IIK input diode current VI < −0.5 V or VI > VCC + 0.5 V IOK output diode current VO < −0.5 V − −20 mA VO output voltage active mode; note 1 −0.5 VCC + 0.5 V high-impedance mode; note 1 −0.5 7.0 V IO output sink current −0.5 V < VO < 7.0 V − −25 mA ICC VCC or GND current note 1 − 50 mA Tstg storage temperature −65 +150 °C PD power dissipation − 300 mW Tamb = −40 to +125 °C; note 2 Notes 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. Above 110 °C the value of PD derates linearly with 8 mW/K. 2003 Oct 15 5 Philips Semiconductors Product specification Buffer with open-drain outputs 74HC3G07; 74HCT3G07 DC CHARACTERISTICS Type 74HC3G07 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL PARAMETER MIN. OTHER TYP.(1) MAX. UNIT VCC (V) Tamb = −40 to +85 °C VIH VIL VOL 2.0 1.5 1.2 − V 4.5 3.15 2.4 − V 6.0 4.2 3.2 − V 2.0 − 0.8 0.5 V 4.5 − 2.1 1.35 V 6.0 − 2.8 1.8 V IO = 20 µA 2.0 − 0 0.1 V IO = 20 µA 4.5 − 0 0.1 V IO = 20 µA 6.0 − 0 0.1 V IO = 4.0 mA 4.5 − 0.15 0.33 V HIGH-level input voltage LOW-level input voltage LOW-level output voltage VI = VIH or VIL IO = 5.2 mA 6.0 − 0.16 0.33 V VI = VCC or GND 6.0 − − ±1.0 µA 3-state output OFF current VI = VIH or VIL; VO = VCC or GND 6.0 − − ±5.0 µA quiescent supply current 6.0 − − 10 µA 2.0 1.5 − − V 4.5 3.15 − − V 6.0 4.2 − − V 2.0 − − 0.5 V 4.5 − − 1.35 V 6.0 − − 1.8 V ILI input leakage current IOZ ICC VI = VCC or GND; IO = 0 Tamb = −40 to +125 °C VIH VIL VOL HIGH-level input voltage LOW-level input voltage LOW-level output voltage VI = VIH or VIL IO = 20 µA 2.0 − − 0.1 V IO = 20 µA 4.5 − − 0.1 V IO = 20 µA 6.0 − − 0.1 V IO = 4.0 mA 4.5 − − 0.4 V IO = 5.2 mA 6.0 − − 0.4 V VI = VCC or GND 6.0 − − ±1.0 µA 3-state output OFF current VI = VIH or VIL; VO = VCC or GND 6.0 − − ±10 µA quiescent supply current 6.0 − − 20 µA ILI input leakage current IOZ ICC VI = VCC or GND; IO = 0 Note 1. All typical values are measured at Tamb = 25 °C. 2003 Oct 15 6 Philips Semiconductors Product specification Buffer with open-drain outputs 74HC3G07; 74HCT3G07 Type 74HCT3G07 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). TEST CONDITIONS SYMBOL PARAMETER MIN. OTHER TYP.(1) MAX. UNIT VCC (V) Tamb = −40 to +85 °C VIH HIGH-level input voltage 4.5 to 5.5 2.0 1.6 − V VIL LOW-level input voltage 4.5 to 5.5 − 1.2 0.8 V VOL LOW-level output voltage VI = VIH or VIL IO = 20 µA 4.5 − 0 0.1 V IO = 4.0 mA 4.5 − 0.15 0.33 V VI = VCC or GND 5.5 − − ±1.0 µA ILI input leakage current IOZ 3-state output OFF current VI = VIH or VIL; VO = VCC or GND 5.5 − − ±5.0 µA ICC quiescent supply current VI = VCC or GND; IO = 0 5.5 − − 10 µA ∆ICC additional supply current per input VI = VCC − 2.1 V; IO = 0 4.5 to 5.5 − − 375 µA Tamb = −40 to +125 °C VIH HIGH-level input voltage 4.5 to 5.5 2.0 − − V VIL LOW-level input voltage 4.5 to 5.5 − − 0.8 V VOL LOW-level output voltage IO = 20 µA 4.5 − − 0.1 V IO = 4.0 mA 4.5 − − 0.4 V VI = VCC or GND 5.5 − − ±1.0 µA VI = VIH or VIL ILI input leakage current IOZ 3-state output OFF current VI = VIH or VIL; VO = VCC or GND 5.5 − − ±10 µA ICC quiescent supply current VI = VCC or GND; IO = 0 5.5 − − 20 µA ∆ICC additional supply current per input VI = VCC − 2.1 V; IO = 0 4.5 to 5.5 − − 410 µA Note 1. All typical values are measured at Tamb = 25 °C. 2003 Oct 15 7 Philips Semiconductors Product specification Buffer with open-drain outputs 74HC3G07; 74HCT3G07 AC CHARACTERISTICS Type 74HC3G07 GND = 0 V; tr = tf ≤ 6.0 ns; CL = 50 pF. TEST CONDITIONS SYMBOL PARAMETER TYP.(1) MIN. WAVEFORMS MAX. UNIT VCC (V) Tamb = −40 to +85 °C tPZL tPLZ tTHL propagation delay see Figs 5 and 6 2.0 nA to nY 4.5 − 25 95 ns − 9 19 ns 6.0 − 7 16 ns propagation delay see Figs 5 and 6 2.0 nA to nY 4.5 − 25 95 ns − 11 23 ns 6.0 − 10 23 ns see Figs 5 and 6 2.0 − 18 95 ns 4.5 − 6 19 ns 6.0 − 5 16 ns propagation delay see Figs 5 and 6 2.0 nA to nY 4.5 − − 125 ns − − 25 ns output transition time Tamb = −40 to +125 °C tPZL tPLZ tTHL 6.0 − − 20 ns propagation delay see Figs 5 and 6 2.0 nA to nY 4.5 − − 125 ns − − 30 ns output transition time 6.0 − − 26 ns see Figs 5 and 6 2.0 − − 125 ns 4.5 − − 25 ns 6.0 − − 20 ns Note 1. All typical values are measured at Tamb = 25 °C. 2003 Oct 15 8 Philips Semiconductors Product specification Buffer with open-drain outputs 74HC3G07; 74HCT3G07 Type 74HCT3G07 GND = 0 V; tr = tf ≤ 6.0 ns; CL = 50 pF. TEST CONDITIONS SYMBOL PARAMETER TYP.(1) MIN. WAVEFORMS MAX. UNIT VCC (V) Tamb = −40 to +85 °C tPZL propagation delay see Figs 5 and 6 nA to nY 4.5 − 11 27 ns tPLZ propagation delay see Figs 5 and 6 nA to nY 4.5 − 10 26 ns tTHL output transition time see Figs 5 and 6 4.5 − 6 19 ns tPZL propagation delay see Figs 5 and 6 nA to nY 4.5 − − 32 ns tPLZ propagation delay see Figs 5 and 6 nA to nY 4.5 − − 31 ns tTHL output transition time 4.5 − − 22 ns Tamb = −40 to +125 °C see Figs 5 and 6 Note 1. All typical values are measured at Tamb = 25 °C. 2003 Oct 15 9 Philips Semiconductors Product specification Buffer with open-drain outputs 74HC3G07; 74HCT3G07 AC WAVEFORMS VI handbook, full pagewidth VM nA input GND t PLZ t PZL VCC nY output VM VX VOL MNA528 For 74HC3G07: VM = 50%; VI = GND to VCC. For 74HCT3G07: VM = 1.3 V; VI = GND to 3.0 V. For 74HC3G07 and 74HCT3G07: VX = 0.1 × VCC. Fig.5 The input (nA) to output (nY) propagation delays and transition times. S1 handbook, full pagewidth VCC PULSE GENERATOR RL = VI VCC open GND 1 kΩ VO D.U.T. CL = 50 pF RT MNA742 TEST S1 tPLH/tPHL open tPLZ/tPZL VCC tPHZ/tPZH GND Definitions for test circuit: RL = Load resistor. CL = load capacitance including jig and probe capacitance. RT = termination resistance should be equal to the output impedance Zo of the pulse generator. Fig.6 Load circuitry for switching times. 2003 Oct 15 10 Philips Semiconductors Product specification Buffer with open-drain outputs 74HC3G07; 74HCT3G07 PACKAGE OUTLINES TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm D E A SOT505-2 X c HE y v M A Z 5 8 A A2 (A3) A1 pin 1 index θ Lp L 1 4 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D(1) E(1) e HE L Lp v w y Z(1) θ mm 1.1 0.15 0.00 0.95 0.75 0.25 0.38 0.22 0.18 0.08 3.1 2.9 3.1 2.9 0.65 4.1 3.9 0.5 0.47 0.33 0.2 0.13 0.1 0.70 0.35 8° 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT505-2 2003 Oct 15 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 02-01-16 --- 11 Philips Semiconductors Product specification Buffer with open-drain outputs 74HC3G07; 74HCT3G07 VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm D E SOT765-1 A X c y HE v M A Z 5 8 Q A A2 A1 pin 1 index (A3) θ Lp 1 4 e L detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D(1) E(2) e HE L Lp Q v w y Z(1) θ mm 1 0.15 0.00 0.85 0.60 0.12 0.27 0.17 0.23 0.08 2.1 1.9 2.4 2.2 0.5 3.2 3.0 0.4 0.40 0.15 0.21 0.19 0.2 0.13 0.1 0.4 0.1 8° 0° Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT765-1 2003 Oct 15 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 02-06-07 MO-187 12 Philips Semiconductors Product specification Buffer with open-drain outputs 74HC3G07; 74HCT3G07 DATA SHEET STATUS LEVEL DATA SHEET STATUS(1) PRODUCT STATUS(2)(3) Development DEFINITION I Objective data II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. III Product data This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Production This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. DEFINITIONS DISCLAIMERS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Right to make changes Philips Semiconductors reserves the right to make changes in the products including circuits, standard cells, and/or software described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 2003 Oct 15 13 Philips Semiconductors – a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: [email protected]. SCA75 © Koninklijke Philips Electronics N.V. 2003 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands R44/01/pp14 Date of release: 2003 Oct 15 Document order number: 9397 750 12067