PHILIPS 74HCT7540D

74HC7540; 74HCT7540
Octal Schmitt trigger buffer/line driver; 3-state; inverting
Rev. 4 — 31 December 2012
Product data sheet
1. General description
The 74HC7540; 74HCT7540 is a high-speed Si-gate CMOS device and is pin compatible
with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard
No. 7A.
The 74HC7540; 74HCT7540 provides eight inverting buffer/line drivers with 3-state
outputs and Schmitt-trigger action. The 3-state outputs are controlled by the output enable
inputs OE1 and OE2. A HIGH on OEn causes the outputs to assume a high-impedance
OFF-state. Schmitt trigger action on the data inputs transforms slowly changing input
signals into sharply defined, jitter-free output signals.
The 74HC7540; 74HCT7540 is identical to the 74HC540; 74HCT540 but has hysteresis
on the data inputs.
2. Features and benefits
 Inverting outputs
 Low-power dissipation
 ESD protection:
 HBM JESD22-A114F exceeds 2000 V
 MM JESD22-A115-A exceeds 200 V
 Multiple package options
 Specified from 40 C to +85 C and from 40 C to +125 C
3. Ordering information
Table 1.
Ordering information
Type number
74HC7540N
Package
Temperature range
Name
Description
Version
40 C to +125 C
DIP20
plastic dual in-line package; 20 leads (300 mil)
SOT146-1
40 C to +125 C
SO20
plastic small outline package; 20 leads;
body width 7.5 mm
SOT163-1
40 C to +125 C
SSOP20
plastic shrink small outline package; 20 leads;
body width 5.3 mm
SOT339-1
74HCT7540N
74HC7540D
74HCT7540D
74HC7540DB
74HC7540; 74HCT7540
NXP Semiconductors
Octal Schmitt trigger buffer/line driver; 3-state; inverting
4. Functional diagram
Fig 1.
$
<
$
<
$
<
$
<
$
<
$
<
<
$
<
$
2(
(1
2(
DDD
Logic symbol
DDD
Fig 2.
IEC logic symbol
5. Pinning information
5.1 Pinning
+&
+&7
+&
+&7
2(
$
9&&
2(
$
<
$
<
$
<
$
<
$
$
$
2(
9&&
$
2(
$
<
$
<
$
<
$
<
<
$
<
<
$
<
<
$
<
*1' <
*1' <
DDD
Fig 3.
DDD
Pin configuration DIP20, SO20
74HC_HCT7540
Product data sheet
Fig 4.
Pin configuration SSOP20
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 31 December 2012
© NXP B.V. 2012. All rights reserved.
2 of 16
74HC7540; 74HCT7540
NXP Semiconductors
Octal Schmitt trigger buffer/line driver; 3-state; inverting
5.2 Pin description
Table 2.
Pin description
Symbol
Pin
Description
OE1
1
output enable input (active LOW)
A0 to A7
2, 3, 4, 5, 6, 7, 8, 9
data input
GND
10
ground (0 V)
Y0 to Y7
18, 17, 16, 15, 14, 13, 12, 11 data output
OE2
19
output enable input (active LOW)
VCC
20
supply voltage
6. Functional description
Table 3.
Functional table[1]
Control
Input
Output
OE1
OE2
An
Yn
L
L
L
H
L
L
H
L
X
H
X
Z
H
X
X
Z
[1]
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
VCC
supply voltage
Conditions
Min
Max
Unit
0.5
+7
V
-
20
mA
-
20
mA
-
35
mA
input clamping current
VI < 0.5 V or VI > VCC + 0.5 V
[1]
IOK
output clamping current
VO < 0.5 V or VO > VCC + 0.5 V
[1]
IO
output current
0.5 V < VO < VCC + 0.5 V
ICC
supply current
-
70
mA
IGND
ground current
70
-
mA
Tstg
storage temperature
65
+150
C
Ptot
total power dissipation
DIP20
-
750
mW
SO20, SSOP20
-
500
mW
IIK
[1]
[2]
[2]
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For DIP20 packages: above 70 C the value of Ptot derates linearly with 12 mW/K.
For SO20 packages: above 70 C the value of Ptot derates linearly with 8 mW/K.
For SSOP20 packages: above 60 C the value of Ptot derates linearly with 5.5 mW/K.
74HC_HCT7540
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 31 December 2012
© NXP B.V. 2012. All rights reserved.
3 of 16
74HC7540; 74HCT7540
NXP Semiconductors
Octal Schmitt trigger buffer/line driver; 3-state; inverting
8. Recommended operating conditions
Table 5.
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V)
Symbol Parameter
Conditions
74HC7540
Min
74HCT7540
Typ
Max
Min
Unit
Typ
Max
VCC
supply voltage
2.0
5.0
6.0
4.5
5.0
5.5
V
VI
input voltage
0
-
VCC
0
-
VCC
V
VO
output voltage
0
-
VCC
0
-
VCC
V
Tamb
ambient temperature
40
+25
+125
40
+25
+125
C
9. Static characteristics
Table 6.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Tamb = 25 C
Conditions
Tamb = 40 C
to +85 C
Tamb = 40 C
to +125 C
Unit
Min
Typ
Max
Min
Max
Min
Max
IO = 20 A; VCC = 2.0 V
1.9
2.0
-
1.9
-
1.9
-
V
IO = 20 A; VCC = 4.5 V
4.4
4.5
-
4.4
-
4.4
-
V
IO = 20 A; VCC = 6.0 V
5.9
6.0
-
5.9
-
5.9
-
V
IO = 6.0 mA; VCC = 4.5 V
3.98
4.32
-
3.84
-
3.7
-
V
IO = 7.8 mA; VCC = 6.0 V
5.48
5.81
-
5.34
-
5.2
-
V
IO = 20 A; VCC = 2.0 V
-
0
0.1
-
0.1
-
0.1
V
IO = 20 A; VCC = 4.5 V
-
0
0.1
-
0.1
-
0.1
V
IO = 20 A; VCC = 6.0 V
-
0
0.1
-
0.1
-
0.1
V
IO = 6.0 mA; VCC = 4.5 V
-
0.15
0.26
-
0.33
-
0.4
V
IO = 7.8 mA; VCC = 6.0 V
-
0.16
0.26
-
0.33
-
0.4
V
74HC7540
VOH
VOL
HIGH-level
output voltage
LOW-level
output voltage
VI = VT+ or VT
VI = VT+ or VT
II
input leakage
current
VI = VCC or GND; VCC = 6.0 V
-
-
0.1
-
1.0
-
1.0
A
IOZ
OFF-state
output current
per input pin; VI = VT+ or VT;
VO = VCC or GND;
other inputs at VCC or GND;
VCC = 6.0 V; IO = 0 A
-
-
0.5
-
5.0
-
10
A
ICC
supply current
VI = VCC or GND; IO = 0 A;
VCC = 6.0 V
-
-
8.0
-
80
-
160
A
CI
input
capacitance
-
3.5
-
-
-
-
-
pF
74HCT7540
VOH
HIGH-level
output voltage
74HC_HCT7540
Product data sheet
VI = VT+ or VT; VCC = 4.5 V
IO = 20 A
4.4
4.5
-
4.4
-
4.4
-
V
IO = 6.0 mA
3.98
4.32
-
3.84
-
3.7
-
V
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 31 December 2012
© NXP B.V. 2012. All rights reserved.
4 of 16
74HC7540; 74HCT7540
NXP Semiconductors
Octal Schmitt trigger buffer/line driver; 3-state; inverting
Table 6.
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
VOL
LOW-level
output voltage
Tamb = 25 C
Conditions
Tamb = 40 C
to +85 C
Tamb = 40 C
to +125 C
Unit
Min
Typ
Max
Min
Max
Min
Max
IO = 20 A;
-
0
0.1
-
0.1
-
0.1
V
IO = 6.0 mA;
-
0.15
0.26
-
0.33
-
0.4
V
VI = VT+ or VT; VCC = 4.5 V
II
input leakage
current
VI = VCC or GND; VCC = 5.5 V
-
-
0.1
-
1.0
-
1.0
A
IOZ
OFF-state
output current
per input pin; VI = VT+ or VT;
VO = VCC or GND;
other inputs at VCC or GND;
VCC = 5.5 V; IO = 0 A
-
-
0.5
-
5.0
-
10
A
ICC
supply current
VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
-
-
8.0
-
80
-
160
A
ICC
additional
supply current
per input pin; IO = 0 A;
VI = VCC  2.1 V;
other inputs at VCC or GND;
VCC = 4.5 V to 5.5 V
-
20
72
-
90
-
98
A
-
130
468
-
585
-
637
A
-
3.5
-
-
-
-
-
pF
An input
OEn input
CI
input
capacitance
10. Dynamic characteristics
Table 7.
Dynamic characteristics
GND = 0 V; CL = 50 pF; for test circuit see Figure 7.
Symbol Parameter
Tamb = 25 C
Conditions
Tamb = 40 C to +125 C
Unit
Min
Typ
Max
Max (85 C)
Max (125 C)
-
39
120
150
180
VCC = 4.5 V
-
14
24
30
36
ns
VCC = 5.0 V; CL = 15 pF
-
11
-
-
-
ns
-
11
20
26
31
ns
74HC7540
tpd
propagation delay An to Yn; see Figure 5
[1]
VCC = 2.0 V
VCC = 6.0 V
ten
enable time
OEn to Yn; see Figure 6
[1]
VCC = 2.0 V
-
41
150
190
225
ns
VCC = 4.5 V
-
15
30
38
45
ns
-
12
26
33
38
ns
VCC = 6.0 V
tdis
disable time
74HC_HCT7540
Product data sheet
ns
OEn to Yn; see Figure 6
[1]
VCC = 2.0 V
-
52
150
190
225
ns
VCC = 4.5 V
-
19
30
38
45
ns
VCC = 6.0 V
-
15
26
33
38
ns
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 31 December 2012
© NXP B.V. 2012. All rights reserved.
5 of 16
74HC7540; 74HCT7540
NXP Semiconductors
Octal Schmitt trigger buffer/line driver; 3-state; inverting
Table 7.
Dynamic characteristics
GND = 0 V; CL = 50 pF; for test circuit see Figure 7.
Symbol Parameter
tt
transition time
Tamb = 25 C
Conditions
power dissipation
capacitance
Max
Max (85 C)
Unit
Max (125 C)
Min
Typ
VCC = 2.0 V
-
14
60
75
90
ns
VCC = 4.5 V
-
5
12
15
18
ns
-
4
10
13
15
ns
-
29
-
-
-
pF
-
19
32
40
48
ns
-
16
-
-
-
ns
-
19
32
40
48
ns
[2]
see Figure 5
VCC = 6.0 V
CPD
Tamb = 40 C to +125 C
[3]
per package;
VI = GND to VCC
74HCT7540
propagation delay An to Yn; see Figure 5
tpd
[1]
VCC = 4.5 V
VCC = 5.0 V; CL = 15 pF
enable time
ten
OEn to Yn; see Figure 6
[1]
VCC = 4.5 V
[1]
tdis
disable time
OEn to Yn; see Figure 6
-
20
32
40
48
ns
tt
transition time
VCC = 4.5 V; see Figure 5
[2]
-
5
12
15
18
ns
CPD
power dissipation
capacitance
per package;
VI = GND to VCC  1.5 V
[3]
-
31
-
-
-
pF
VCC = 4.5 V
[1]
tpd is the same as tPLH and tPHL.
ten is the same as tPZL and tPZH.
tdis is the same as tPLZ and tPHZ.
[2]
tt is the same as tTHL and tTLH.
[3]
CPD is used to determine the dynamic power dissipation (PD in W):
PD = CPD  VCC2  fi  N +  (CL  VCC2  fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
 (CL  VCC2  fo) = sum of outputs.
74HC_HCT7540
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 31 December 2012
© NXP B.V. 2012. All rights reserved.
6 of 16
74HC7540; 74HCT7540
NXP Semiconductors
Octal Schmitt trigger buffer/line driver; 3-state; inverting
11. Waveforms
9,
90
$QLQSXW
90
*1'
W3+/
W3/+
92+
90
<QRXWSXW
90
92/
W7+/
W7/+
DDD
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 5.
Input to output propagation delays
9,
90
2(QLQSXW
*1'
W3=/
W3/=
<QRXWSXW
/2:WR2))
2))WR/2:
9&&
90
9;
92/
W3+=
<QRXWSXW
+,*+WR2))
2))WR+,*+
92+
W3=+
9<
90
*1'
RXWSXWV
HQDEOHG
RXWSXWV
GLVDEOHG
RXWSXWV
HQDEOHG
DDD
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 6.
3-state enable and disable times
Table 8.
Measurement points
Type
Input
Output
VM
VM
VX
VY
74HC7540
0.5VCC
0.5VCC
0.1VCC
0.9VCC
74HCT7540
1.3 V
1.3 V
0.1VCC
0.9VCC
74HC_HCT7540
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 31 December 2012
© NXP B.V. 2012. All rights reserved.
7 of 16
74HC7540; 74HCT7540
NXP Semiconductors
Octal Schmitt trigger buffer/line driver; 3-state; inverting
VI
tW
90 %
negative
pulse
VM
0V
tf
tr
tr
tf
VI
90 %
positive
pulse
0V
VM
10 %
VM
VM
10 %
tW
VCC
VCC
G
VI
VO
RL
S1
open
DUT
CL
RT
001aad983
Test data is given in Table 9.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator
CL = Load capacitance including jig and probe capacitance
RL = Load resistance
S1 = Test selection switch
Fig 7.
Test circuit for measuring switching times
Table 9.
Test data
Type
Input
Load
S1 position
VI
tr, tf
CL
RL
tPHL, tPLH
tPZH, tPHZ
tPZL, tPLZ
74HC7540
VCC
6 ns
15 pF, 50 pF
1 k
open
GND
VCC
74HCT7540
3V
6 ns
15 pF, 50 pF
1 k
open
GND
VCC
74HC_HCT7540
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 31 December 2012
© NXP B.V. 2012. All rights reserved.
8 of 16
74HC7540; 74HCT7540
NXP Semiconductors
Octal Schmitt trigger buffer/line driver; 3-state; inverting
12. Transfer characteristics
Table 10. Transfer characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); see Figure 8 and Figure 9.
Symbol Parameter
Tamb = 25 C
Conditions
Tamb = 40 C
to +85 C
Tamb = 40 C
to +125 C
Unit
Min
Typ
Max
Min
Max
Min
Max
VCC = 2.0 V
-
-
1.5
-
1.5
-
1.5
V
VCC = 4.5 V
-
-
3.15
-
3.15
-
3.15
V
74HC7540
VT+
VT
VH
positive-going
threshold
voltage
VCC = 6.0 V
negative-going VCC = 2.0 V
threshold
VCC = 4.5 V
voltage
VCC = 6.0 V
hysteresis
voltage
-
-
4.2
-
4.2
-
4.2
V
0.3
-
-
0.3
-
0.3
-
V
1.35
-
-
1.35
-
1.35
-
V
1.8
-
-
1.8
-
1.8
-
V
VCC = 2.0 V
0.1
0.20
-
0.1
-
0.1
-
V
VCC = 4.5 V
0.25
0.40
-
0.25
-
0.25
-
V
VCC = 6.0 V
0.3
0.5
-
0.3
-
0.3
-
V
VCC = 4.5 V
-
-
2.0
-
2.0
-
2.0
V
VCC = 5.5 V
-
-
2.1
-
2.1
-
2.1
V
negative-going VCC = 4.5 V
threshold
VCC = 5.5 V
voltage
0.7
-
-
0.64
-
0.6
-
V
0.8
-
-
0.74
-
0.7
-
V
hysteresis
voltage
VCC = 4.5 V
0.17
0.23
-
-
-
-
-
V
VCC = 5.5 V
0.17
0.23
-
-
-
-
-
V
74HCT7540
VT+
VT
VH
positive-going
threshold
voltage
13. Transfer characteristics waveforms
VO
VT+
VI
VH
VT−
VI
VH
VT−
Fig 8.
VT+
Transfer characteristics
74HC_HCT7540
Product data sheet
VO
mna207
mna208
Fig 9.
Transfer characteristics definitions
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 31 December 2012
© NXP B.V. 2012. All rights reserved.
9 of 16
74HC7540; 74HCT7540
NXP Semiconductors
Octal Schmitt trigger buffer/line driver; 3-state; inverting
14. Package outline
DIP20: plastic dual in-line package; 20 leads (300 mil)
SOT146-1
ME
seating plane
D
A2
A
A1
L
c
e
Z
b1
w M
(e 1)
b
MH
11
20
pin 1 index
E
1
10
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
min.
A2
max.
b
b1
c
mm
4.2
0.51
3.2
1.73
1.30
0.53
0.38
0.36
0.23
26.92
26.54
inches
0.17
0.02
0.13
0.068
0.051
0.021
0.015
0.014
0.009
1.060
1.045
D
e
e1
L
ME
MH
w
Z (1)
max.
6.40
6.22
2.54
7.62
3.60
3.05
8.25
7.80
10.0
8.3
0.254
2
0.25
0.24
0.1
0.3
0.14
0.12
0.32
0.31
0.39
0.33
0.01
0.078
(1)
E
(1)
Note
1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
OUTLINE
VERSION
SOT146-1
REFERENCES
IEC
JEDEC
JEITA
MS-001
SC-603
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-13
Fig 10. Package outline SOT146-1 (DIP20)
74HC_HCT7540
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 31 December 2012
© NXP B.V. 2012. All rights reserved.
10 of 16
74HC7540; 74HCT7540
NXP Semiconductors
Octal Schmitt trigger buffer/line driver; 3-state; inverting
SO20: plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
D
E
A
X
c
HE
y
v M A
Z
20
11
Q
A2
A
(A 3)
A1
pin 1 index
θ
Lp
L
10
1
e
bp
detail X
w M
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (1)
e
HE
L
Lp
Q
v
w
y
mm
2.65
0.3
0.1
2.45
2.25
0.25
0.49
0.36
0.32
0.23
13.0
12.6
7.6
7.4
1.27
10.65
10.00
1.4
1.1
0.4
1.1
1.0
0.25
0.25
0.1
0.01
0.019 0.013
0.014 0.009
0.51
0.49
0.30
0.29
0.05
0.419
0.043
0.055
0.394
0.016
inches
0.1
0.012 0.096
0.004 0.089
0.043
0.039
0.01
0.01
Z
(1)
0.9
0.4
0.035
0.004
0.016
θ
8o
o
0
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT163-1
075E04
MS-013
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
Fig 11. Package outline SOT163-1 (SO20)
74HC_HCT7540
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 31 December 2012
© NXP B.V. 2012. All rights reserved.
11 of 16
74HC7540; 74HCT7540
NXP Semiconductors
Octal Schmitt trigger buffer/line driver; 3-state; inverting
SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm
D
SOT339-1
E
A
X
c
HE
y
v M A
Z
20
11
Q
A2
A
(A 3)
A1
pin 1 index
θ
Lp
L
1
10
w M
bp
e
detail X
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (1)
e
HE
L
Lp
Q
v
w
y
Z (1)
θ
mm
2
0.21
0.05
1.80
1.65
0.25
0.38
0.25
0.20
0.09
7.4
7.0
5.4
5.2
0.65
7.9
7.6
1.25
1.03
0.63
0.9
0.7
0.2
0.13
0.1
0.9
0.5
8o
o
0
Note
1. Plastic or metal protrusions of 0.2 mm maximum per side are not included.
OUTLINE
VERSION
SOT339-1
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
MO-150
Fig 12. Package outline SOT339-1 (SSOP20)
74HC_HCT7540
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 31 December 2012
© NXP B.V. 2012. All rights reserved.
12 of 16
74HC7540; 74HCT7540
NXP Semiconductors
Octal Schmitt trigger buffer/line driver; 3-state; inverting
15. Abbreviations
Table 11.
Abbreviations
Acronym
Description
CMOS
Complementary Metal-Oxide Semiconductor
DUT
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
LSTTL
Low-power Schottky Transistor-Transistor Logic
MM
Machine Model
16. Revision history
Table 12.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
74HC_HCT7540 v.4
20121231
Product data sheet
-
74HC_HCT7540 v.3
-
74HC_HCT7540_CNV v.2
Modifications:
74HC_HCT7540 v.3
Modifications:
•
IOZ added to static characteristics table.
20120827
•
The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
•
Legal texts have been adapted to the new company name where appropriate.
74HC_HCT7540_CNV v.2 19970917
74HC_HCT7540
Product data sheet
Product data sheet
Product specification
-
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 31 December 2012
-
© NXP B.V. 2012. All rights reserved.
13 of 16
74HC7540; 74HCT7540
NXP Semiconductors
Octal Schmitt trigger buffer/line driver; 3-state; inverting
17. Legal information
17.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
17.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
17.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
74HC_HCT7540
Product data sheet
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 31 December 2012
© NXP B.V. 2012. All rights reserved.
14 of 16
74HC7540; 74HCT7540
NXP Semiconductors
Octal Schmitt trigger buffer/line driver; 3-state; inverting
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
17.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
18. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
74HC_HCT7540
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 31 December 2012
© NXP B.V. 2012. All rights reserved.
15 of 16
74HC7540; 74HCT7540
NXP Semiconductors
Octal Schmitt trigger buffer/line driver; 3-state; inverting
19. Contents
1
2
3
4
5
5.1
5.2
6
7
8
9
10
11
12
13
14
15
16
17
17.1
17.2
17.3
17.4
18
19
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 1
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
Pinning information . . . . . . . . . . . . . . . . . . . . . . 2
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
Functional description . . . . . . . . . . . . . . . . . . . 3
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
Recommended operating conditions. . . . . . . . 4
Static characteristics. . . . . . . . . . . . . . . . . . . . . 4
Dynamic characteristics . . . . . . . . . . . . . . . . . . 5
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Transfer characteristics . . . . . . . . . . . . . . . . . . 9
Transfer characteristics waveforms. . . . . . . . . 9
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 13
Legal information. . . . . . . . . . . . . . . . . . . . . . . 14
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 14
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Contact information. . . . . . . . . . . . . . . . . . . . . 15
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2012.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 31 December 2012
Document identifier: 74HC_HCT7540