74LVC14A Hex inverting Schmitt trigger with 5 V tolerant input Rev. 5 — 23 December 2011 Product data sheet 1. General description The 74LVC14A provides six inverting buffers with Schmitt trigger input. It is capable of transforming slowly-changing input signals into sharply defined, jitter-free output signals. The inputs switch at different points for positive and negative-going signals. The difference between the positive voltage VT+ and the negative voltage VT is defined as the input hysteresis voltage VH. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device as a translator in mixed 3.3 V and 5 V applications. 2. Features and benefits Wide supply voltage range from 1.2 V to 3.6 V 5 V tolerant input for interfacing with 5 V logic CMOS low-power consumption Direct interface with TTL levels Unlimited input rise and fall times Inputs accept voltages up to 5.5 V Complies with JEDEC standard JESD8-C/JESD36 (2.7 V to 3.6 V) ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-B exceeds 200 V CDM JESD22-C101E exceeds 1000 V Multiple package options Specified from 40 C to +85 C and from 40 C to +125 C 3. Applications Wave and pulse shapers for highly noisy environments Astable multivibrators Monostable multivibrators 74LVC14A NXP Semiconductors Hex inverting Schmitt trigger with 5 V tolerant input 4. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC14AD 40 C to +125 C SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 74LVC14ADB 40 C to +125 C SSOP14 plastic thin shrink small outline package; 14 leads; body width 5.3 mm SOT337-1 TSSOP14 plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 74LVC14APW 40 C to +125 C 74LVC14ABQ 40 C to +125 C DHVQFN14 plastic dual in-line compatible thermal enhanced very thin SOT762-1 quad flat package; no leads; 14 terminals; body 2.5 3 0.85 mm 5. Functional diagram 1 3 5 9 11 13 1A 1Y 2A 2Y 3A 3Y 4A 4Y 5A 5Y 6A 6Y 2 1 2 3 4 5 6 9 8 11 10 13 12 4 6 8 10 12 mna204 001aac497 Fig 1. Logic symbol Fig 2. IEC logic symbol A Y mna025 Fig 3. Logic diagram for one Schmitt trigger 74LVC14A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 23 December 2011 © NXP B.V. 2011. All rights reserved. 2 of 18 74LVC14A NXP Semiconductors Hex inverting Schmitt trigger with 5 V tolerant input 6. Pinning information 1 1A terminal 1 index area 1Y 2 13 6A 2A 3 12 6Y 1A 1 14 VCC 2Y 4 14A 11 5A 1Y 2 13 6A 3A 5 GND(1) 10 5Y 2A 3 12 6Y 3Y 6 2Y 4 3A 3Y GND 7 8 5 10 5Y 4Y 9 11 5A 6 9 4A GND 14A 7 8 4Y 4A 001aac519 Transparent top view 001aac518 Fig 4. 14 VCC 6.1 Pinning (1) This is not a supply pin. The substrate is attached to this pad using conductive die attach material. There is no electrical or mechanical requirement to solder this pad. However, if it is soldered, the solder land should remain floating or be connected to GND. Pin configuration SO14, SSOP14 and TSSOP14 Fig 5. Pin configuration DHVQFN14 6.2 Pin description Table 2. Pin description Symbol Pin Description 1A, 2A, 3A, 4A, 5A, 6A 1, 3, 5, 9, 11, 13 data input 1Y, 2Y, 3Y, 4Y, 5Y, 6Y 2, 4, 6, 8, 10, 12 data output GND 7 ground (0 V) VCC 14 supply voltage 7. Functional description Table 3. Function table[1] Input nA Output nY L H H L [1] H = HIGH voltage level; L = LOW voltage level 74LVC14A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 23 December 2011 © NXP B.V. 2011. All rights reserved. 3 of 18 74LVC14A NXP Semiconductors Hex inverting Schmitt trigger with 5 V tolerant input 8. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage Conditions Min Max Unit 0.5 +6.5 V [1] 0.5 +6.5 V [2][3] 0.5 VCC + 0.5 V VI input voltage VO output voltage IIK input clamping current VI < 0 V 50 - mA IOK output clamping current VO > VCC or VO < 0 V - 50 mA IO output current VO = 0 V to VCC - 50 mA ICC supply current - 100 mA IGND ground current 100 - mA Tstg storage temperature 65 +150 C - 500 mW total power dissipation Ptot Tamb = 40 C to +125 C [4] [1] The minimum input voltage ratings may be exceeded if the input current ratings are observed. [2] The output voltage ratings may be exceeded if the output current ratings are observed. [3] When VCC = 0 V (Power-down mode), the output voltage can be 3.6 V in normal operation. [4] For SO14 packages: Ptot derates linearly with 8 mW/K above 70 C. For (T)SSOP14 packages: Ptot derates linearly with 5.5 mW/K above 60 C. For DHVQFN14 packages: Ptot derates linearly with 4.5 mW/K above 60 C. 9. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter Conditions VCC supply voltage 1.2 - - V VI input voltage 0 - 5.5 V VO output voltage 0 - VCC V Tamb ambient temperature 40 - +125 C functional 74LVC14A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 23 December 2011 Min Typ Max Unit 1.65 - 3.6 V © NXP B.V. 2011. All rights reserved. 4 of 18 74LVC14A NXP Semiconductors Hex inverting Schmitt trigger with 5 V tolerant input 10. Static characteristics Table 6. Static characteristics At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). Symbol Parameter 40 C to +85 C Conditions Min VOH HIGH-level output voltage LOW-level voltage output VOL Typ[1] 40 C to +125 C Unit Max Min Max VI = VT+ or VT IO = 100 A; VCC = 1.65 V to 3.6 V VCC 0.2 - - VCC 0.3 - V IO = 4 mA; VCC = 1.65 V 1.2 - - 1.05 - V IO = 8 mA; VCC = 2.3 V 1.8 - - 1.65 - V IO = 12 mA; VCC = 2.7 V 2.2 - - 2.05 - V IO = 18 mA; VCC = 3.0 V 2.4 - - 2.25 - V IO = 24 mA; VCC = 3.0 V 2.2 - - 2.0 - V IO = 100 A; VCC = 1.65 V to 3.6 V - - 0.2 - 0.3 V IO = 4 mA; VCC = 1.65 V - - 0.45 - 0.65 V IO = 8 mA; VCC = 2.3 V - - 0.6 - 0.8 V IO = 12 mA; VCC = 2.7 V - - 0.4 - 0.6 V IO = 24 mA; VCC = 3.0 V - - 0.55 - 0.8 V VI = VT+ or VT II input leakage current VCC = 3.6 V; VI = 5.5 V or GND - 0.1 5 - 20 A ICC supply current VCC = 3.6 V; VI = VCC or GND; IO = 0 A - 0.1 10 - 40 A ICC additional supply current per input pin; VCC = 2.7 V to 3.6 V; VI = VCC 0.6 V; IO = 0 A - 5 500 - 5000 A CI input capacitance VCC = 0 V to 3.6 V; VI = GND to VCC - 4.0 - - - pF [1] All typical values are measured at VCC = 3.3 V (unless stated otherwise) and Tamb = 25 C. 11. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 7. Symbol Parameter tpd propagation delay 40 C to +85 C Conditions Min Max Min Max - 16 - - - ns VCC = 1.65 V to 1.95 V 1.0 6.1 12.7 1.0 14.7 ns VCC = 2.3 V to 2.7 V 1.5 3.5 7.8 1.5 10.0 ns VCC = 2.7 V 1.5 3.6 7.5 1.5 9.5 ns VCC = 3.0 V to 3.6 V 1.0 3.2 6.4 1.0 8.0 ns - - 1.0 - 1.5 ns nA to nY; see Figure 6 [2] VCC = 1.2 V tsk(o) output skew time 74LVC14A Product data sheet 40 C to +125 C Unit Typ[1] VCC = 3.0 V to 3.6 V [3] All information provided in this document is subject to legal disclaimers. Rev. 5 — 23 December 2011 © NXP B.V. 2011. All rights reserved. 5 of 18 74LVC14A NXP Semiconductors Hex inverting Schmitt trigger with 5 V tolerant input Table 7. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 7. Symbol Parameter 40 C to +85 C Conditions Min CPD [1] power dissipation capacitance 40 C to +125 C Unit Typ[1] Max Min Max [4] per buffer; VI = GND to VCC VCC = 1.65 V to 1.95 V - 9.0 - - - pF VCC = 2.3 V to 2.7 V - 12.5 - - - pF VCC = 3.0 V to 3.6 V - 15.6 - - - pF Typical values are measured at Tamb = 25 C and VCC = 1.2 V, 1.8 V, 2.5 V, 2.7 V, and 3.3 V respectively. [2] tpd is the same as tPLH and tPHL. [3] Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design. [4] CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD VCC2 fi N + (CL VCC2 fo) where: fi = input frequency in MHz; fo = output frequency in MHz CL = output load capacitance in pF VCC = supply voltage in Volts N = number of inputs switching (CL VCC2 fo) = sum of the outputs. 12. Waveforms VI VM nA input VM GND t PHL t PLH VOH VM nY output VOL VM mna344 VM = 1.5 V at VCC 2.7 V VM = 0.5 VCC at VCC < 2.7 V. VOL and VOH are typical output voltage levels that occur with the output load. Fig 6. Propagation delay input (nA) to output (nY) 74LVC14A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 23 December 2011 © NXP B.V. 2011. All rights reserved. 6 of 18 74LVC14A NXP Semiconductors Hex inverting Schmitt trigger with 5 V tolerant input VI tW 90 % negative pulse VM 0V tf tr tr tf VI 90 % positive pulse 0V VM 10 % VM VM 10 % tW VCC PULSE GENERATOR VI VO DUT RT CL RL 001aaf615 Test data is given in Table 8. Definitions for test circuit: RL = Load resistance CL = Load capacitance including jig and probe capacitance RT = Termination resistance should be equal to output impedance Zo of the pulse generator. Fig 7. Table 8. Load circuitry for measuring switching times Test data Supply voltage Input Load VI tr, tf CL RL 1.2 V VCC 2 ns 30 pF 1 k 1.65 V to 1.95 V VCC 2 ns 30 pF 1 k 2.3 V to 2.7 V VCC 2 ns 30 pF 500 2.7 V 2.7 V 2.5 ns 50 pF 500 3.0 V to 3.6 V 2.7 V 2.5 ns 50 pF 500 74LVC14A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 23 December 2011 © NXP B.V. 2011. All rights reserved. 7 of 18 74LVC14A NXP Semiconductors Hex inverting Schmitt trigger with 5 V tolerant input 13. Transfer characteristics Table 9. Transfer characteristics Voltages are referenced to GND (ground = 0 V); see Figure 8. Symbol Parameter Tamb = 40 C to +85 C Conditions Min positive-going threshold voltage VT+ negative-going threshold voltage VT hysteresis voltage (VT+ VT) VH Min Max VCC = 1.2 V 0.2 1.0 0.2 1.0 V VCC = 1.65 V 0.4 1.3 0.4 1.3 V VCC = 1.95 V 0.6 1.5 0.6 1.5 V VCC = 2.3 V 0.8 1.7 0.8 1.7 V VCC = 2.5 V 0.9 1.7 0.9 1.7 V VCC = 2.7 V 1.1 2 1.1 2 V VCC = 3 V 1.2 2 1.2 2 V VCC = 3.6 V 1.2 2 1.2 2 V VCC = 1.2 V 0.12 0.75 0.12 0.75 V VCC = 1.65 V 0.15 0.85 0.15 0.85 V VCC = 1.95 V 0.25 0.95 0.25 0.95 V VCC = 2.3 V 0.4 1.1 0.4 1.1 V VCC = 2.5 V 0.4 1.2 0.4 1.2 V VCC = 2.7 V 0.8 1.4 0.8 1.4 V VCC = 3 V 0.8 1.5 0.8 1.5 V VCC = 3.6 V 0.8 1.5 0.8 1.5 V VCC = 1.2 V 0.1 1.0 0.1 1.0 V VCC = 1.65 V 0.2 1.15 0.2 1.15 V VCC = 1.95 V 0.2 1.25 0.2 1.25 V VCC = 2.3 V 0.3 1.3 0.3 1.3 V VCC = 2.5 V 0.3 1.3 0.3 1.3 V VCC = 2.7 V 0.3 1.1 0.3 1.1 V 0.3 1.2 0.3 1.2 V 0.3 1.2 0.3 1.2 V VCC = 3 V VCC = 3.6 V [1] Max Tamb = 40 C to +125 C Unit [1] Typical transfer characteristic is displayed in Figure 9. 74LVC14A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 23 December 2011 © NXP B.V. 2011. All rights reserved. 8 of 18 74LVC14A NXP Semiconductors Hex inverting Schmitt trigger with 5 V tolerant input 14. Waveforms transfer characteristics VT+ VO VI VT− VH VO VI VH VT− Fig 8. VT+ mna208 mna207 VT at 20 % and VT+ at 70 % Definition of VT+, VT and VH mna582 5 I CC (mA) 4 3 2 1 0 0 0.6 1.2 1.8 2.4 3 VI (V) VCC = 3.3 V. Fig 9. Typical transfer characteristic 74LVC14A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 23 December 2011 © NXP B.V. 2011. All rights reserved. 9 of 18 74LVC14A NXP Semiconductors Hex inverting Schmitt trigger with 5 V tolerant input 15. Application information mna581 2.5 I CC (mA) 2.0 (1) 1.5 (2) 1.0 0.5 2.1 2.4 2.7 3.0 3.3 3.6 VCC (V) 3.9 (1) Positive-going edge. (2) Negative going-edge. Linear change of VI between 0.8 V to 2.0 V. All values given are typical unless otherwise specified. Fig 10. Average supply current as a function of supply voltage R C mna035 1 1 f = --- --------------------- at VCC = 3.0 V T 0.8 RC Fig 11. Relaxation oscillator 74LVC14A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 23 December 2011 © NXP B.V. 2011. All rights reserved. 10 of 18 74LVC14A NXP Semiconductors Hex inverting Schmitt trigger with 5 V tolerant input 16. Package outline SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 D E A X c y HE v M A Z 8 14 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 7 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 8.75 8.55 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 0.01 0.019 0.0100 0.35 0.014 0.0075 0.34 0.16 0.15 0.010 0.057 inches 0.069 0.004 0.049 0.05 0.244 0.039 0.041 0.228 0.016 0.028 0.024 0.01 0.01 0.028 0.004 0.012 θ 8o o 0 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT108-1 076E06 MS-012 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig 12. Package outline SOT108-1 (SO14) 74LVC14A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 23 December 2011 © NXP B.V. 2011. All rights reserved. 11 of 18 74LVC14A NXP Semiconductors Hex inverting Schmitt trigger with 5 V tolerant input SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm D SOT337-1 E A X c y HE v M A Z 8 14 Q A2 A (A 3) A1 pin 1 index θ Lp L 7 1 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 6.4 6.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.63 0.9 0.7 0.2 0.13 0.1 1.4 0.9 8o o 0 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT337-1 REFERENCES IEC JEDEC JEITA MO-150 EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig 13. Package outline SOT337-1 (SSOP14) 74LVC14A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 23 December 2011 © NXP B.V. 2011. All rights reserved. 12 of 18 74LVC14A NXP Semiconductors Hex inverting Schmitt trigger with 5 V tolerant input TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 E D A X c y HE v M A Z 8 14 Q (A 3) A2 A A1 pin 1 index θ Lp L 1 7 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.72 0.38 8o o 0 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT402-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18 MO-153 Fig 14. Package outline SOT402-1 (TSSOP14) 74LVC14A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 23 December 2011 © NXP B.V. 2011. All rights reserved. 13 of 18 74LVC14A NXP Semiconductors Hex inverting Schmitt trigger with 5 V tolerant input DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT762-1 14 terminals; body 2.5 x 3 x 0.85 mm A B D A A1 E c detail X terminal 1 index area terminal 1 index area C e1 e 2 6 y y1 C v M C A B w M C b L 1 7 Eh e 14 8 13 9 Dh X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A(1) max. A1 b c D (1) Dh E (1) Eh e e1 L v w y y1 mm 1 0.05 0.00 0.30 0.18 0.2 3.1 2.9 1.65 1.35 2.6 2.4 1.15 0.85 0.5 2 0.5 0.3 0.1 0.05 0.05 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT762-1 --- MO-241 --- EUROPEAN PROJECTION ISSUE DATE 02-10-17 03-01-27 Fig 15. Package outline SOT762-1 (DHVQFN14) 74LVC14A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 23 December 2011 © NXP B.V. 2011. All rights reserved. 14 of 18 74LVC14A NXP Semiconductors Hex inverting Schmitt trigger with 5 V tolerant input 17. Abbreviations Table 10. Abbreviations Acronym Description CDM Charged Device Model DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 18. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74LVC14A v.5 20111223 Product data sheet - 74LVC14A v.4 Modifications: • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • • Legal texts have been adapted to the new company name where appropriate. Table 4, Table 5, Table 6, Table 7 and Table 8: values added for lower voltage ranges. 74LVC14A v.4 20050215 Product data sheet - 74LVC14A v.3 74LVC14A v.3 20030228 Product specification - 74LVC14A v.2 74LVC14A v.2 20020315 Product specification - 74LVC14A v.1 74LVC14A v.1 19980428 Product specification 74LVC14A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 23 December 2011 - © NXP B.V. 2011. All rights reserved. 15 of 18 74LVC14A NXP Semiconductors Hex inverting Schmitt trigger with 5 V tolerant input 19. Legal information 19.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 19.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. 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Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 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Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. 74LVC14A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 23 December 2011 © NXP B.V. 2011. All rights reserved. 16 of 18 74LVC14A NXP Semiconductors Hex inverting Schmitt trigger with 5 V tolerant input Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond 19.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 20. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] 74LVC14A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 23 December 2011 © NXP B.V. 2011. All rights reserved. 17 of 18 74LVC14A NXP Semiconductors Hex inverting Schmitt trigger with 5 V tolerant input 21. Contents 1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 12 13 14 15 16 17 18 19 19.1 19.2 19.3 19.4 20 21 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recommended operating conditions. . . . . . . . 4 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Dynamic characteristics . . . . . . . . . . . . . . . . . . 5 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Transfer characteristics . . . . . . . . . . . . . . . . . . 8 Waveforms transfer characteristics. . . . . . . . . 9 Application information. . . . . . . . . . . . . . . . . . 10 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 15 Legal information. . . . . . . . . . . . . . . . . . . . . . . 16 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 16 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Contact information. . . . . . . . . . . . . . . . . . . . . 17 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2011. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 23 December 2011 Document identifier: 74LVC14A