LVDS Interface ICs 4bit LVDS Driver BU90LV047A ●Description LVDS Interface IC of ROHM "Serializer" "Deserializer" operate from 8MHz to 150MHz wide clock range, and number of bits range is from 35 to 70. Data is transmitted seven times (7X) stream and reduce cable number by 3(1/3) or less. The ROHM's LVDS has low swing mode to be able to expect further low EMI. Driver and Receiver of 4 bits operate to 250MHz. It can be used for a variety of purposes, home appliances such as LCD-TV, business machines such as decoders, instruments, and medical equipment. ●Features ■>500 Mbps (250 MHz) switching rates ■Flow-through pinout simplifies PCB layout. ■300 ps typical differential skew ■400 ps maximum differential skew ■2.8 ns maximum propagation delay ■3.3V power supply design ■±200mV and ±350mV Selectable differential signaling ■Interoperable with existing 5V LVDS receivers ■High impedance on LVDS outputs on power down ■Conforms to TIA/EIA-644 LVDS Standard ■Industrial operating temperature range (-40℃ to +85℃) ●Applications Car Navigation System Copier Digital TV (Signal System) FA equipment Medical equipment Vending machine, Ticket vending machine ●Precaution ■This chip is not designed to protect from radioactivity. ■This document may be used as strategic technical data which subjects to COCOM regulations. Jun.2008 ●Block Diagram SL DOUT1+ D1 DIN1 DOUT1- DOUT2+ D2 DIN2 DOUT2- DOUT3+ D3 DIN3 DOUT3- DOUT4+ D4 DIN4 DOUT4- EN Figure 1. Block Diagram 2 / 12 ●SSOP-B16 Package Outline and Specification Product No. 5.0±0.2 16 9 4.4±0.2 Lot No. 0.3MIN 6.4±0.3 LV47A 1PIN MARK 1 8 0.10 1.15±0.1 0.15±0.1 0.65 0.10 0.22±0.1 （UNIT:ｍｍ） Figure 2. SSOP-B16 Package Outline and Specification 3 / 12 ●Pin Configuration EN 1 16 DOUT1- DIN1 2 15 DOUT1+ DIN2 3 14 DOUT2+ VCC 4 13 DOUT2- GND 5 12 DOUT3- DIN3 6 11 DOUT3+ DIN4 7 10 DOUT4+ SL 8 9 DOUT4- Figure 3. Pin Diagram (Top View) 4 / 12 ●Pin Description Table 1 : Pin Description Pin Name Pin No. Type Descriptions DIN 2, 3, 6, 7 LVCMOS In DOUT+ 10, 11, 14, 15 LVDS Out Non-inverting driver output pin, LVDS levels DOUT- 9, 12, 13, 16 LVDS Out Inverting driver output pin, LVDS levels SL 8 LVCMOS In EN 1 LVCMOS In VCC 4 Power GND 5 GND Driver input pin, LVCMOS compatible Swing Level select pin : When SL is high, the driver is reduce swing level (200mV). When SL is low or open, the driver is normal swing level (350mV). Driver enable pin: When EN is low or open, the driver is disabled. When EN is high, the driver is enabled. Power supply pin, 3.3V±0.3V Ground pin ●Function Description EN SL H L or Open H H All other combinations of EN, SL inputs INPUT DIN L H L H X OUTPUTS DOUT+ DOUTL H H L L H H L Z 5 / 12 Z Swing Level 350mV 200mV ●Absolute Maximum Ratings Item Symbol Supply voltage Input voltage Output voltage Storage temperature range VCC VIN VOUT Tstg Value Min. Max. -0.3 -0.3 -0.3 -55 4.0 VCC+0.3 VCC+0.3 125 Unit V V V ℃ ●Package Power Package SSOP-B16 PD(mW) DERATING(mW/℃) ※1 400 4.0 450*2 4.5*2 ※1 At temperature Ta > 25℃ ※2 Package power when mounting on the PCB board. The size of PCB board :70×70×1.6（mm3） The material of PCB board :The FR4 glass epoxy board.(3% or less copper foil area) ●Recommended Operating Conditions Min. Value Typ. Max. VCC 3.0 3.3 3.6 V Topr -40 - 85 ℃ Item Symbol Supply voltage Operating temperature range 6 / 12 Unit Condition ●DC Characteristics Symbol Parameter Conditions Pin Min Typ Max Units 250 350 450 mV - 1.42 1.6 V VOD1 Differential Output Voltage VOH１ Output High Voltage VOL1 Output Low Voltage 0.90 1.08 - V VOD2 Differential Output Voltage 120 200 300 mV VOH2 Output High Voltage - 1.35 1.50 V VOL2 Output Low Voltage SL= VCC , RL = 100Ω (Figure 4) DOUTDOUT+ 1.00 1.15 - V Change in Magnitude of VOD for Complementary Output States SL = VCC or - 1 35 |mV| Offset Voltage RL = 100Ω (Figure 4) 1.125 1.25 1.375 V - 1 25 |mV| △VOD VOS △VOS SL= GND, RL = 100Ω (Figure 4) GND, Change in Magnitude of Vos for Complementary Output States VIH Input High Voltage DIN, VCC×0.8 - VCC V VIL Input Low Voltage SL GND - VCC×0.2 V EN -10 - +10 μA -1.5 -0.8 - V - -5.4 -9.0 mA - -5.4 -9.0 mA -20 ±1 +20 μA - 20 - mA - 20 - mA - 3 - mA Input Current VIN = 0V or VCC, Other Input = VCC or GND VCL Input Clamp Voltage ICL = -18mA IOS Output Short Circuit Current ENABLED, DIN = VCC, DOUT+ = 0V or DIN = GND, DOUT- = 0V IOSD Differential Output Short Circuit Current ENABLED, VOD = 0V IOFF Power-off Leakage VOUT = 0V or 3.6V, VCC =0V or Open II ICC ICCL ICCZ No Load Supply Current Drivers Enabled Load Supply Current Drivers Enabled No Load Supply Current Drivers Disabled DIN = VCC or GND RL = 100Ω All Channels, DIN = VCC or GND (all outputs) DIN = VCC or GND, EN = GND, SL = GND 7 / 12 DOUTDOUT+ VCC ●Switching Characteristics VCC = +3.3V ±0.3V, Topr = -40℃ to +85℃ Symbol Parameter Conditions Min Typ Max Units tPHLD Differential Propagation Delay High to Low RL = 100Ω, CL = 15pF 0.5 1.7 2.8 ns tPLHD Differential Propagation Delay Low to High (Figure 5 and Figure 6) 0.5 1.7 2.8 ns 0 0.3 0.4 ns tSKD1 Differential Pulse Skew |tPHLD – tPLHD| tSKD2 Channel-to-Channel Skew 0 0.4 0.5 ns tSKD3 Differential Part to Part Skew 0 - 1.0 ns tSKD4 Differential Part to Part Skew 0 - 1.2 ns tTLH Rise Time - 0.5 1.5 ns tTHL Fall Time - 0.5 1.5 ns tPHZ Disable Time High to Z RL = 100Ω, CL = 15pF - 2 5 ns tPLZ Disable Time Low to Z (Figure 7 and Figure8) - 2 5 ns tPZH Enable Time Z to High - 3 7 ns tPZL Enable Time Z to Low - 3 7 ns fMax Maximum Operating Frequency 250 - - MHz DOUT+ RL/2 Vcc GND DIN VOS D S1 RL/2 Driver ENABLED Figure 4. DOUT- Driver VOD and VOS Test Circuit 8 / 12 VOD CL DOUT+ DIN Generator D RL 50Ω DOUTDriver ENABLED CL Figure 5. Driver Propagation Delay and Transition Time Test Circuit 3V DIN 1.5V 1.5V 0V ｔPLHD ｔPHLD VOH DOUT0V（Differential) 0V DOUT+ VOL 80％ 80％ VDIFF 0V VDIFF = DOUT+ - DOUT- 0V 20％ 20％ ｔTLH Figure 6. ｔTHL Driver Propagation Delay and Transition Time Waveforms CL DOUT+ VCC 50O DIN D GND 50O +1.2V DOUT- CL EN Generator 50O 1/ 4 BU90LV Figure 7. 047 A Driver 3-STATE Delay Test Circuit 9 / 12 Parameter Measurement Information (Continued) 3V EN WHEN SL = L or Open 1.5V 1.5V 0V ｔPHZ ｔPZH VOH DOUT+ WHEN DIN = Vcc DOUT- WHEN DIN = GND 50％ 50％ 1.2V 1.2V DOUT+ WHEN DIN = GND DOUT- WHEN DIN = Vcc 50％ 50％ VOL ｔPLZ Figure 8. ｔPZL Driver 3-STATE Delay Waveform Typical Application ENABLE 1/4 BU90LV048 DATA INPUT RT 1/4 BU90LV047A Figure 9. Point-to-Point Application 10 / 12 100O DATA OUTPU T Typical Application (Continued) 3V DIN 0V VOH DOUTSINGLE-ENDED DOUT+ DOUT+ - DOUTDIFFERENTIAL OUTPUT ｜VOD｜ VOS (1.25V typical) VOL +VOD 0V(DIFF.) Figure 10. 0V Driver Output Levels 11 / 12 +VSS -VOD Catalog No.08T236A '08.6 ROHM ©