TI SN65LVDS047

SLLS416B − JUNE 2000 − REVISED DECEMBER 2003
D >400 Mbps (200 MHz) Signaling Rates
D Flow-Through Pinout Simplifies PCB
D
D
D
D
D
D
D
D
D OR PW PACKAGE
(Marked as LVDS047)
(TOP VIEW)
Layout
300 ps Maximum Differential Skew
Propagation Delay Times 1.8 ns (Typical)
3.3 V Power Supply Design
±350 mV Differential Signaling
High Impedance on LVDS Outputs on
Power Down
Conforms to TIA/EIA-644 LVDS Standard
Industrial Operating Temperature Range
(−40°C to 85°C)
Available in SOIC and TSSOP Packages
EN
DIN1
DIN2
VCC
GND
DIN3
DIN4
EN
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
DOUT1−
DOUT1+
DOUT2+
DOUT2−
DOUT3−
DOUT3+
DOUT4+
DOUT4−
functional block diagram
DIN1
D1
DIN2
D2
DIN3
D3
DIN4
D4
DOUT1−
description
The SN65LVDS047 is a quad differential line
driver that implements the electrical characteristics of low-voltage differential signaling (LVDS).
This signaling technique lowers the output voltage
levels of 5-V differential standard levels (such as
EIA/TIA-422B) to reduce the power, increase the
switching speeds, and allow operation with a
3.3-V supply rail. Any of the four current-mode
drivers will deliver a minimum differential output
voltage magnitude of 247 mV into a 100-Ω load
when enabled.
DOUT1+
DOUT2+
DOUT2−
DOUT3+
DOUT3−
DOUT4+
DOUT4−
EN
EN
The intended application of this device and
signaling technique is for point-to-point and multidrop baseband data transmission over controlled
impedance media of approximately 100 Ω. The transmission media may be printed-circuit board traces,
backplanes, or cables. The ultimate rate and distance of data transfer is dependent upon the attenuation
characteristics of the media, the noise coupling to the environment, and other system characteristics.
The SN65LVDS047 is characterized for operation from −40°C to 85°C.
TRUTH TABLE
INPUT
DIN
ENABLES
EN
OUTPUTS
EN
L
H
X
H
L or OPEN
All other conditions
H = high level, L = low level,
Z = high impedance (off)
DOUT+
DOUT−
L
H
H
L
Z
Z
X = irrelevant,
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  2001 − 2003, Texas Instruments Incorporated
!" #!$% &"'
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1
SLLS416B − JUNE 2000 − REVISED DECEMBER 2003
equivalent input and output schematic diagrams
VCC
VCC
50 Ω
DIN or EN
Input
50 Ω
10 kΩ
Output
7V
300 kΩ
7V
absolute maximum ratings over operating free-air temperature (see Note 1) (unless otherwise
noted)†
Supply voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 4 V
Input voltage range, VI(DIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to (VCC +0.3 V)
Enable input voltage (EN, EN ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to (VCC +0.3 V)
Output voltage, VO(DOUT+,DOUT−) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to (Vcc + 0.5 V)
Bus-pin (DOUT+,DOUT−) electrostatic discharge, (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >10 kV
Short circuit duration (DOUT+,(DOUT−) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential I/O bus voltages, are with respect to network ground terminal.
2. Tested in accordance with MIL-STD-883C Method 3015.7.
DISSIPATION RATING TABLE
PACKAGE
TA ≤ 25°C
POWER RATING
OPERATING FACTOR‡
ABOVE TA = 25°C
TA = 85°C
POWER RATING
D
950 mW
7.6 mW/°C
494 mW
PW
774 mW
6.2 mW/°C
402 mW
‡ This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with
no air flow.
recommended operating conditions
Supply voltage, VCC
Operating free-air temperature, TA
2
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MIN
NOM
MAX
UNIT
3
3.3
3.6
V
−40
25
85
°C
SLLS416B − JUNE 2000 − REVISED DECEMBER 2003
electrical characteristics over recommended operating free-air temperature range (see Notes 3, 4)
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
VOD
Differential output voltage
n|VOD|
Change in magnitude of VOD for
complementary output states
VOC(SS)
Steady-state, common-mode output
voltage
nVOC(SS)
Change in steady-state common-mode
output voltage between logic states
VOH
VOL
Output high voltage
VIH
VIL
Input high voltage
IIH
IIL
Input high current
VIK
Input clamp voltage
IOS
Output short circuit current (see Note 5)
IOSD
Differential output short circuit current
(see Note 5)
IOFF
Power-off leakage
IOZ
Output 3-state current
ICC
No load supply current, drivers enabled
DIN = VCC or GND
ICCL
Loaded supply current, drivers enabled
RL = 100 Ω all channels,
DIN = VCC or GND (all inputs)
RL = 100 Ω (see Figure 1)
Output low voltage
TYP†
MAX
UNIT
250
310
450
mV
1
35
|mV|
1.17
1.375
1
25
|mV|
1.33
1.6
V
1.125
0.90
1.02
2
Input low voltage
Input low current
MIN
V
3
10
µA
10
µA
GND
−10
−10
1
ICL = −18 mA
Enabled,
DIN = VCC,
DIN = GND,
−1.5
−0.8
−3.1
V
V
−9
mA
−9
mA
−1
1
µA
−1
1
µA
Enabled, VOD = 0 V
VO = 0 V or 3.6 V, VCC = 0 V or Open
EN = 0.8 V and EN = 2 V,
VO = 0 V or VCC
V
VCC
0.8
VIN = VCC or 2.5 V
VIN = GND or 0.4 V
DOUT+ = 0 V or
DOUT− = 0 V
V
7
20
mA
26
mA
ICC(Z)
No load supply current, drivers disabled
DIN = VCC or GND, EN = GND, EN = VCC
0.5
1.3
mA
† All typical values are given for: VCC = 3.3 V, TA = 25°C.
NOTES: 3. Current into device pin is defined as positive. Current out of the device is defined as negative. All voltages are referenced to ground,
unless otherwise specified.
4. The SN65LVDS047 is a current mode device and only functions within data sheet specifications when a resistive load is applied
to the driver outputs, 90 Ω to 110 Ω typical range.
5. Output short circuit current (IOS) is specified as magnitude only, minus sign indicates direction only.
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3
SLLS416B − JUNE 2000 − REVISED DECEMBER 2003
switching characteristics over recommended operating conditions (see Notes 6, 7, and 12) (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP†
MAX
2.8
ns
UNIT
tPHL
tPLH
Differential propagation delay, high-to-low
1.4
1.8
Differential propagation delay, low-to-high
1.4
1.8
2.8
ns
tSK(p)
tSK(o)
Differential pulse skew (tPHLD − tPLHD) (see Note 8)
50
300
ps
40
300
ps
tSK(pp)
tSK(lim)
Differential part-to-part skew (see Note 10)
tr
tf
Rise time
tPHZ
tPLZ
tPZH
Disable time low to Z
tPZL
Enable time Z to low
Channel-to−channel skew (see Note 9)
RL = 100 Ω,,
,, CL = 15 pF
(see Figures 2 and 3)
1
ns
1.2
ns
0.5
1.5
ns
Fall time
0.5
1.5
ns
Disable time high to Z
5.5
8
ns
5.5
8
ns
8.5
12
ns
8.5
12
ns
Differential part-to-part skew (see Note 11)
RL = 100 Ω,, CL = 15 pF
(see Figures 4 and 5)
Enable time Z to high
f(MAX)
Maximum operating frequency (see Note 13)
250
MHz
† All typical values are given for: VCC = 3.3 V, TA = 25°C.
NOTES: 6. Generator waveform for all tests unless otherwise: f = 1 MHz, Zo = 50 Ω, tr < 1 ns, and tf < 1 ns.
7. CL includes probe and jig capacitance.
8. tSK(p)|tPHL−tPLH| is the magnitude difference in differential propagation delay time between the positive going edge and
the negative going edge of the same channel.
9. tSK(o) is the differential channel-to-channel skew of any event on the same device.
10. tSK(pp) is the differential part-to-part skew, and is defined as the difference between the minimum and the maximum specified
differential propagation delays. This specification applies to devices at the same VCC and within 5°C of each other within the
operating temperature range.
11. tSK(lim) part-to-part skew, is the differential channel-to-channel skew of any event between devices. This specification applies to
devices over recommended operating temperature and voltage ranges, and across process distribution. tSK(lim) is defined as
|Min − Max| differential propagation delay.
12. All input voltages are for one channel unless otherwise specified. Other inputs are set to GND.
13. f(MAX) generator input conditions: tr = tf < 1 ns (0% to 100%), 50% duty cycle, 0 V to 3 V. Output criteria: duty cycle = 45% to 55,
VOD > 250 mV, all channels switching
4
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SLLS416B − JUNE 2000 − REVISED DECEMBER 2003
PARAMETER MEASUREMENT INFORMATION
DOUT+
VCC
DIN
GND
RL/2
VOC
D
S1
VOD
RL/2
Driver Enable
DOUT−
Figure 1. Driver VOD and VOC Test Circuit
CL
DOUT+
Generator
DIN
RL
D
50 Ω
DOUT−
Driver Enable
CL
Figure 2. Driver Propagation Delay and Transition Time Test Circuit
3V
1.5 V
DIN
1.5 V
0V
tPLH
tPHL
VOH
DOUT−
0V
0 V (Differential)
DOUT+
V(DIFF)
VOL
20%
80%
0V
80%
0V
20%
V(DIFF) = DOUT+ − DOUT−
tr
tf
Figure 3. Driver Propagation Delay and Transition Time Waveforms
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5
SLLS416B − JUNE 2000 − REVISED DECEMBER 2003
PARAMETER MEASUREMENT INFORMATION
CL
DOUT+
50 Ω
VCC
DIN
D
GND
DOUT−
EN
Generator
1.2 V
50 Ω
CL
EN
50 Ω
1/4 65LVDS047
Figure 4. Driver 3-State Delay Test Circuit
3V
1.5 V
EN When EN = GND or Open
1.5 V
0V
3V
EN When EN = VCC
1.5 V
1.5 V
0V
tPHZ
tPZH
VOH
DOUT+ When DIN = VCC
DOUT− When DIN = GND
50%
50%
1.2 V
1.2 V
DOUT+ When DIN = GND
DOUT− When DIN = VCC
50%
50%
VOL
tPLZ
tPZL
Figure 5. Driver 3-State Delay Waveform
6
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SLLS416B − JUNE 2000 − REVISED DECEMBER 2003
TYPICAL CHARACTERISTICS
OUTPUT HIGH VOLTAGE
vs
POWER SUPPLY VOLTAGE
OUTPUT LOW VOLTAGE
vs
POWER SUPPLY VOLTAGE
1.36
1.061
TA = 25°C
Load = 100 Ω
1.35
VOL − Output Low Voltage − V
VOH − Output High Voltage − V
TA = 25°C
Load = 100 Ω
1.34
1.33
1.32
1.31
1.30
1.056
1.051
1.046
1.041
1.036
3
3.3
VCC − Power Supply Voltage − V
3.6
3
Figure 6
3.6
Figure 7
OUTPUT SHORT CIRCUIT CURRENT
vs
POWER SUPPLY VOLTAGE
DIFFERENTIAL OUTPUT VOLTAGE
vs
POWER SUPPLY VOLTAGE
−3.30
350
TA = 25°C
VI = VCC or GND,
VO = 0 V
−3.25
VOD − Differential Output Voltage − mV
I OS− Output Short Circuit Current − mA
3.3
VCC − Power Supply Voltage − V
−3.20
−3.15
−3.10
−3.05
−3.00
3
3.3
VCC − Power Supply Voltage − V
3.6
Figure 8
TA = 25°C
Load = 100 Ω
330
310
290
270
250
3
3.3
VCC − Power Supply Voltage − V
3.6
Figure 9
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7
SLLS416B − JUNE 2000 − REVISED DECEMBER 2003
TYPICAL CHARACTERISTICS
COMMON-MODE OUTPUT VOLTAGE
vs
POWER SUPPLY VOLTAGE
POWER SUPPLY CURRENT
vs
FREQUENCY
60
TA = 25°C
Load = 100 Ω
1.18
I CC − power Supply Current − mA
VOC− Common-Mode Output Voltage − V
1.20
1.16
1.14
1.12
1.10
3
3.3
VCC − Power Supply Voltage − V
3.6
Figure 10
8
50
TA = 25°C
Load = 100 Ω
40
All Switching
30
20
10
0
0.01
0.1
10
1
f − Frequency − MHz
Figure 11
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100
1000
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
0,65
14
0,10 M
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°– 8°
A
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
8
14
16
20
24
28
A MAX
3,10
5,10
5,10
6,60
7,90
9,80
A MIN
2,90
4,90
4,90
6,40
7,70
9,60
DIM
4040064/F 01/97
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-153
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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