PD - 95378 IRFB59N10DPbF IRFS59N10DPbF IRFSL59N10DPbF SMPS MOSFET Applications l High frequency DC-DC converters l UPS / Motor Control Inverters l Lead-Free HEXFET® Power MOSFET VDSS RDS(on) max ID 100V 0.025Ω 59A Benefits l Low Gate-to-Drain Charge to Reduce Switching Losses l Fully Characterized Capacitance Including Effective COSS to Simplify Design, (See App. Note AN1001) TO-220AB l Fully Characterized Avalanche Voltage IRFB59N10D and Current D2Pak IRFS59N10D TO-262 IRFSL59N10D Absolute Maximum Ratings Parameter ID @ TC = 25°C ID @ TC = 100°C IDM PD @TA = 25°C PD @TC = 25°C VGS dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torqe, 6-32 or M3 screw Max. 59 42 236 3.8 200 1.3 ± 30 3.3 -55 to + 175 Units A W W/°C V V/ns °C 300 (1.6mm from case ) 10 lbf•in (1.1N•m) Typical SMPS Topologies l l Half-bridge and Full-bridge DC-DC Converters Full-bridge Inverters Notes through are on page 11 www.irf.com 1 06/07/04 IRFB/IRFS/IRFSL59N10DPbF Static @ TJ = 25°C (unless otherwise specified) Parameter Drain-to-Source Breakdown Voltage ∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance VGS(th) Gate Threshold Voltage V(BR)DSS IDSS Drain-to-Source Leakage Current IGSS Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Min. 100 ––– ––– 3.0 ––– ––– ––– ––– Typ. ––– 0.11 ––– ––– ––– ––– ––– ––– Max. Units Conditions ––– V VGS = 0V, ID = 250µA ––– V/°C Reference to 25°C, ID = 1mA 0.025 Ω VGS = 10V, ID = 35.4A 5.5 V VDS = VGS, ID = 250µA 25 VDS = 100V, VGS = 0V µA 250 VDS = 80V, VGS = 0V, TJ = 150°C 100 VGS = 30V nA -100 VGS = -30V Dynamic @ TJ = 25°C (unless otherwise specified) gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Coss Coss Coss eff. Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance Min. 18 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– Typ. ––– 76 24 36 16 90 20 12 2450 740 190 3370 390 690 Max. Units Conditions ––– S VDS = 50V, ID = 35.4A 114 ID = 35.4A 36 nC VDS = 80V 54 VGS = 10V, ––– VDD = 50V ––– I D = 35.4A ns ––– RG = 2.5Ω ––– VGS = 10V ––– VGS = 0V ––– VDS = 25V ––– pF ƒ = 1.0MHz ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz ––– VGS = 0V, VDS = 80V, ƒ = 1.0MHz ––– VGS = 0V, VDS = 0V to 80V Avalanche Characteristics Parameter EAS IAR EAR Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Typ. Max. Units ––– ––– ––– 510 35.4 20 mJ A mJ Typ. Max. Units ––– 0.50 ––– ––– 0.75 ––– 62 40 Thermal Resistance Parameter RθJC RθCS RθJA RθJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient Junction-to-Ambient °C/W Diode Characteristics IS ISM VSD trr Qrr ton 2 Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol 59 ––– ––– showing the A G integral reverse ––– ––– 236 S p-n junction diode. ––– ––– 1.3 V TJ = 25°C, IS = 35.4A, VGS = 0V ––– 130 200 ns TJ = 25°C, IF = 35.4A ––– 0.75 1.1 µC di/dt = 100A/µs Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) www.irf.com IRFB/IRFS/IRFSL59N10DPbF 1000 1000 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V I D , Drain-to-Source Current (A) I D , Drain-to-Source Current (A) 100 10 1 5.0V 0.1 20µs PULSE WIDTH TJ = 25 °C 0.01 0.1 1 10 100 10 5.0V 1 100 2.5 RDS(on) , Drain-to-Source On Resistance (Normalized) I D , Drain-to-Source Current (A) 100 TJ = 175 ° C 10 1 TJ = 25 ° C V DS = 50V 20µs PULSE WIDTH 6 8 10 12 Fig 3. Typical Transfer Characteristics www.irf.com 10 100 Fig 2. Typical Output Characteristics 1000 VGS , Gate-to-Source Voltage (V) 1 VDS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics 0.1 20µs PULSE WIDTH TJ = 175 ° C 0.1 0.1 VDS , Drain-to-Source Voltage (V) 4 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP TOP 14 ID = 59A 2.0 1.5 1.0 0.5 0.0 -60 -40 -20 0 VGS = 10V 20 40 60 80 100 120 140 160 180 TJ , Junction Temperature ( °C) Fig 4. Normalized On-Resistance Vs. Temperature 3 IRFB/IRFS/IRFSL59N10DPbF VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd C, Capacitance(pF) Coss = Cds + Cgd 10000 Ciss 1000 Coss Crss 20 VGS , Gate-to-Source Voltage (V) 100000 100 ID = 35.4A 16 12 8 4 FOR TEST CIRCUIT SEE FIGURE 13 0 1 10 0 100 20 Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage 60 80 100 120 Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 1000 1000 OPERATION IN THIS AREA LIMITED BY RDS(on) 100 ID , Drain Current (A) ISD , Reverse Drain Current (A) 40 QG , Total Gate Charge (nC) VDS, Drain-to-Source Voltage (V) TJ = 175 ° C 10 TJ = 25 ° C 10us 100 100us 1ms 10 1 0.1 0.2 10ms V GS = 0 V 0.6 1.0 1.4 1.8 VSD ,Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage 4 VDS = 80V VDS = 50V VDS = 20V TC = 25 ° C TJ = 175 ° C Single Pulse 1 2.2 1 10 100 1000 VDS , Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area www.irf.com IRFB/IRFS/IRFSL59N10DPbF 60 VGS 50 ID , Drain Current (A) RD V DS D.U.T. RG + -VDD 40 VGS Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 30 Fig 10a. Switching Time Test Circuit 20 VDS 10 90% 0 25 50 75 100 125 150 175 TC , Case Temperature ( °C) 10% VGS td(on) Fig 9. Maximum Drain Current Vs. Case Temperature tr t d(off) tf Fig 10b. Switching Time Waveforms Thermal Response (Z thJC ) 1 D = 0.50 0.20 0.1 0.10 PDM 0.05 t1 0.02 0.01 t2 SINGLE PULSE (THERMAL RESPONSE) Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.01 0.00001 0.0001 0.001 0.01 0.1 1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRFB/IRFS/IRFSL59N10DPbF 15V DRIVER L VDS D.U.T RG + V - DD IAS 20V A 0.01Ω tp Fig 12a. Unclamped Inductive Test Circuit EAS , Single Pulse Avalanche Energy (mJ) 1200 ID 14.5A 25.0A BOTTOM 35.4A TOP 900 600 300 0 25 50 75 100 125 150 175 Starting TJ , Junction Temperature ( °C) V(BR)DSS tp Fig 12c. Maximum Avalanche Energy Vs. Drain Current I AS Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. QG VGS 50KΩ 12V .2µF .3µF QGS QGD D.U.T. VG + V - DS VGS 3mA Charge Fig 13a. Basic Gate Charge Waveform 6 IG ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit www.irf.com IRFB/IRFS/IRFSL59N10DPbF Peak Diode Recovery dv/dt Test Circuit Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer + D.U.T + - - + RG • • • • dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test Driver Gate Drive P.W. Period D= + - VDD P.W. Period VGS=10V * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Curent Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFET® Power MOSFETs www.irf.com 7 IRFB/IRFS/IRFSL59N10DPbF TO-220AB Package Outline Dimensions are shown in millimeters (inches) 2.87 (.113) 2.62 (.103) 10.54 (.415) 10.29 (.405) -B- 3.78 (.149) 3.54 (.139) 4.69 (.185) 4.20 (.165) -A- 1.32 (.052) 1.22 (.048) 6.47 (.255) 6.10 (.240) 4 15.24 (.600) 14.84 (.584) LEAD ASSIGNMENTS 1.15 (.045) MIN 1 2 3 1234- 14.09 (.555) 13.47 (.530) 1.40 (.055) 1.15 (.045) 2 - DRAIN GATE 3 - SOURCE DRAIN SOURCE 4 - DRAIN DRAIN IGBTs, CoPACK 1- GATE 2- COLLECTOR 3- EMITTER 4- COLLECTOR 4.06 (.160) 3.55 (.140) 3X 3X LEAD ASSIGNMENTS HEXFET 1 - GATE 0.93 (.037) 0.69 (.027) 0.36 (.014) 3X M B A M 0.55 (.022) 0.46 (.018) 2.92 (.115) 2.64 (.104) 2.54 (.100) 2X NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB. 2 CONTROLLING DIMENSION : INCH 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS. TO-220AB Part Marking Information E XAMPL E : T H IS IS AN IR F 1010 L OT CODE 1789 AS S E MB L E D ON WW 19, 1997 IN T H E AS S E MB L Y L INE "C" Note: "P" in assembly line position indicates "Lead-Free" INT E R NAT IONAL R E CT IF IE R L OGO AS S E MB L Y L OT CODE 8 P AR T NU MB E R DAT E CODE YE AR 7 = 1997 WE E K 19 L INE C www.irf.com IRFB/IRFS/IRFSL59N10DPbF D2Pak Package Outline Dimensions are shown in millimeters (inches) D2Pak Part Marking Information THIS IS AN IRF530S WITH LOT CODE 8024 ASS EMBLED ON WW 02, 2000 IN THE AS SEMBLY LINE "L" INTERNATIONAL RECTIFIER LOGO Note: "P" in assembly line position indicates "Lead-Free" PART NUMBER F530S ASSEMBLY LOT CODE DATE CODE YEAR 0 = 2000 WEEK 02 LINE L OR INT ERNAT IONAL RECT IFIER LOGO ASSEMBLY LOT CODE www.irf.com PART NUMBER F 530S DATE CODE P = DESIGNATES LEAD-FREE PRODUCT (OPTIONAL) YEAR 0 = 2000 WEEK 02 A = ASSEMBLY SIT E CODE 9 IRFB/IRFS/IRFSL59N10DPbF TO-262 Package Outline Dimensions are shown in millimeters (inches) TO-262 Part Marking Information EXAMPLE: THIS IS AN IRL 3103L LOT CODE 1789 AS S EMB LED ON WW 19, 1997 IN T HE AS S EMB LY LINE "C" Note: "P" in ass embly line position indicates "L ead-F ree" INTERNATIONAL RECT IF IER LOGO AS S EMBLY LOT CODE PART NUMBER DATE CODE YEAR 7 = 1997 WEE K 19 LINE C OR INTE RNATIONAL RECT IFIER L OGO AS S EMBL Y LOT CODE 10 PART NUMBER DATE CODE P = DES IGNAT ES LEAD-FREE PRODUCT (OPTIONAL) YEAR 7 = 1997 WEEK 19 A = AS S EMBL Y S IT E CODE www.irf.com IRFB/IRFS/IRFSL59N10DPbF D2Pak Tape & Reel Information Dimensions are shown in millimeters (inches) TRR 1.60 (.063) 1.50 (.059) 1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153) FEED DIRECTION 1.85 (.073) 11.60 (.457) 11.40 (.449) 1.65 (.065) 0.368 (.0145) 0.342 (.0135) 15.42 (.609) 15.22 (.601) 24.30 (.957) 23.90 (.941) TRL 1.75 (.069) 1.25 (.049) 10.90 (.429) 10.70 (.421) 4.72 (.136) 4.52 (.178) 16.10 (.634) 15.90 (.626) FEED DIRECTION 13.50 (.532) 12.80 (.504) 27.40 (1.079) 23.90 (.941) 4 330.00 (14.173) MAX. 60.00 (2.362) MIN. NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE. 26.40 (1.039) 24.40 (.961) 3 30.40 (1.197) MAX. 4 Notes: Repetitive rating; pulse width limited by max. junction temperature. Starting TJ = 25°C, L = 0.8mH RG = 25Ω, IAS = 35.4A. Pulse width ≤ 300µs; duty cycle ≤ 2%. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS This is only applied to TO-220AB package TJ ≤ 175°C This is applied to D2Pak, when mounted on 1" square PCB ( FR-4 or G-10 Material ). For recommended footprint and soldering techniques refer to application note #AN-994. ISD ≤ 35.4A, di/dt ≤ 350A/µs, VDD ≤ V(BR)DSS, Data and specifications subject to change without notice. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 06/04 www.irf.com 11