IRF IRF6614

PD -96907A
IRF6614
DirectFET™ Power MOSFET ‚
l
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Typical values (unless otherwise specified)
Application Specific MOSFETs
VDSS
VGS
RDS(on)
RDS(on)
Lead and Bromide Free 
40V max ±20V max 5.9mΩ@ 10V 7.1mΩ@ 4.5V
Low Profile (<0.7 mm)
Dual Sided Cooling Compatible 
Qg tot Qgd
Qgs2
Qrr
Qoss Vgs(th)
Ultra Low Package Inductance
19nC
6.0nC 1.4nC 5.5nC 9.5nC
1.8V
Optimized for High Frequency Switching above 1MHz 
Ideal for CPU Core and Telecom Synchronous
Rectification in DC-DC Converters
Optimized for Control FET socket of Sync. Buck Converter
Low Conduction Losses
Compatible with existing Surface Mount Techniques 
DirectFET™ ISOMETRIC
ST
Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details)
SQ
SX
ST
MQ
MX
MT
Description
The IRF6614 combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFETTM packaging to achieve
the lowest on-state resistance in a package that has the footprint of a MICRO-8 and only 0.7 mm profile. The DirectFET package is
compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or
convection soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes.
The DirectFET package allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal
resistance by 80%.
The IRF6614 balances both low resistance and low charge along with ultra low package inductance to reduce both conduction and
switching losses. The reduced total losses make this product ideal for high efficiency DC-DC converters that power the latest generation of processors operating at higher frequencies. The IRF6614 has been optimized for parameters that are critical in synchronous
buck operating from 12 volt buss converters including Rds(on) and gate charge to minimize losses in the control FET socket.
Absolute Maximum Ratings
Max.
Units
VDS
Drain-to-Source Voltage
40
V
VGS
Gate-to-Source Voltage
±20
Parameter
h
h
@ 10V k
ID @ TA = 25°C
Continuous Drain Current, VGS @ 10V
12.7
ID @ TA = 70°C
Continuous Drain Current, VGS @ 10V
10.1
ID @ TC = 25°C
Continuous Drain Current, VGS
IDM
Pulsed Drain Current
EAS
Single Pulse Avalanche Energy
IAR
Avalanche Current
e
ID = 12.7A
16
12
TJ = 125°C
8
TJ = 25°C
4
2.0
4.0
6.0
8.0
VGS, Gate-to-Source Voltage (V)
Fig 1. Typical On-Resistance Vs. Gate Voltage
10.0
Notes:
 Click on this section to link to the appropriate technical paper.
‚ Click on this section to link to the DirectFET MOSFETs
ƒ Repetitive rating; pulse width limited by max. junction temperature.
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102
f
VGS, Gate-to-Source Voltage (V)
Typical R DS (on) (mΩ)
20
e
A
55
22
mJ
10.2
A
12
ID= 10.2A
10
VDS = 32V
VDS= 20V
8
6
4
2
0
0
10
20
30
40
50
QG Total Gate Charge (nC)
Fig 2. Typical Total Gate Charge vs Gate-to-Source Voltage
„ Starting TJ = 25°C, L = 0.43mH, RG = 25Ω, IAS = 10.2A.
† Surface mounted on 1 in. square Cu board, steady state.
‰ TC measured with thermocouple mounted to top (Drain) of part.
1
11/8/04
IRF6614
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Min.
Conditions
Typ. Max. Units
BVDSS
Drain-to-Source Breakdown Voltage
40
–––
–––
∆ΒVDSS/∆TJ
Breakdown Voltage Temp. Coefficient
–––
38
–––
RDS(on)
Static Drain-to-Source On-Resistance
–––
5.9
8.3
–––
7.1
9.9
VGS = 0V, ID = 250µA
V
mV/°C Reference to 25°C, ID = 1mA
mΩ VGS = 10V, ID = 12.7A g
VGS = 4.5V, ID = 10.2A g
VGS(th)
Gate Threshold Voltage
1.35
1.80
2.25
V
∆VGS(th)/∆TJ
Gate Threshold Voltage Coefficient
–––
-5.5
–––
mV/°C
IDSS
Drain-to-Source Leakage Current
–––
–––
1.0
µA
–––
–––
150
VDS = VGS, ID = 250µA
VDS = 32V, VGS = 0V
VDS = 32V, VGS = 0V, TJ = 125°C
VGS = 20V
IGSS
Gate-to-Source Forward Leakage
–––
–––
100
Gate-to-Source Reverse Leakage
–––
–––
-100
gfs
Forward Transconductance
71
–––
–––
Qg
Total Gate Charge
–––
19
29
Pre-Vth Gate-to-Source Charge
–––
5.9
–––
VDS = 20V
VGS = 4.5V
Qgs1
nA
VGS = -20V
S
VDS = 10V, ID = 10.2A
Qgs2
Post-Vth Gate-to-Source Charge
–––
1.4
–––
Qgd
Gate-to-Drain Charge
–––
6.0
–––
ID = 10.2A
Qgodr
Gate Charge Overdrive
–––
5.7
–––
See Fig. 17
nC
Qsw
Switch Charge (Qgs2 + Qgd)
–––
7.4
–––
Qoss
Output Charge
–––
9.5
–––
nC
RG
Gate Resistance
–––
1.0
1.5
Ω
td(on)
Turn-On Delay Time
–––
13
–––
VDD = 20V, VGS = 4.5Vg
tr
Rise Time
–––
27
–––
ID = 10.2A
td(off)
Turn-Off Delay Time
–––
18
–––
tf
Fall Time
–––
3.6
–––
Ciss
Input Capacitance
–––
2560
VDS = 16V, VGS = 0V
ns
Clamped Inductive Load
–––
VGS = 0V
pF
VDS = 20V
Coss
Output Capacitance
–––
370
–––
Crss
Reverse Transfer Capacitance
–––
200
–––
Min.
Typ. Max. Units
–––
–––
ƒ = 1.0MHz
Diode Characteristics
Parameter
IS
Continuous Source Current
Pulsed Source Current
MOSFET symbol
2.6
(Body Diode)
ISM
A
–––
–––
Conditions
showing the
integral reverse
102
p-n junction diode.
(Body Diode)e
VSD
Diode Forward Voltage
–––
–––
1.0
V
TJ = 25°C, IS = 10.2A, VGS = 0V g
trr
Reverse Recovery Time
–––
15
23
ns
TJ = 25°C, IF = 10.2A
Qrr
Reverse Recovery Charge
–––
5.5
8.3
nC
di/dt = 100A/µs g
Notes:
ƒ Repetitive rating; pulse width limited by max. junction temperature.
… Pulse width ≤ 400µs; duty cycle ≤ 2%.
2
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IRF6614
Absolute Maximum Ratings
Parameter
PD @TC = 25°C
h
Power Dissipation h
Power Dissipation k
TP
Peak Soldering Temperature
TJ
Operating Junction and
TSTG
Storage Temperature Range
Max.
Units
2.1
W
Power Dissipation
PD @TA = 25°C
PD @TA = 70°C
1.4
42
270
°C
-40 to + 150
Thermal Resistance
Parameter
hl
Junction-to-Ambient il
Junction-to-Ambient jl
Junction-to-Case kl
RθJA
Typ.
Max.
–––
58
12.5
–––
20
–––
–––
3.0
Junction-to-Ambient
RθJA
RθJA
RθJC
RθJ-PCB
Junction-to-PCB Mounted
Linear Derating Factor
1.0
g
Units
°C/W
–––
0.017
W/°C
100
Thermal Response ( Z thJA )
D = 0.50
0.20
10
0.10
0.05
0.02
0.01
1
τJ
0.1
R1
R1
τJ
τ1
R2
R2
R3
R3
R4
R4
Ri (°C/W)
R5
R5
τC
τ2
τ1
τ2
τ3
τ3
τ4
τ4
τ5
τ5
Ci= τi/Ri
Ci= τi/Ri
0.01
SINGLE PULSE
( THERMAL RESPONSE )
τ
τi (sec)
0.6676
0.000066
1.0462
0.000896
1.5611
0.004386
29.282
0.68618
25.455
32
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + Tc
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
10
100
t1 , Rectangular Pulse Duration (sec)
Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
Notes:
† Surface mounted on 1 in. square Cu board, steady state.
‡ Used double sided cooling , mounting pad.
ˆ Mounted on minimum footprint full size board with metalized
‰ TC measured with thermocouple incontact with top (Drain) of part.
Š Rθ is measured at TJ of approximately 90°C.
back and with small clip heatsink.
† Surface mounted on 1 in. square Cu
board (still air).
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‡ Mounted to a PCB with a
thin gap filler and heat sink.
(still air)
ˆ Mounted on minimum
footprint full size board with
metalized back and with small
clip heatsink (still air)
3
IRF6614
1000
1000
100
BOTTOM
10
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS
10V
5.0V
4.5V
4.0V
3.5V
3.0V
2.5V
2.3V
1
2.3V
0.1
≤ 60µs PULSE WIDTH
Tj = 25°C
0.01
100
BOTTOM
VGS
10V
5.0V
4.5V
4.0V
3.5V
3.0V
2.5V
2.3V
10
2.3V
≤ 60µs PULSE WIDTH
Tj = 150°C
1
0.1
1
10
100
0.1
VDS , Drain-to-Source Voltage (V)
1
10
100
VDS , Drain-to-Source Voltage (V)
Fig 4. Typical Output Characteristics
Fig 5. Typical Output Characteristics
100.0
2.0
Typical R DS(on) (Normalized)
ID, Drain-to-Source Current(Α)
ID = 12.7A
TJ = 150°C
TJ = 25°C
TJ = -40°C
10.0
1.0
VDS = 15V
VGS = 10V
1.5
1.0
≤ 60µs PULSE WIDTH
0.1
1.5
2.0
2.5
3.0
3.5
0.5
4.0
-60 -40 -20
VGS, Gate-to-Source Voltage (V)
60
80 100 120 140 160
30
TA= 25°C
VGS = 3.0V
25
VGS = 3.5V
(mΩ)
Coss = Cds + Cgd
DS(on)
Ciss
2000
Typical R
C, Capacitance (pF)
40
Fig 7. Normalized On-Resistance vs. Temperature
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
3000
20
TJ , Junction Temperature (°C)
Fig 6. Typical Transfer Characteristics
4000
0
1000
VGS = 4.0V
20
VGS = 4.5V
VGS = 5.0V
VGS = 10V
15
10
Coss
Crss
0
5
1
10
100
VDS , Drain-to-Source Voltage (V)
Fig 8. Typical Capacitance vs.Drain-to-Source Voltage
4
0
20
40
60
80
ID, Drain Current (A)
Fig 9. Typical On-Resistance Vs.
Drain Current and Gate Voltage
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IRF6614
1000
ID, Drain-to-Source Current (A)
ISD , Reverse Drain Current (A)
100.0
10.0
TJ = 150°C
TJ = 25°C
TJ = -40°C
1.0
OPERATION IN THIS AREA
LIMITED BY R DS (on)
100
100µsec
10
1msec
DC
Tc = 25°C
Tj = 175°C
Single Pulse
VGS = 0V
0.1
0.1
0.2
0.6
1.0
1.4
1.8
0.01
2.2
0.10
1.00
10.00
100.00
VDS , Drain-toSource Voltage (V)
VSD , Source-to-Drain Voltage (V)
Fig 10. Typical Source-Drain Diode Forward Voltage
Fig11. Maximum Safe Operating Area
60
VGS(th) Gate threshold Voltage (V)
2.5
50
ID , Drain Current (A)
10msec
1
40
30
20
10
0
2.0
ID = 250µA
1.5
1.0
0.5
25
50
75
100
125
150
-75
-50
-25
TJ , Junction Temperature (°C)
25
50
75
100
125
150
TJ , Temperature ( °C )
Fig 12. Maximum Drain Current vs. Case Temperature
Fig 13. Typical Threshold Voltage vs. Junction
Temperature
100
EAS, Single Pulse Avalanche Energy (mJ)
0
ID
4.3A
6.4A
BOTTOM 10.2A
TOP
80
60
40
20
0
25
50
75
100
125
150
Starting TJ, Junction Temperature (°C)
Fig 14. Maximum Avalanche Energy Vs. Drain Current
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5
IRF6614
Current Regulator
Same Type as D.U.T.
Id
Vds
50KΩ
Vgs
.2µF
12V
.3µF
+
V
- DS
D.U.T.
Vgs(th)
VGS
3mA
IG
ID
Qgs1 Qgs2
Current Sampling Resistors
Fig 15a. Gate Charge Test Circuit
Qgd
Qgodr
Fig 15b. Gate Charge Waveform
V(BR)DSS
15V
DRIVER
L
VDS
tp
D.U.T
V
RGSG
+
V
- DD
IAS
20V
tp
A
I AS
0.01Ω
Fig 16c. Unclamped Inductive Waveforms
Fig 16b. Unclamped Inductive Test Circuit
LD
VDS
VDS
90%
+
VDD D.U.T
VGS
Pulse Width < 1µs
Duty Factor < 0.1%
Fig 17a. Switching Time Test Circuit
6
10%
VGS
td(on)
tr
td(off)
tf
Fig 17b. Switching Time Waveforms
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IRF6614
D.U.T
Driver Gate Drive
+
ƒ
+
‚
-
„
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
+

RG
•
•
•
•
di/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
VDD
P.W.
Period
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D=
Period
P.W.
+
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor
Current
Inductor Curent
-
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 18. Diode Reverse Recovery Test Circuit for N-Channel
HEXFET® Power MOSFETs
DirectFET™ Substrate and PCB Layout, ST Outline
(Small Size Can, T-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET.
This includes all recommendations for stencil and substrate designs.
1- Drain
2- Drain
3- Source
4- Source
5- Gate
6- Drain
7- Drain
6
5
7
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3
4
1
2
7
IRF6614
DirectFET™ Outline Dimension, ST Outline
(Small Size Can, T-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET.
This includes all recommendations for stencil and substrate designs.
DIMENSIONS
Note: Controlling
dimensions are in mm
METRIC
MAX
CODE MIN
4.85
A
4.75
3.95
B
3.70
2.85
C
2.75
0.45
D
0.35
0.62
E
0.58
0.62
F
0.58
0.79
G
0.75
0.57
H
0.53
0.30
J
0.26
K
O.88 0.98
2.28
L
2.18
0.70
M
0.59
0.08
N
0.03
IMPERIAL
MIN
0.187
0.146
0.108
0.014
0.023
0.023
0.030
0.021
0.010
0.035
0.086
0.023
0.001
MAX
0.191
0.156
0.112
0.018
0.024
0.024
0.031
0.022
0.012
0.039
0.090
0.028
0.003
DirectFET™ Part Marking
8
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IRF6614
DirectFET™ Tape & Reel Dimension (Showing component orientation).
NOTE: Controlling dimensions in mm
Std reel quantity is 4800 parts. (ordered as IRF6614). For 1000 parts on 7" reel,
order IRF6614TR1
REEL DIMENSIONS
TR1 OPTION (QTY 1000)
STANDARD OPTION (QTY 4800)
METRIC
METRIC
IMPERIAL
IMPERIAL
MIN
MIN
MAX
CODE
MAX
MIN
MIN
MAX
MAX
12.992 N.C
6.9
N.C
A
330.0
177.77 N.C
N.C
0.795
0.75
B
N.C
20.2
19.06
N.C
N.C
N.C
0.504
0.53
C
0.50
12.8
13.5
0.520
13.2
12.8
0.059
0.059
D
N.C
1.5
1.5
N.C
N.C
N.C
3.937
2.31
E
N.C
100.0
58.72
N.C
N.C
N.C
F
N.C
N.C
0.53
N.C
N.C
0.724
18.4
13.50
G
0.488
0.47
N.C
12.4
11.9
0.567
14.4
12.01
H
0.469
0.47
11.9
11.9
N.C
0.606
15.4
12.01
Loaded Tape Feed Direction
NOTE: CONTROLLING
DIMENSIONS IN MM
CODE
A
B
C
D
E
F
G
H
DIMENSIONS
METRIC
IMPERIAL
MIN
MAX
MAX
MIN
0.311
0.319
7.90
8.10
0.154
0.161
4.10
3.90
0.469
0.484
11.90
12.30
0.215
0.219
5.55
5.45
0.201
0.209
5.10
5.30
0.256
0.264
6.50
6.70
0.059
N.C
1.50
N.C
0.059
0.063
1.50
1.60
Data and specifications subject to change without notice.
This product has been designed and qualified for the Consumer market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.11/04
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9