INTEGRATED CIRCUITS DATA SHEET UAA2077TS 2 GHz image rejecting front-end Preliminary specification Supersedes data of 2000 Mar 09 File under Integrated Circuits, IC17 2000 Apr 17 Philips Semiconductors Preliminary specification 2 GHz image rejecting front-end UAA2077TS The main advantage of the UAA2077TS is its ability to provide an image rejection over 30 dB. Therefore, an additional image filter between the Low Noise Amplifier (LNA) and the mixer is not required. FEATURES • Low noise, wide dynamic range amplifier • Very low noise figure • Dual balanced mixers for over 30 dB on-chip image rejection Image rejection is achieved internally by two RF mixers in quadrature operation and two all-pass filters in the I and Q IF channels that shift the phase of signals by 45° and 135° respectively. These two phase shifted IF signals are combined and buffered to the front-end IF output signal. • Quadrature 200 MHz IF recombiner • On-chip quadrature network • Independent SX, RX, power-down control modes and fast power-up switching An input signal with a frequency above the Local Oscillator (LO) frequency results in an IF signal, while an input signal with a frequency below the LO frequency is rejected. • Very small outline packaging • No image filter required, resulting in a very small application. The receive section consists of an LNA that drives a quadrature mixer pair. The IF amplifier consists of an on-chip 45° and 135° phase shifting network and an image reject IF recombiner. The IF driver has differential open-collector outputs. APPLICATIONS • GSM dual band solution with UAA3522HL • High frequency front-end for DCS1800/PCS1900 portable hand-held equipment The LO part consists of an internal all-pass phase shifting filter to provide the quadrature LO signals for the mixers of the receive section. The all-pass filter output signals are buffered before being fed to the mixers. All RF inputs and IF outputs are balanced. • Compact mobile digital communication equipment • Time Division Multiple Access (TDMA) receivers e.g. RF Local Area Networks (RF LANs). Pins RXON and SXON allow control of the different active modes and power-down. The SX mode and the RX mode are independent active states of the LO section and the receive section respectively. When the logic level on pin SXON is HIGH, all internal buffers in the LO path of the circuit are turned on, thus minimizing LO pulling during the independent powering up of the receive section. Special care has been taken by design for fast switching from power-down to any of the different active modes. GENERAL DESCRIPTION The UAA2077TS contains a 2 GHz front-end receiver intended to be used in mobile telephones. Designed in an advanced BiCMOS process it combines high performance with a low power consumption and high integration, thus reducing external component costs and overall front-end size. QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VCC supply voltage 2.7 2.8 3.3 V ICC(pd) power-down supply current − − 50 µA ICC(SRX) supply current in SRX mode − 25 28 mA Tamb ambient temperature −30 +25 +70 °C ORDERING INFORMATION PACKAGE TYPE NUMBER NAME DESCRIPTION VERSION UAA2077TS/D SSOP16 plastic shrink small outline package; 16 leads; body width 4.4 mm SOT369-1 2000 Apr 17 2 Philips Semiconductors Preliminary specification 2 GHz image rejecting front-end UAA2077TS BLOCK DIAGRAM VCCLNA LNAGND handbook, full pagewidth 1 RFINA RFINB GND 6 9 RXON 2, 5, 8 10 45° × 3 4 n.c. 15 LNA 135° × IFA IF COMBINER 16 IFB RECEIVE SECTION VCCLO LOGND LOCAL OSCILLATOR SECTION 13 135° 14 45° QUADRATURE PHASE SHIFTER 7 11 UAA2077TS 12 FCA012 SXON LOINB LOINA Fig.1 Block diagram. PINNING SYMBOL PIN DESCRIPTION VCCLNA 1 supply voltage for receive section (LNA and IF parts) n.c. 2 not connected RFINA 3 RF input A (balanced) VCCLNA 1 16 IFB RFINB 4 RF input B (balanced) n.c. 2 15 IFA n.c. 5 not connected RFINA 3 LNAGND 6 ground for receive section (LNA and IF parts) RFINB 4 SXON 7 SX mode enable input (see Table 1) n.c. 8 not connected GND 9 ground RXON 10 RX mode enable input (see Table 1) LOINB 11 LO input B (balanced) LOINA 12 LO input A (balanced) VCCLO 13 supply voltage for LO section LOGND 14 ground for LO section IFA 15 IF output A (balanced) IFB 16 IF output B (balanced) 2000 Apr 17 handbook, halfpage 14 LOGND UAA2077TS 13 VCCLO n.c. 5 12 LOINA LNAGND 6 11 LOINB SXON 7 10 RXON n.c. 8 9 GND FCA011 Fig.2 Pin configuration. 3 Philips Semiconductors Preliminary specification 2 GHz image rejecting front-end UAA2077TS FUNCTIONAL DESCRIPTION The IF output is of a differential open collector type. A typical application consists of pull-up resistors of 680 Ω at each IF output and a differential load resistance of 1 kΩ for the IF filter, due to its impedance or its matching network. Receive section The circuit contains a low-noise amplifier followed by two high dynamic range mixers (see Fig.3). The mixers are of the Gilbert cell type, the architecture of which is fully differential. The power gain refers to the resulting power into the 1 kΩ load. The path for the DC current from VCC into the open collector outputs should be realized by the inductors. The output signal is limited to VCC + 3VBE. The LO signal is phase shifted into 45° and 135° signals, mixed with the RF input signal to provide the I and Q channel signals. The I and Q channel signals are buffered, phase shifted by 45° and 135° respectively, amplified and internally combined, thus obtaining image rejection. Fast switching between power-down and the RX mode is controlled by the mode control pin RXON. Balanced signal interfaces are used for minimizing crosstalk from package parasitics. VCCLNA LNAGND handbook, full pagewidth 1 6 GND 9 n.c. 2, 5, 8 RXON 10 UAA2077TS RFINA RFINB × 3 4 45° 15 LNA 135° × to LO section Fig.3 Receive section. 2000 Apr 17 4 IFA IF COMBINER 16 FCA013 IFB Philips Semiconductors Preliminary specification 2 GHz image rejecting front-end UAA2077TS Local oscillator section The LO input directly drives the two internal all-pass networks to provide the quadrature signals for the mixers (see Fig.4). The SX mode (see Table 1) is used to activate the LO section, thus minimizing pulling of the external Voltage Controlled Oscillator (VCO) when enabling the receive section. The SX mode is active when the logic level on pin SXON is HIGH. VCCLO LOGND Table 1 to receive section handbook, halfpage 13 Operating modes UAA2077TS LOGIC LEVEL GND MODE 45° QUADRATURE PHASE SHIFTER 9 7 PIN RXON PIN SXON 11 12 FCA014 LOW LOW Power-down mode HIGH LOW RX mode; receive section active LOW HIGH SX mode; LO section active HIGH HIGH SRX mode; both sections active 2000 Apr 17 135° 14 SXON LOINB LOINA Fig.4 LO section. 5 Philips Semiconductors Preliminary specification 2 GHz image rejecting front-end UAA2077TS LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VCC supply voltage − 6 V ∆VSS difference in voltage between ground pins − 0.6 V Pi(max) maximum input power − 20 dBm Tj(max) maximum junction temperature − +150 °C Ptot total power dissipation − 250 mW Tstg storage temperature −65 +150 °C in free air HANDLING All pins withstand 1500 V ESD test in accordance with “MIL-STD-883C class 1 (method 3015.5)”. THERMAL CHARACTERISTICS SYMBOL Rth(j-a) PARAMETER CONDITIONS thermal resistance from junction to ambient VALUE UNIT 120 K/W in free air DC CHARACTERISTICS VCC = 2.8 V; Tamb = 25 °C; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supplies VCC supply voltage ICC(pd) ICC(RX) full temperature range 2.7 2.8 3.3 V power-down supply current − − 50 µA supply current in RX mode − 22 24 mA ICC(SX) supply current in SX mode − 3 4 mA ICC(SRX) supply current in SRX mode − 25 28 mA V Mode control: pins RXON and SXON VIH HIGH-level input voltage 1.9 − VCC VIL LOW-level input voltage −0.3 − +0.6 V IIH HIGH-level input current −1 − +1 µA IIL LOW-level input current −1 − +1 µA 2000 Apr 17 6 Philips Semiconductors Preliminary specification 2 GHz image rejecting front-end UAA2077TS AC CHARACTERISTICS VCC = 2.8 V; Tamb = 25 °C; fo(RX) = 200 MHz; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Receive section (receive section enabled): DCS mode Ri(RX) RF input resistance (real part of the parallel input impedance) balanced; at 1845 MHz − 50 − Ω Ci(RX) RF input capacitance (imaginary balanced; at 1845 MHz part of the parallel input impedance) − 0.5 − pF fi(RX) RF input frequency 1805 − 1880 MHz RLi(RX) return loss on matched RF input balanced; note 1 10 − GCP(RX) conversion power gain RF inputs to IF outputs; note 1 20 23 26 dB Grip gain ripple as a function of RF frequency over DCS frequency range; note 1 − −1 −1.5 dB/100 MHz ∆G/T gain variation with temperature −60 −30 − mdB/K 15 dB CP1RX 1 dB compression point referenced to RF input; note 1 −23.5 −20 − dBm DES3 input referred 3 dB desensitisation interferer frequency offset is 3 MHz; useful signal is −101 dBm; note 1 −25 − − dBm IP3RX 3rd order intercept point referenced to RF input; note 1 −15 −12 − dBm NFRX overall noise figure RF inputs to IF outputs; note 1 − 3.5 4.2 dB − 4.4 dB normal case worse case for LO input, power − and VCC − 1000 − return loss on matched IF output note 1 10 15 − dB fo(RX) IF frequency range fRF > fLO − 200 − MHz IR rejection of image frequency fRF > fLO; fRF is the frequency of the wanted signal; note 1 30 38 − dB ZL(RX) typical application IF output load impedance RLo(RX) balanced; note 1 Ω Receive section (receive section enabled): PCS mode Ri(RX) RF input resistance (real part of the parallel input impedance) balanced; at 1960 MHz − tbf − Ω Ci(RX) RF input capacitance (imaginary balanced; at 1960 MHz part of the parallel input impedance) − tbf − pF fi(RX) RF input frequency 1930 − 1990 MHz RLi(RX) return loss on matched RF input balanced; note 1 10 15 − dB GCP(RX) conversion power gain RF inputs to IF outputs; note 1 − 22 − dB Grip gain ripple as a function of RF frequency over PCS frequency range; note 1 − −1 − dB/100 MHz ∆G/T gain variation with temperature − −30 − mdB/K CP1RX 1 dB compression point − −20 − dBm 2000 Apr 17 referenced to RF input; note 1 7 Philips Semiconductors Preliminary specification 2 GHz image rejecting front-end SYMBOL PARAMETER UAA2077TS CONDITIONS MIN. TYP. MAX. UNIT interferer frequency offset is 3 MHz; useful signal is −101 dBm; note 1 − tbf − dBm DES3 input referred 3 dB desensitisation IP3RX 3rd order intercept point referenced to RF input; note 1 − −12 − dBm NFRX overall noise figure R inputs to IF outputs; note 1 − 3.7 − dB ZL(RX) typical application IF output load impedance balanced; note 1 − 1000 − Ω RLo(RX) return loss on matched IF output note 1 10 15 − dB fo(RX) IF frequency range fRF > fLO − 200 − MHz IR rejection of image frequency fRF > fLO; fRF is the frequency of the wanted signal; note 1 − 38 − dB Local oscillator section (receive section enabled) 1605 − 1790 MHz balanced; at 1645 MHz − 50 − Ω Ci(LO) LO input capacitance (imaginary balanced; at 1645 MHz part of the parallel input impedance) − 1.2 − pF RLi(LO) return loss on matched input (including standby mode) note 1 10 15 − dB Pi(LO) LO power level note 1 −10 −3 0 dBm RI(LO) reverse isolation pins LOIN to RFIN at LO frequency; note 1 40 − − dB 1 5 20 µs fi(LO) LO input frequency Ri(LO) LO input resistance (real part of the parallel input impedance) Timing tstu start-up time of each block Notes 1. Measured and guaranteed only on demonstration board including PCB and balun. 2000 Apr 17 8 Philips Semiconductors Preliminary specification 2 GHz image rejecting front-end UAA2077TS PACKAGE OUTLINE SSOP16: plastic shrink small outline package; 16 leads; body width 4.4 mm D SOT369-1 E A X c y HE v M A Z 9 16 Q A2 A (A 3) A1 pin 1 index θ Lp L 1 8 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 1.5 0.15 0.00 1.4 1.2 0.25 0.32 0.20 0.25 0.13 5.30 5.10 4.5 4.3 0.65 6.6 6.2 1.0 0.75 0.45 0.65 0.45 0.2 0.13 0.1 0.48 0.18 10 0o Note 1. Plastic or metal protrusions of 0.20 mm maximum per side are not included. OUTLINE VERSION SOT369-1 2000 Apr 17 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION ISSUE DATE 95-02-04 99-12-27 MO-152 9 o Philips Semiconductors Preliminary specification 2 GHz image rejecting front-end UAA2077TS • Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. SOLDERING Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). • For packages with leads on two sides and a pitch (e): – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. • For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical dwell time is 4 seconds at 250 °C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Typical reflow peak temperatures range from 215 to 250 °C. The top-surface temperature of the packages should preferable be kept below 230 °C. Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 °C. Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 °C. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results: 2000 Apr 17 10 Philips Semiconductors Preliminary specification 2 GHz image rejecting front-end UAA2077TS Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE WAVE BGA, LFBGA, SQFP, TFBGA not suitable suitable(2) HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS not PLCC(3), SO, SOJ suitable LQFP, QFP, TQFP SSOP, TSSOP, VSO REFLOW(1) suitable suitable suitable not recommended(3)(4) suitable not recommended(5) suitable Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”. 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. 2000 Apr 17 11 Philips Semiconductors Preliminary specification 2 GHz image rejecting front-end UAA2077TS DATA SHEET STATUS DATA SHEET STATUS PRODUCT STATUS DEFINITIONS (1) Objective specification Development This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Product specification Production This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Note 1. Please consult the most recently issued data sheet before initiating or completing a design. DEFINITIONS DISCLAIMERS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 2000 Apr 17 12 Philips Semiconductors Preliminary specification 2 GHz image rejecting front-end UAA2077TS NOTES 2000 Apr 17 13 Philips Semiconductors Preliminary specification 2 GHz image rejecting front-end UAA2077TS NOTES 2000 Apr 17 14 Philips Semiconductors Preliminary specification 2 GHz image rejecting front-end UAA2077TS NOTES 2000 Apr 17 15 Philips Semiconductors – a worldwide company Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. 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