IRF IRLML2803PBF

PD - 94974A
IRLML2803PbF
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HEXFET® Power MOSFET
Generation V Technology
Ultra Low On-Resistance
N-Channel MOSFET
SOT-23 Footprint
Low Profile (<1.1mm)
Available in Tape and Reel
Fast Switching
Lead-Free
D
VDSS = 30V
G
RDS(on) = 0.25Ω
S
Description
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized
device design that HEXFET Power MOSFETs are well
known for, provides the designer with an extremely efficient
and reliable device for use in a wide variety of applications.
Micro3
A customized leadframe has been incorporated into the
standard SOT-23 package to produce a HEXFET Power
MOSFET with the industry's smallest footprint. This
package, dubbed the Micro3, is ideal for applications
where printed circuit board space is at a premium. The low
profile (<1.1mm) of the Micro3 allows it to fit easily into
extremely thin application environments such as portable
electronics and PCMCIA cards.
Absolute Maximum Ratings
Parameter
ID @ TA = 25°C
ID @ TA = 70°C
IDM
PD @TA = 25°C
VGS
EAS
dv/dt
TJ ,TSTG
Max.
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Peak diode Recovery dv/dt
Junction and Storage Temperature Range
c
d
g
Units
1.2
0.93
7.3
540
mW
4.3
±20
3.9
mW/°C
V
mJ
5.0
-55 to + 150
V/ns
°C
A
Thermal Resistance
Parameter
RθJA
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Maximum Junction-to-Ambient
f
Typ.
Max.
Units
–––
230
°C/W
1
04/16/07
IRLML2803PbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
∆V(BR)DSS/∆TJ
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
g fs
Gate Threshold Voltage
Forward Transconductance
IDSS
Drain-to-Source Leakage Current
V(BR)DSS
IGSS
Qg
Qgs
Qgd
t d(on)
tr
t d(off)
tf
Ciss
Coss
Crss
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Min.
30
–––
–––
–––
1.0
0.87
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
0.029
–––
–––
–––
–––
–––
–––
–––
–––
3.3
0.48
1.1
3.9
4.0
9.0
1.7
85
34
15
Max. Units
Conditions
–––
V
VGS = 0V, ID = 250µA
––– V/°C Reference to 25°C, ID = 1mA
0.25
VGS = 10V, ID = 0.91A ƒ
Ω
0.40
VGS = 4.5V, ID = 0.46A ƒ
–––
V
VDS = VGS, ID = 250µA
–––
S
VDS = 10V, ID = 0.46A
1.0
VDS = 24V, VGS = 0V
µA
25
VDS = 24V, VGS = 0V, TJ = 125°C
-100
VGS = -20V
nA
100
VGS = 20V
5.0
ID = 0.91A
0.72
nC VDS = 24V
1.7
VGS = 10V, See Fig. 6 and 9 ƒ
–––
VDD = 15V
–––
ID = 0.91A
ns
–––
RG = 6.2Ω
–––
RD = 16Ω, See Fig. 10 ƒ
–––
VGS = 0V
–––
pF
VDS = 25V
–––
ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
IS
I SM
VSD
t rr
Q rr
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode) 
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Min. Typ. Max. Units
–––
–––
0.54
–––
–––
7.3
–––
–––
–––
–––
26
22
1.2
40
32
A
V
ns
nC
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
TJ = 25°C, IS = 0.91A, VGS = 0V ƒ
TJ = 25°C, IF = 0.91A
di/dt = 100A/µs ƒ
D
G
S
Notes:
 Repetitive rating; pulse width limited by
ƒ Pulse width ≤ 300µs; duty cycle ≤ 2%.
„ Surface mounted on FR-4 board, t ≤ 5sec.
‚ ISD ≤ 0.91A, di/dt ≤ 120A/µs, VDD ≤ V(BR)DSS,
… Limited by TJmax, starting TJ = 25°C, L = 9.4mH, RG = 25Ω, IAS = 0.9A.
max. junction temperature. ( See fig. 11 )
TJ ≤ 150°C
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2
IRLML2803PbF
10
10
VGS
15V
10V
7.0V
5.5V
4.5V
4.0V
3.5V
BOTTOM 3.0V
VGS
15V
10V
7.0V
5.5V
4.5V
4.0V
3.5V
BOTTOM 3.0V
TOP
I D, Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
TOP
1
3.0V
20µs PULSE WIDTH
TJ = 25°C
A
0.1
0.1
1
1
3.0V
20µs PULSE WIDTH
TJ = 150°C
A
0.1
10
0.1
1
V DS , Drain-to-Source Voltage (V)
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
2.0
R DS(on) , Drain-to-Source On Resistance
(Normalized)
I D , Drain-to-Source Current (A)
10
TJ = 25°C
TJ = 150°C
1
0.1
3.0
V DS = 10V
20µs PULSE WIDTH
3.5
4.0
4.5
5.0
5.5
6.0
A
6.5
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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10
V DS, Drain-to-Source Voltage (V)
I D = 0.91A
1.5
1.0
0.5
VGS = 10V
0.0
-60
-40
-20
0
20
40
60
80
A
100 120 140 160
TJ , Junction Temperature (°C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRLML2803PbF
160
120
V GS , Gate-to-Source Voltage (V)
140
C, Capacitance (pF)
20
V GS = 0V,
f = 1MHz
C iss = Cgs + C gd , Cds SHORTED
C rss = C gd
C oss = C ds + C gd
12
Coss
80
60
Crss
40
V DS = 24V
V DS = 15V
16
Ciss
100
I D = 0.91A
20
0
1
10
100
8
4
0
0.0
A
VDS , Drain-to-Source Voltage (V)
1.0
2.0
3.0
4.0
A
5.0
Q G , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
10
100
OPERATION IN THIS AREA LIMITED
BY R DS(on)
I D , Drain Current (A)
ISD , Reverse Drain Current (A)
FOR TEST CIRCUIT
SEE FIGURE 9
TJ = 150°C
1
TJ = 25°C
10
10µs
100µs
1
1ms
VGS = 0V
0.1
0.4
0.6
0.8
1.0
1.2
VSD , Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
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A
1.4
TA = 25°C
TJ = 150°C
Single Pulse
0.1
1
10ms
10
A
100
VDS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
4
IRLML2803PbF
10V
QGS
RD
V DS
QG
VGS
QGD
D.U.T.
RG
VG
+
- VDD
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Charge
Fig 9a. Basic Gate Charge Waveform
Fig 10a. Switching Time Test Circuit
Current Regulator
Same Type as D.U.T.
VDS
50KΩ
90%
.2µF
12V
.3µF
+
V
- DS
D.U.T.
10%
VGS
VGS
3mA
td(on)
IG
tr
t d(off)
tf
ID
Current Sampling Resistors
Fig 9b. Gate Charge Test Circuit
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJA )
1000
100
D = 0.50
0.20
0.10
0.05
10
0.02
0.01
PDM
t1
SINGLE PULSE
(THERMAL RESPONSE)
1
0.1
0.00001
t2
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJA + TA
0.0001
0.001
0.01
0.1
1
10
100
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
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5
IRLML2803PbF
15V
EAS, Single Pulse Avalanche Energy (mJ)
D.U.T
RG
VGS
20V
DRIVER
L
VDS
18
+
V
- DD
IAS
A
0.01Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
ID
0.57A
0.75A
BOTTOM 0.90A
16
TOP
14
12
10
8
6
4
2
0
25
50
75
100
125
150
Starting T J, Junction Temperature (°C)
I AS
Fig 12c. Maximum Avalanche Energy
vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
D.U.T
Driver Gate Drive
ƒ
+
‚
-
P.W.
+
„
D.U.T. ISD Waveform
Reverse
Recovery
Current
+
• dv/dt controlled by RG
• Driver same type as D.U.T.
• I SD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
P.W.
Period
*

RG
D=
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
Period
V DD
+
-
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 13. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
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6
IRLML2803PbF
Package Outline
Dimensions are shown in milimeters (inches)
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IRLML2803PbF
Micro3 (SOT-23/TO-236AB) Part Marking Information
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IRLML2803PbF
Tape & Reel Information
SOT-23
Dimensions are shown in millimeters (inches)
2.05 ( .080 )
1.95 ( .077 )
1.6 ( .062 )
1.5 ( .060 )
4.1 ( .161 )
3.9 ( .154 )
TR
FEED DIRECTION
1.85 ( .072 )
1.65 ( .065 )
3.55 ( .139 )
3.45 ( .136 )
4.1 ( .161 )
3.9 ( .154 )
1.32 ( .051 )
1.12 ( .045 )
8.3 ( .326 )
7.9 ( .312 )
0.35 ( .013 )
0.25 ( .010 )
1.1 ( .043 )
0.9 ( .036 )
178.00
( 7.008 )
MAX.
9.90 ( .390 )
8.40 ( .331 )
NOTES:
1. CONTROLLING DIMENSION : MILLIMETER.
2. OUTLINE CONFORMS TO EIA-481 & EIA-541.
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 04/2007
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