BLF7G10L-250; BLF7G10LS-250 Power LDMOS transistor Rev. 1 — 25 February 2011 Objective data sheet 1. Product profile 1.1 General description 250 W LDMOS power transistor for base station applications at frequencies from 920 MHz to 960 MHz. Table 1. Typical performance Typical RF performance at Tcase = 25 °C in a common source class-AB production test circuit. Mode of operation f (MHz) (mA) (V) (W) 2-carrier W-CDMA 920 to 960 2000 30 60 [1] IDq VDS PL(AV) ηD ACPR (dB) (%) (dBc) 19 30 −32[1] Gp Test signal: 3GPP; test model 1; 64 DPCH; PAR = 7.5 dB at 0.01 % probability on CCDF per carrier. Carrier spacing 5 MHz. 1.2 Features and benefits Excellent ruggedness High efficiency Low Rth providing excellent thermal stability Designed for broadband operation (920 MHz to 960 MHz) Lower output capacitance for improved performance in Doherty applications Designed for low memory effects providing excellent pre-distortability Internally matched for ease of use Integrated ESD protection Compliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances (RoHS) 1.3 Applications RF power amplifiers for W-CDMA base stations and multi carrier applications in the 920 MHz to 960 MHz frequency range BLF7G10L-250; BLF7G10LS-250 NXP Semiconductors Power LDMOS transistor 2. Pinning information Table 2. Pinning Pin Description Simplified outline Graphic symbol BLF7G10L-250 (SOT502A) 1 drain 2 gate 3 source 1 1 3 [1] 2 2 3 sym112 BLF7G10LS-250 (SOT502B) 1 drain 2 gate 3 source 1 1 3 [1] 2 2 3 sym112 [1] Connected to flange 3. Ordering information Table 3. Ordering information Type number Package Name Description Version BLF7G10L-250 - flanged LDMOST ceramic package; 2 mounting holes; 2 leads SOT502A BLF7G10LS-250 - earless flanged LDMOST ceramic package; 2 leads SOT502B 4. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage - 65 V VGS gate-source voltage −0.5 +13 V ID drain current - 56 A Tstg storage temperature −65 +150 °C Tj junction temperature - 225 °C 5. Thermal characteristics Table 5. BLF7G10L-250_7G10LS-250 Objective data sheet Thermal characteristics Symbol Parameter Conditions Typ Rth(j-c) thermal resistance from junction to case Tcase = 80 °C; PL = 60 W; VDS = 30 V; IDq = 2000 mA 0.30 K/W All information provided in this document is subject to legal disclaimers. Rev. 1 — 25 February 2011 Unit © NXP B.V. 2011. All rights reserved. 2 of 10 BLF7G10L-250; BLF7G10LS-250 NXP Semiconductors Power LDMOS transistor 6. Characteristics Table 6. Characteristics Tj = 25 °C unless otherwise specified. Symbol Parameter Conditions V(BR)DSS drain-source breakdown voltage VGS = 0 V; ID = 2.7 mA Min Typ Max Unit - 67 - V VGS(th) gate-source threshold voltage VDS = 10 V; ID = 270 mA - 1.9 - V IDSS drain leakage current VGS = 0 V; VDS = 28 V - - - μA IDSX drain cut-off current VGS = VGS(th) + 3.75 V; VDS = 10 V - 49 - A IGSS gate leakage current VGS = 11 V; VDS = 0 V - - - nA gfs forward transconductance VDS = 10 V; ID = 13.5 A - 19.3 - S RDS(on) drain-source on-state resistance VGS = VGS(th) + 3.75 V; ID = 9.45 A - 0.048 - Ω 7. Test information Table 7. Functional test information Mode of operation: 2-carrier W-CDMA; PAR = 7.5 dB at 0.01 % probability on the CCDF; 3GPP test model 1; 64 DPCH; f1 = 920 MHz; f2 = 925 MHz; f3 = 955 MHz; f4 = 960 MHz; RF performance at VDS = 30 V; IDq = 2000 mA; Tcase = 25 °C; unless otherwise specified; in a class-AB production test circuit. Symbol Parameter PL(AV) average output power Conditions Min Typ Max Unit - 60 - W Gp power gain PL(AV) = 60 W - 19 - dB RLin input return loss PL(AV) = 60 W - −10 - dB ηD drain efficiency PL(AV) = 60 W - 30 - % ACPR adjacent channel power ratio PL(AV) = 60 W - −32 - dBc Table 8. PAR performance Mode of operation: 1-carrier W-CDMA; PAR = 7.5 dB at 0.01 % probability on the CCDF; 3GPP test model 1; 64 DPCH; f1 = 960 MHz; RF performance at VDS = 30 V; IDq = 2000 mA; Tcase = 25 °C; unless otherwise specified; in a class-AB production test circuit. Symbol Parameter Conditions Min Typ Max Unit PARO output peak-to-average ratio PL(AV) = 100 W at 0.01 % probability on CCDF - 4.6 - dB 7.1 Ruggedness in class-AB operation The BLF7G10L-250 and BLF7G10LS-250 are capable of withstanding a load mismatch corresponding to VSWR = 10 : 1 through all phases under the following conditions: VDS = 30 V; IDq = 2000 mA; PL = 200 W (CW); f = 920 MHz to 960 MHz. BLF7G10L-250_7G10LS-250 Objective data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 25 February 2011 © NXP B.V. 2011. All rights reserved. 3 of 10 NXP Semiconductors BLF7G10L-250; BLF7G10LS-250 Power LDMOS transistor 7.2 Impedance information Table 9. Typical impedance information IDq = 2000 mA; main transistor VDS = 30 V. ZS and ZL defined in Figure 1. f (MHz) ZS (Ω) ZL (Ω) 925 3.46 − j3.57 1.10 − j1.20 942 3.55 − j3.64 0.98 − j1.00 960 3.77 − j4.88 0.92 − j0.96 drain ZL gate ZS 001aaf059 Fig 1. BLF7G10L-250_7G10LS-250 Objective data sheet Definition of transistor impedance All information provided in this document is subject to legal disclaimers. Rev. 1 — 25 February 2011 © NXP B.V. 2011. All rights reserved. 4 of 10 BLF7G10L-250; BLF7G10LS-250 NXP Semiconductors Power LDMOS transistor 8. Package outline Flanged LDMOST ceramic package; 2 mounting holes; 2 leads SOT502A D A F 3 D1 U1 B q c C 1 H L E1 p U2 E w1 M A M B M A 2 w2 M C M b 0 5 Q 10 mm scale DIMENSIONS (millimetre dimensions are derived from the original inch dimensions) UNIT A b c mm 4.72 3.43 12.83 12.57 0.15 0.08 inches 0.186 0.135 0.505 0.006 0.495 0.003 OUTLINE VERSION E E1 F H L p Q q U1 U2 w1 w2 20.02 19.96 19.61 19.66 9.50 9.30 9.53 9.25 1.14 0.89 19.94 18.92 5.33 4.32 3.38 3.12 1.70 1.45 27.94 34.16 33.91 9.91 9.65 0.25 0.51 0.788 0.786 0.772 0.774 0.374 0.375 0.366 0.364 0.067 1.100 0.057 1.345 1.335 0.390 0.380 0.01 0.02 D D1 0.045 0.785 0.035 0.745 0.210 0.133 0.170 0.123 REFERENCES IEC JEDEC JEITA ISSUE DATE 99-12-28 03-01-10 SOT502A Fig 2. EUROPEAN PROJECTION Package outline SOT502A BLF7G10L-250_7G10LS-250 Objective data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 25 February 2011 © NXP B.V. 2011. All rights reserved. 5 of 10 BLF7G10L-250; BLF7G10LS-250 NXP Semiconductors Power LDMOS transistor Earless flanged LDMOST ceramic package; 2 leads SOT502B D A F 3 D D1 c U1 1 L H E1 U2 E 2 w2 M D M b 0 5 Q 10 mm scale DIMENSIONS (millimetre dimensions are derived from the original inch dimensions) UNIT A b c mm 4.72 3.43 12.83 12.57 0.15 0.08 inches 0.186 0.135 0.505 0.006 0.495 0.003 OUTLINE VERSION E E1 F H L Q U1 U2 w2 20.02 19.96 19.61 19.66 9.50 9.30 9.53 9.25 1.14 0.89 19.94 18.92 5.33 4.32 1.70 1.45 20.70 20.45 9.91 9.65 0.25 0.788 0.786 0.772 0.774 0.374 0.375 0.366 0.364 0.045 0.785 0.035 0.745 0.210 0.170 0.067 0.815 0.057 0.805 D D1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 03-01-10 07-05-09 SOT502B Fig 3. 0.390 0.010 0.380 Package outline SOT502B BLF7G10L-250_7G10LS-250 Objective data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 25 February 2011 © NXP B.V. 2011. All rights reserved. 6 of 10 BLF7G10L-250; BLF7G10LS-250 NXP Semiconductors Power LDMOS transistor 9. Abbreviations Table 10. Abbreviations Acronym Description 3GPP Third Generation Partnership Project CCDF Complementary Cumulative Distribution Function CW Continuous Wave DPCH Dedicated Physical CHannel ESD ElectroStatic Discharge LDMOS Laterally Diffused Metal Oxide Semiconductor LDMOST Laterally Diffused Metal Oxide Semiconductor Transistor PAR Peak-to-Average power Ratio RF Radio Frequency VSWR Voltage Standing Wave Ratio W-CDMA Wideband Code Division Multiple Access 10. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes BLF7G10L-250_7G10LS-250 v.1 20110225 Objective data sheet - - BLF7G10L-250_7G10LS-250 Objective data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 25 February 2011 © NXP B.V. 2011. All rights reserved. 7 of 10 BLF7G10L-250; BLF7G10LS-250 NXP Semiconductors Power LDMOS transistor 11. Legal information 11.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 11.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 11.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. 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Export might require a prior authorization from national authorities. BLF7G10L-250_7G10LS-250 Objective data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 25 February 2011 © NXP B.V. 2011. All rights reserved. 8 of 10 NXP Semiconductors BLF7G10L-250; BLF7G10LS-250 Power LDMOS transistor Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond 11.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 12. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] BLF7G10L-250_7G10LS-250 Objective data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 25 February 2011 © NXP B.V. 2011. All rights reserved. 9 of 10 NXP Semiconductors BLF7G10L-250; BLF7G10LS-250 Power LDMOS transistor 13. Contents 1 1.1 1.2 1.3 2 3 4 5 6 7 7.1 7.2 8 9 10 11 11.1 11.2 11.3 11.4 12 13 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics . . . . . . . . . . . . . . . . . . 2 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Test information . . . . . . . . . . . . . . . . . . . . . . . . . 3 Ruggedness in class-AB operation . . . . . . . . . 3 Impedance information . . . . . . . . . . . . . . . . . . . 4 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 5 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 7 Legal information. . . . . . . . . . . . . . . . . . . . . . . . 8 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 8 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Contact information. . . . . . . . . . . . . . . . . . . . . . 9 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2011. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 25 February 2011 Document identifier: BLF7G10L-250_7G10LS-250