Freescale Semiconductor, Inc. Application Note AN2525/D Rev. 0, 5/2003 DC Motor – XOR version TPU Function Set (DCmXor) Freescale Semiconductor, Inc... By Milan Brejl, Ph.D. Functional Overview The DC Motor – XOR version (DCmXor) TPU function is a version of the DC Motor (DCm) function that uses two TPU channels to generate one PWM output channel. The TPU channel outputs are connected to an XOR gate whos output is the required PWM signal. See Figure 1. An advantage of this solution is that the full range (0% to 100%) of PWM duty-cycle ratios is available. There is no MPW (minimum pulse width) parameter to limit the edge duty-cycle ratios in this version, unlike in the DCm. A disadvantage is that the number of assigned TPU channels is doubled. 50% PWM PWM period PWM period center-time center-time DT DT SW1_1 XOR SW1 XOR SW2 XOR SW3 XOR SW4 DT DT SW1_2 SW2_1 SW2_2 DT SW3_1 DT DT DT SW3_2 SW4_1 SW4_2 motor voltage Figure 1. Functionality of XOR version – illustration © Freescale Semiconductor, Inc., 2004. All rights reserved. For More Information On This Product, Go to: www.freescale.com © Motorola, Inc., 2003 Freescale Semiconductor, Inc. AN2525/D The function set consists of 5 TPU functions: • DC Motor – XOR version – C channels (DCmXor_C) • DC Motor – XOR version – T channels (DCmXor_T) • Synchronization Signal for DC Motor – XOR version (DCmXor_sync) • Resolver Reference Signal for DC Motor – XOR version (DCmXor_res) • Fault Input for DC Motor – XOR version (DCmXor_fault) Freescale Semiconductor, Inc... The DCm TPU function set drives a DC Motor, independently of the CPU. The CPU is required only to set a duty-cycle (dc) parameter in the range (–1,1). This determines both the speed and the direction. The function generates unipolarswitched center-aligned PWM signals. The DCmXor_C and DCmXor_T TPU functions work together to generate 4 pairs of XOR gate inputs. The XOR gate outputs then produce a 4-channel 2phase center-aligned PWM signal with dead-time between the top and bottom channels. The Synchronization Signal for the DCmXor function can be used to generate one or more adjustable signals for a wide range of uses. These are synchronized to the PWM, and track changes in the PWM period. The Resolver Reference Signal for the DCmXor function can be used to generate one or more 50% duty-cycle adjustable signals that are also synchronized to the PWM.The Fault Input for the DCmXor function is a TPU input function that sets all PWM outputs low when the input signal goes low. 2 DC Motor – XOR version TPU Function Set (DCmXor) For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc. AN2525/D Function Set Configuration Freescale Semiconductor, Inc... Function Set Configuration None of the TPU functions in the DC Motor – XOR version TPU function set can be used separately. The DCmXor_C and DCmXor_T functions have to be used together. The DCmXor_C runs on pins SW1_1 and SW3_1 – see Figure 1. The DCmXor_T runs on the other pins. One or more channels running Synchronization Signal for DCmXor as well as Resolver Reference Signals for DCmXor functions can be added. They can run with different settings on each channel. The function Fault Input for DCmXor can also be added. It is recommended to use it on channel 15, and to set the hardware option that disables all TPU output pins when the channel 15 input signal is low (DTPU bit = 1). This ensures that the hardware reacts quickly to a pin fault state. Note that it is not only the PWM channels, but all TPU output channels, including the synchronization signals, that are disabled in this configuration. Table 1 shows the configuration options and restrictions. Table 1. DCmXor TPU function set configuration options and restrictions DCmXor_C DCmXor_T DCmXor_sync DCmXor_res Optional/ Mandatory mandatory mandatory optional optional How many channels 2 6 1 or more 1 or more DCmXor_fault optional 1 TPU function Assignable channels any 2 channels any 6 channels any channels any channels any, recommended is 15 and DTPU bit set Table 2 shows an example of configuration. Table 2. Example of configuration Channel 0 1 2 3 4 5 6 7 10 11 15 TPU function DCmXor_C DCmXor_T DCmXor_T DCmXor_T DCmXor_C DCmXor_T DCmXor_T DCmXor_T DCmXor_sync DCmXor_res DCmXor_fault DC Motor – XOR version TPU Function Set (DCmXor) For More Information On This Product, Go to: www.freescale.com Priority high high high high high high high high low low high 3 Freescale Semiconductor, Inc. AN2525/D Table 3 shows the TPU function code sizes. Table 3. TPU function code sizes Freescale Semiconductor, Inc... TPU function DCmXor_C DCmXor_T DCmXor_sync DCmXor_res DCmXor_fault Configuration Order Code size 134µ instructions + 8 entries = 142 long words 3 µ instructions + 8 entries = 11 long words 26 µ instructions + 8 entries = 34 long words 38 µ instructions + 8 entries = 46 long words 9 µ instructions + 8 entries = 17 long words The CPU configures the TPU as follows. 1. Disables the channels by clearing the two channel priority bits on each channel used (not necessary after reset). 2. Selects the channel functions on all used channels by writing the function numbers to the channel function select bits. 3. Initializes function parameters. The parameters T, DT and sync_presc_addr must be set before initialization. If a DCmXor_sync channel or a DCmXor_res channel is used, then its parameters must also be set before initialization. 4. Issues an HSR (Host Service Request) type %10 to one of the DCmXor_C channels to initialize all DCmXor_C and DCmXor_T channels. Issues an HSR type %10 to the DCmXor_sync channels, DCmXor_res channels and DCmXor_fault channel, if used. 5. Enables servicing by assigning high, middle or low priority to the channel priority bits. All DCmXor_C and DCmXor_T channels must be assigned the same priority to ensure correct operation. The CPU must ensure that the DCmXor_sync or DCmXor_res function is initialized after the initialization of DCmXor: – – – NOTE: 4 assign a priority to the DCmXor_C and DCmXor_T channels to enable their initialization if a Synchronization Signal or a Resolver Reference Signal channel is used, wait until the HSR bits are cleared to indicate that initialization of the DCmXor_C and DCmXor_T channels has completed and assign a priority to the DCmXor_sync or DCmXor_res channel to enable its initialization A CPU routine that configures the TPU can be generated automatically using the MPC500_Quick_Start Graphical Configuration Tool. DC Motor – XOR version TPU Function Set (DCmXor) For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc. AN2525/D Detailed Function Description Detailed Function Description Freescale Semiconductor, Inc... DC Motor – XOR version – C channels (DCmXor_C) and DC Motor – XOR version – T channels (DCmXor_T) The DCmXor_C and DCmXor_T TPU functions work together to generate 4 pairs of XOR gate inputs. The XOR gate outputs then produce a 4-channel 2phase center-aligned PWM signal with dead-time between the top and bottom channels. In order to charge the bootstrap transistors, the PWM signals start to run 1.6ms after their initialization (at 20MHz TCR1 clock). The functions generate signals corresponding to a value 0 in duty-cycle ratio dc until the first dc value is processed, or for at least one PWM period. The CPU controls the PWM output by setting the TPU parameters. The dutycycle ratio dc and PWM period T can be adjusted during run time. Conversely, dead-time (DT) is not supposed to be changed during run time. The duty-cycle ratio dc can gain a value in the range (–1, 1). The sign controls the motion system direction, while the absolute value controls the amplitude of the applied voltage. The following figures show the input dc value and corresponding XOR gate outputs: dc = - 0.5 dc = 0 dc = 0.5 PWM period PWM period PWM period center-time center-time DT DT DT center-time DT DT DT SW1 SW2 DT DT DT DT DT DT SW3 SW4 motor voltage Figure 2. Unipolar switching DC Motor – XOR version TPU Function Set (DCmXor) For More Information On This Product, Go to: www.freescale.com 5 Freescale Semiconductor, Inc. AN2525/D The following equations describe how the PWM signal transition times SW1_1T, SW1_2T, SW2_1T, SW2_2T, SW3_1T, SW3_2T, SW4_1T and SW4_2T are calculated: Tdc = T ⋅ dc T + Tdc 2 T − Tdc Y = 2 X= Freescale Semiconductor, Inc... X − DT 2 X + DT B= 2 A= 6 Y − DT 2 Y + DT D = 2 C = SW1_1 T = center _ time − A SW1_2 T = center _ time + A SW2_1 T = center _ time − B SW2_2 T = center _ time + B SW3_1 T = center _ time − C SW3_2 T = center _ time + C SW4_1 T = center _ time − D SW4_2 T = center _ time + D DC Motor – XOR version TPU Function Set (DCmXor) For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc. AN2525/D Detailed Function Description Host Interface Written By CPU Written by both CPU and TPU Written By TPU Not Used Table 4. DCmXor_C Control Bits Name 3 2 1 0 Freescale Semiconductor, Inc... Channel Function Select 1 0 Channel Priority 1 0 Host Service Bits (HSR) 1 Options DCmXor_C function number (Assigned during assembly the DPTRAM code from library TPU functions) 00 – Channel Disabled 01 – Low Priority 10 – Middle Priority 11 – High Priority 00 – No Host Service Request 01 – Not used 10 – Initialization 11 – Stop 0 Host Sequence Bits (HSQ) xx – Not used Channel Interrupt Enable x – Not used Channel Interrupt Status x – Not used 0 0 Table 5. DCmXor_T Control Bits Name 3 2 1 0 Channel Function Select 1 0 Channel Priority 1 0 Host Service Bits (HSR) 1 Options DCmXor_T function number (Assigned during assembly the DPTRAM code from library TPU functions) 00 – Channel Disabled 01 – Low Priority 10 – Middle Priority 11 – High Priority 00 – No Host Service Request 01 – Not used 10 – Not used 11 – Not used 0 Host Sequence Bits (HSQ) xx – Not used DC Motor – XOR version TPU Function Set (DCmXor) For More Information On This Product, Go to: www.freescale.com 7 Freescale Semiconductor, Inc. AN2525/D Table 5. DCmXor_T Control Bits Name Options 0 Channel Interrupt Enable x – Not used Channel Interrupt Status x – Not used Freescale Semiconductor, Inc... 0 Table 6. DCmXor_C and DCmXor_T Parameter RAM SW2_2 SW2_1 SW1_2 SW1_1 Channel 8 Parameter 15 14 13 12 11 10 9 8 7 6 5 0 XY_X 1 SW13_2_ch_SW1 SW24_1_ch_SW1 2 SW24_2_ch_SW1 3 4 dc T 5 other_ch_SW1 6 7 fault_pinstate 0 Ttime_SW1_2 T_copy 1 2 L center_time 3 DT 4 5 CPU14 6 7 0 Ttime_SW2_1 1 2 3 4 5 sync_presc_addr 6 7 0 Ttime_SW2_2 1 2 3 4 5 6 7 DC Motor – XOR version TPU Function Set (DCmXor) For More Information On This Product, Go to: www.freescale.com 4 3 2 1 0 Freescale Semiconductor, Inc. AN2525/D Detailed Function Description Table 6. DCmXor_C and DCmXor_T Parameter RAM SW3_2 SW4_1 SW4_2 Freescale Semiconductor, Inc... SW3_1 Channel Parameter 15 14 13 12 11 10 9 8 7 6 5 0 XY_Y SW13_2_ch_SW3 1 2 SW24_1_ch_SW3 SW24_2_ch_SW3 3 4 5 6 other_ch_SW3 7 0 Ttime_SW3_2 1 2 3 4 5 6 7 0 Ttime_SW4_1 1 2 3 4 5 6 7 0 Ttime_SW4_2 1 2 3 4 5 6 7 DC Motor – XOR version TPU Function Set (DCmXor) For More Information On This Product, Go to: www.freescale.com 4 3 2 1 0 9 Freescale Semiconductor, Inc. AN2525/D Table 7. DCmXor_C and DCmXor_T parameter description Freescale Semiconductor, Inc... Parameter Format Description Parameters written by CPU duty-cycle ratio in the range dc 16-bit fractional <–1,1) PWM period in number of TCR1 T 16-bit unsigned integer TPU cycles Dead-time in number of TCR1 DT 16-bit unsigned integer TPU cycles Time of 14 IMB clocks in TCR1 CPU14 16-bit unsigned integer clocks. address of synchronization channel prescaler parameter: $X4, sync_presc_addr 8-bit unsigned integer where X is synchronization channel number. $0 if no synchronization channel is used. Parameters written by TPU If fault channel is used, state of fault pin: fault_pinstate 0 or 1 0 ... low 1 ... high Other parameters are just for TPU function inner use. Performance Table 8. DCmXor_T State Statistics State ST SF Max IMB Clock Cycles 2 2 RAM Accesses by TPU 1 0 Table 9. DCmXor_C State Statistics State INIT STOP C1 C2 10 Max IMB Clock Cycles 88 100 76 28 DC Motor – XOR version TPU Function Set (DCmXor) For More Information On This Product, Go to: www.freescale.com RAM Accesses by TPU 16 1 13 9 Freescale Semiconductor, Inc. AN2525/D Detailed Function Description Execution times do not include the time slot transition time (TST = 10 or 14 IMB clocks) dc > 0% C1 SW1_1 Freescale Semiconductor, Inc... T T center-time center-time C2 C2 ST SF SW1_2 SW2_1 dc < 0% SF SF SF ST SF C2 SW3_1 C1 SF SW3_2 SF SW4_1 ST ST C2 SF SF ST SF SW4_2 ST ST SF SW2_2 ST ST ST ST SF ST flag0 = 1 link Figure 3. DCmXor_C and DCmXor_T timing DC Motor – XOR version TPU Function Set (DCmXor) For More Information On This Product, Go to: www.freescale.com 11 Freescale Semiconductor, Inc. AN2525/D SF Freescale Semiconductor, Inc... SF ST ST ST SF ST flag0 = 1 link Figure 4. DCmXor_T state diagram and 3 cases of timing NOTE: The timing of the link determines which case accurs. INIT C1 HSR = 10 HSR = 11 C2 Figure 5. DCmXor_C state diagram 12 STOP DC Motor – XOR version TPU Function Set (DCmXor) For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc. AN2525/D Detailed Function Description Freescale Semiconductor, Inc... Synchronization signal for DC Motor – XOR version (DCmXor_sync) The DCmXor_sync TPU function uses information obtained from DCmXor_C and DCmXor_T functions, the actual PWM center times and the PWM periods. This allows a signal to be generated, that tracks the changes in the PWM period and is always synchronized with the PWM. The synchronization signal is a positive pulse generated repeatedly after the prescaler or presc_copy PWM periods (see next paragraph). The low to high transition of the pulse can be adjusted by a parameter, either negative or positive, to go before or after the PWM period center time of a number of TCR1 TPU cycles. The pulse width pw is another synchronization signal parameter. move > 0 prescaler = 1 pw |move| center_time center_time T T move < 0 prescaler = 2 pw |move| center_time center_time center_time T T T Figure 6. Synchronization signal adjustment examples Synchronized Change of PWM Prescaler And Synchronization Signal Prescaler The DCmXor_sync TPU function actually uses the presc_copy parameter instead of the prescaler parameter. The prescaler parameter holds the prescaler value that is copied to the presc_copy by the DCmXor_bottom function at the time of the PWM parameters reload. This ensures that new prescaler values for the PWM signals, as well as the synchronization signal, are applied at the same time. Write the synchronization signals prescaler parameter address to the sync_presc_addr parameter to enable this mechanism. Write 0 to disable it, and remember to set the synchronization signal presc_copy parameter instead of the prescaler parameter in this case. DC Motor – XOR version TPU Function Set (DCmXor) For More Information On This Product, Go to: www.freescale.com 13 Freescale Semiconductor, Inc. AN2525/D Host Interface Written By CPU Written by both CPU and TPU Written By TPU Not Used Table 10. DCmXor_sync Control Bits Name 3 2 1 0 Freescale Semiconductor, Inc... Channel Function Select 1 0 Channel Priority 1 0 Host Service Bits (HSR) 1 Options DCmXor_sync function number (Assigned during assembly the DPTRAM code from library TPU functions) 00 – Channel Disabled 01 – Low Priority 10 – Middle Priority 11 – High Priority 00 – No Host Service Request 01 – Not used 10 – Initialization 11 – Not used 0 Host Sequence Bits (HSQ) xx – Not used Channel Interrupt Enable 0 – Channel Interrupt Disabled 1 – Channel Interrupt Enabled Channel Interrupt Status 0 – Interrupt Not Asserted 1 – Interrupt Asserted 0 0 TPU function DCmXor_sync generates an interrupt after each low to high transition. Table 11. DCmXor_sync Parameter RAM Synchronization channel Channel 14 Parameter 15 14 13 12 11 10 9 8 7 6 0 move 1 pw prescaler 2 presc_copy 3 4 time dec 5 T_copy 6 7 DC Motor – XOR version TPU Function Set (DCmXor) For More Information On This Product, Go to: www.freescale.com 5 4 3 2 1 0 Freescale Semiconductor, Inc. AN2525/D Detailed Function Description Table 12. DCmXor_sync parameter description Freescale Semiconductor, Inc... Parameter Format Description Parameters written by CPU The number of TCR1 TPU cycles to forego (negative) or come after move 16-bit signed integer (positive) the PWM period center time Synchronization pulse width in pw 16-bit unsigned integer number of TCR1 TPU cycles. The number of PWM periods per synchronization pulse prescaler 16-bit unsigned integer – use in case of synchronized prescalers change The number of PWM periods per synchronization pulse presc_copy 16-bit unsigned integer – use in case of asynchronized prescalers change Parameters written by TPU Other parameters are just for TPU function inner use. Performance There is one limitation. The absolute value of parameter move has to be less then a quarter of the PWM period T. move < T 4 Table 13. DCmXor_sync State Statistics State INIT S1 S2 S3 NOTE: Max IMB Clock Cycles 12 12 8 16 RAM Accesses by TPU 5 6 3 7 Execution times do not include the time slot transition time (TST = 10 or 14 IMB clocks) DC Motor – XOR version TPU Function Set (DCmXor) For More Information On This Product, Go to: www.freescale.com 15 Freescale Semiconductor, Inc. AN2525/D S2 S1 S3 center_time center_time center_time T T T Freescale Semiconductor, Inc... Figure 7. DCmXor_sync timing HSR = 10 INIT S1 S2 S3 Figure 8. DCmXor_sync state diagram 16 S1 DC Motor – XOR version TPU Function Set (DCmXor) For More Information On This Product, Go to: www.freescale.com S2 Freescale Semiconductor, Inc. AN2525/D Detailed Function Description Freescale Semiconductor, Inc... Resolver Reference Signal for DC Motor – XOR version (DCmXor_res) The DCmXor_res TPU function uses information read from the DCmXor_C and DCmXor_T functions, the actual PWM center times and the PWM periods. This allows a signal to be generated, which tracks the changes of the PWM period and is always synchronized with the PWM. The resolver reference signal is a 50% duty-cycle signal with a period equal to prescaler or synchronization channel presc_copy PWM periods (see next paragraph). The low to high transition of the pulse can be adjusted by a parameter, either negative or positive, to go before or after the PWM period center time of a number of TCR1 TPU cycles. move > 0 prescaler = 1 |move| center_time center_time T T center_time center_time center_time T T T move < 0 prescaler = 2 |move| Figure 9. Resolver reference signal adjustment examples Synchronized Change of PWM Prescaler And Resolver Reference Signals Prescaler The DCmXor_res TPU function can inherit the Synchronization Signal prescaler that is synchronously changed with PWM prescaler. Write the synchronization signals presc_copy parameter address to the presc_addr parameter to enable this mechanism. Write 0 to disable it, and in this case set prescaler parameter to directly specify prescaler value. DC Motor – XOR version TPU Function Set (DCmXor) For More Information On This Product, Go to: www.freescale.com 17 Freescale Semiconductor, Inc. AN2525/D Host Interface Written By CPU Written by both CPU and TPU Written By TPU Not Used Table 14. DCmXor_res Control Bits Name 3 2 1 0 Freescale Semiconductor, Inc... Channel Function Select 1 0 Channel Priority 1 0 Host Service Bits (HSR) 1 Options DCmXor_res function number (Assigned during assembly the DPTRAM code from library TPU functions) 00 – Channel Disabled 01 – Low Priority 10 – Middle Priority 11 – High Priority 00 – No Host Service Request 01 – Not used 10 – Initialization 11 – Not used 0 Host Sequence Bits (HSQ) xx – Not used Channel Interrupt Enable x – Not used Channel Interrupt Status x – Not used 0 0 Table 15. DCmXor_res Parameter RAM Resolver Channel 18 Parameter 15 14 13 12 11 10 9 8 7 6 0 move 1 2 presc_addr 3 prescaler time 4 dec 5 6 T_copy 7 DC Motor – XOR version TPU Function Set (DCmXor) For More Information On This Product, Go to: www.freescale.com 5 4 3 2 1 0 Freescale Semiconductor, Inc. AN2525/D Detailed Function Description Table 16. DCmXor_res parameter description Parameter Freescale Semiconductor, Inc... move presc_addr Format Description Parameters written by CPU The number of TCR1 TPU cycles to forego (negative) or come after 16-bit signed integer (positive) the PWM period center time $00X6, where X is a number of Synchronization Signal channel, to inherit Sync. channel prescaler or 16-bit unsigned integer $0000 to enable direct specification of prescaler value in prescaler parameter The number of PWM periods per synchronization pulse – use when apresc_addr = 0 Parameters written by TPU Other parameters are just for TPU function inner use. prescaler Performance 1, 2, 4, 6, 8, 10, 12, 14, ... There is one limitation. The absolute value of parameter move has to be less than a quarter of the PWM period T. move < T 4 Table 17. DCmXor_res State Statistics State INIT S1 S3 NOTE: Max IMB Clock Cycles 12 26 16 RAM Accesses by TPU 5 9 7 Execution times do not include the time slot transition time (TST = 10 or 14 IMB clocks) DC Motor – XOR version TPU Function Set (DCmXor) For More Information On This Product, Go to: www.freescale.com 19 Freescale Semiconductor, Inc. AN2525/D S3 S1 S1 center_time center_time center_time T T T Freescale Semiconductor, Inc... Figure 10. DCmXor_res timing HSR = 10 INIT S1 S3 Figure 11. DCmXor_res state diagram Fault Input for DC Motor – XOR version (DCmXor_fault) The DCmXor_fault is an input TPU function that monitors the pin, and if a high to low transition occurs, immediately sets all PWM channels low and cancels all further transitions on them. The PWM channels, as well as the synchronization and resolver reference signal channels (if used), have to be initialized again to start them running. The function returns the actual pinstate as a value of 0 (low) or 1 (high) in the parameter fault_pinstate. The parameter is placed on the SW1_1 channel to keep the fault channel parameter space free. 20 DC Motor – XOR version TPU Function Set (DCmXor) For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc. AN2525/D Detailed Function Description Host Interface Written By CPU Written by both CPU and TPU Written By TPU Not Used Table 18. DCmXor_fault Control Bits Name 3 2 1 0 Freescale Semiconductor, Inc... Channel Function Select 1 0 Channel Priority 1 0 Host Service Bits (HSR) 1 Options DCmXor_fault function number (Assigned during assembly the DPTRAM code from library TPU functions) 00 – Channel Disabled 01 – Low Priority 10 – Middle Priority 11 – High Priority 00 – No Host Service Request 01 – Not used 10 – Initialization 11 – Not used 0 Host Sequence Bits (HSQ) xx – Not used Channel Interrupt Enable 0 – Channel Interrupt Disabled 1 – Channel Interrupt Enabled Channel Interrupt Status 0 – Interrupt Not Asserted 1 – Interrupt Asserted 0 0 TPU function DCmXor_fault generates an interrupt when a high to low transition appears. DC Motor – XOR version TPU Function Set (DCmXor) For More Information On This Product, Go to: www.freescale.com 21 Freescale Semiconductor, Inc. AN2525/D Table 19. DCmXor_fault Parameter RAM Freescale Semiconductor, Inc... Fault input Channel Parameter 15 14 13 12 11 10 9 0 1 2 3 4 5 6 7 8 7 6 5 4 3 2 1 0 Table 20. DCmXor_fault parameter description Parameter Format Description Parameters written by TPU State of fault pin: 0 or 1 0 ... low 1 ... high fault_pinstate Performance Table 21. DCmXor_fault State Statistics State INIT FAULT NO_FAULT NOTE: 22 Max IMB Clock Cycles 8 106 4 RAM Accesses by TPU 2 2 1 Execution times do not include the time slot transition time (TST = 10 or 14 IMB clocks) DC Motor – XOR version TPU Function Set (DCmXor) For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc. AN2525/D Detailed Function Description NO_FAULT FAULT Figure 12. DCmXor_fault timing HSR = 10 Freescale Semiconductor, Inc... INIT FAULT NO_FAULT Figure 13. DCmXor_fault state diagram DC Motor – XOR version TPU Function Set (DCmXor) For More Information On This Product, Go to: www.freescale.com 23 Freescale Semiconductor, Inc. How to Reach Us: Home Page: www.freescale.com Freescale Semiconductor, Inc... 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