Freescale Semiconductor Data Sheet Document Number: MWCT1200DS Rev. 1.0, 01/2015 MWCT1200DS Overview Description Features The WCT1200 is a wireless power transmitter controller that integrates all required functions for WPC “Qi” compliant wireless power transmitter design. It’s an intelligent device to work with Freescale touch sensing technology or use periodically analog PING (configurable by user) to detect a mobile device for charging while gaining super low standby power. Once the mobile device is detected, the WCT1200 controls the power transfer by adjusting the operation frequency of the power stage according to message packets sent by the mobile device. • • • • • • • • • • • • • • Low power (5 W) solution for Wireless Power Consortium (WPC) compliant transmitter design Conforms to the V1.1 low power WPC specifications Supports wide DC input voltage range starting from 4.5 V, typically 5 V, 12 V Integrated digital demodulation on chip Supports all types of receiver modulation strategies (AC capacitor, AC resistor and DC resistor) Supports power loss Foreign Object Detection (FOD) Supports resonance shift FOD before the power transfer action. Dynamic input power limit for power limited power supply input, like USB power Super low standby power (less than 40 mW) by Freescale GPIO Touch Sensing technology Supports any free positioning multiple coils power transmitter solutions using frequency and duty cycle control LEDs for system status indication Over-voltage/current/temperature protection Software based solution to provide maximum design freedom and product differentiation FreeMASTER GUI tool to enable configuration, calibration, and debugging In order to maximize the design freedom and product differentiation, WCT1200 supports any low power free positioning multiple coils power transmitter design (WPC types or customization) using operation frequency and duty cycle control by software based solutions. Besides, easy-to-use FreeMASTER GUI tool with configuration, calibration and debugging functions provides user-friendly design experience and speed time-to-market. The WCT1200 includes digital demodulation module to reduce external components, dynamic input power limit function for power limited power supply input, over-voltage/current/temperature protection and FOD method to protect from overheating by misplaced metallic foreign objects. It also handles any abnormal condition and operational status, and provides comprehensive indicator outputs for robust system design. Applications • Low Power Wireless Power Transmitter Any free positioning multiple coils solution with frequency & duty cycle control (WPC types or customer properties) Wireless Charging System Functional Diagram © Freescale Semiconductor, Inc., 2015. All rights reserved. _______________________________________________________________________ Contents 1 Absolute Maximum Ratings .................................................................................................................... 5 1.1 Electrical operating ratings...................................................................................................................................... 5 1.2 Thermal handling ratings ........................................................................................................................................ 6 1.3 ESD handling ratings ............................................................................................................................................... 6 1.4 Moisture handling ratings ....................................................................................................................................... 6 2 Electrical Characteristics ......................................................................................................................... 7 2.1 General characteristics ............................................................................................................................................ 7 2.2 Device characteristics.............................................................................................................................................. 9 2.3 Thermal operating characteristics ......................................................................................................................... 14 3 Typical Performance Characteristics ............................................................................................... 15 3.1 System efficiency .................................................................................................................................................. 15 3.2 Standby power ...................................................................................................................................................... 16 3.3 Digital demodulation ............................................................................................................................................ 16 3.4 Foreign object detection ....................................................................................................................................... 16 3.5 Dynamic input power limit .................................................................................................................................... 17 4 Device Information ................................................................................................................................. 18 4.1 Functional block diagram ...................................................................................................................................... 18 4.2 Pinout diagram ..................................................................................................................................................... 18 4.3 Pin function description ........................................................................................................................................ 19 4.4 Ordering information ............................................................................................................................................ 20 4.5 Package outline drawing ....................................................................................................................................... 20 MWCT1200DS, Rev. 1.0 2 Freescale Semiconductor 5 Wireless Charging System Operation Principle ............................................................................ 21 5.1 Fundamentals ....................................................................................................................................................... 21 5.2 Power transfer ...................................................................................................................................................... 21 5.3 Communication..................................................................................................................................................... 22 5.4 System control state machine ............................................................................................................................... 25 5.5 Standby power ...................................................................................................................................................... 27 5.6 Foreign object detection ....................................................................................................................................... 27 6 Application Information........................................................................................................................ 29 6.1 On-board regulator ............................................................................................................................................... 29 6.2 Inverter and driver control .................................................................................................................................... 29 6.3 Primary coil and resonant capacitor ...................................................................................................................... 30 6.4 Primary coil selection switches and charge pump circuits ..................................................................................... 31 6.5 Low power control ................................................................................................................................................ 32 6.6 GPIO touch sensing ............................................................................................................................................... 33 6.7 ADC input channels ............................................................................................................................................... 33 6.8 Faults handling/recovery ...................................................................................................................................... 34 6.9 LEDs function ........................................................................................................................................................ 36 6.10 Configurable pins .................................................................................................................................................. 36 6.11 Unused pins .......................................................................................................................................................... 37 6.12 Power-on reset ..................................................................................................................................................... 37 6.13 External reset ........................................................................................................................................................ 37 6.14 Programming & Debug interface ........................................................................................................................... 37 6.15 Software module .................................................................................................................................................. 37 6.16 Example design schematics ................................................................................................................................... 39 MWCT1200DS, Rev. 1.0 Freescale Semiconductor 3 6.17 7 Guideline to other solutions configuration............................................................................................................ 39 Design Considerations ........................................................................................................................... 40 7.1 Electrical design considerations ............................................................................................................................ 40 7.2 PCB layout considerations ..................................................................................................................................... 41 7.3 Thermal design considerations.............................................................................................................................. 41 8 References and Links ............................................................................................................................. 43 8.1 References ............................................................................................................................................................ 43 8.2 Useful Links ........................................................................................................................................................... 43 MWCT1200DS, Rev. 1.0 4 Freescale Semiconductor 1 Absolute Maximum Ratings 1.1 Electrical operating ratings Table 1 Absolute maximum electrical ratings (VSS = 0 V, VSSA = 0 V) Characteristic Symbol Notes 1 Min. Max. Unit Supply Voltage Range VDD –0.3 4.0 V Analog Supply Voltage Range VDDA –0.3 4.0 V ADC High Voltage Reference VREFHx –0.3 4.0 V Voltage difference VDD to VDDA ΔVDD –0.3 0.3 V Voltage difference VSS to VSSA ΔVss –0.3 0.3 V Digital Input Voltage Range VIN Pin Group 1 –0.3 5.5 V RESET Input Voltage Range VIN_RESET Pin Group 2 –0.3 4.0 V Analog Input Voltage Range VINA Pin Group 3 –0.3 4.0 V VIC – –5.0 mA VOC – ±20.0 mA IICont –25 25 mA Input clamp current, per pin (VIN < VSS - 0.3 V) Output clamp current, per pin 2, 3 4 Contiguous pin DC injection current—regional limit sum of 16 contiguous pins Output Voltage Range (normal push-pull mode) VOUT Pin Group 1,2 –0.3 4.0 V Output Voltage Range (open drain mode) VOUTOD Pin Group 1 –0.3 5.5 V VOUTOD_RESET Pin Group 2 –0.3 4.0 V Output Voltage Range Ambient Temperature TA –40 85 °C Storage Temperature Range (Extended Industrial) TSTG –55 150 °C 1. 2. 3. 4. Default Mode: o Pin Group 1: GPIO, TDI, TDO, TMS, TCK o Pin Group 2: o Pin Group 3: ADC and Comparator Analog Inputs Continuous clamp current. All 5 volt tolerant digital I/O pins are internally clamped to VSS through an ESD protection diode. There is no diode connection to VDD. If VIN greater than VDIO_MIN (= VSS–0.3 V) is observed, then there is no need to provide current limiting resistors at the pads. If this limit cannot be observed, then a current limiting resistor is required. I/O is configured as push-pull mode. MWCT1200DS, Rev. 1.0 Freescale Semiconductor 5 1.2 Thermal handling ratings Table 2 Thermal handling ratings Symbol Description Min. Max. Unit Notes TSTG Storage temperature –55 150 °C 1 TSDR Solder temperature, lead-free – 260 °C 2 1. 2. Determined according to JEDEC Standard JESD22-A103, High Temperature Storage Life. Determined according to IPC/JEDEC Standard J-STD-020, Moisture/Reflow Sensitivity Classification for Nonhermetic Solid State Surface Mount Devices. 1.3 ESD handling ratings Table 3 ESD handling ratings Characteristic 1 Min. Max. Unit ESD for Human Body Model (HBM) -2000 +2000 V ESD for Machine Model (MM) -200 +200 V ESD for Charge Device Model (CDM) -500 +500 V Latch-up current at TA= 85°C (ILAT) -100 +100 mA 1. Parameter is achieved by design characterization on a small sample size from typical devices under typical conditions unless otherwise noted. 1.4 Moisture handling ratings Table 4 Moisture handling ratings Symbol MSL 1. Description Moisture sensitivity level Min. – Max. 3 Unit – Notes 1 Determined according to IPC/JEDEC Standard J-STD-020, Moisture/Reflow Sensitivity Classification for Nonhermetic Solid State Surface Mount Devices. MWCT1200DS, Rev. 1.0 6 Freescale Semiconductor 2 Electrical Characteristics 2.1 General characteristics Table 5 General electrical characteristics Recommended operating conditions (VREFLx = 0 V, VSSA = 0 V,VSS = 0 V) Characteristic 2 Symbol Notes Min. Supply Voltage VDD ,VDDA 2.7 ADC Reference Voltage High VREFHA VDDA -0.6 Typ. 3.3 Max. Test Unit conditions 3.6 V - VDDA V - VREFHB Voltage difference VDD to VDDA ΔVDD -0.1 0 0.1 V - Voltage difference VSS to VSSA ΔVss -0.1 0 0.1 V - Input Voltage High (digital inputs) VIH 1 (Pin Group 1) 0.7×VDD 5.5 V - VIH_RESET 1 (Pin Group 2) 0.7×VDD VDD V - VIL 1 (Pin Group 0.35×VDD V - mA Voltage High Input Voltage Low (digital inputs) - 1,2) Output Source Current High (at VOH min.) • IOH 3,4 Programmed for low drive 1 (Pin Group 1) - -2 1 (Pin Group 1) - -9 strength • Programmed for high drive strength Output Source Current High (at VOL max.) • • - IOL 3,4 1 (Pin Group - 2 Programmed for low drive 1,2) - 9 strength 1 (Pin Group Programmed for high drive 1,2) mA strength Output Voltage High VOH 1 (Pin Group 1) VDD -0.5 - - V IOH = IOHmax Output Voltage Low VOL 1 (Pin Group - - 0.5 V IOL = IOLmax - 0 +/-2.5 µA VIN = 2.4V to 5.5V 1,2) Digital Input Current High IIH 1 (Pin Group 1) pull-up enabled or disabled 1 (Pin Group 2) VIN = 2.4V to VDD MWCT1200DS, Rev. 1.0 Freescale Semiconductor 7 Comparator Input Current High IIHC Internal Pull-Up Resistance RPull-Up Internal Pull-Down Resistance RPull-Down Comparator Input Current Low IILC 1 IOZ Output Current High Impedance State 0 +/-2 µA VIN = VDDA 20 - 50 kΩ - 20 - 50 kΩ - 1 (Pin Group 3) - 0 +/-2 µA VIN = 0V 1 (Pin Group - 0 +/-1 µA - 0.06×VDD - - V - 1 (Pin Group 3) 1,2) Schmitt Trigger Input Hysteresis VHYS 1 (Pin Group 1,2) Input capacitance CIN - 10 - pF - Output capacitance COUT - 10 - pF - 1.5 - - Bus - GPIO pin interrupt pulse width 5 TINT_Pulse 6 clock Port rise and fall time (high drive TPort_H_DIS 7 5.5 - 15.1 ns strength). Slew disabled. 2.7 ≤ VDD ≤ 3.6V Port rise and fall time (high drive strength). Slew enabled. TPort_H_EN 7 1.5 - 6.8 ns 2.7 ≤ VDD ≤ 3.6V Port rise and fall time (low drive strength). Slew disabled. TPort_L_DIS 8 8.2 - 17.8 ns 2.7 ≤ VDD ≤ 3.6V Port rise and fall time (low drive strength). Slew enabled. TPort_L_EN 8 3.2 - 9.2 ns 2.7 ≤ VDD ≤ 3.6V Device (system and core) clock frequency fSYSCLK 0.001 - 100 MHz - Bus clock fBUS - - 50 MHz - 1. 2. 3. 4. 5. 6. 7. 8. Default Mode o Pin Group 1: GPIO, TDI, TDO, TMS, TCK o Pin Group 2: o Pin Group 3: ADC and Comparator Analog Inputs ADC specifications are not guaranteed when VDDA is below 3.0 V. Total chip source or sink current cannot exceed 75mA. Contiguous pin DC injection current of regional limit—including sum of negative injection currents or sum of positive injection currents of 16 contiguous pins—is 25mA. Applies to a pin only when it is configured as GPIO and configured to cause an interrupt by appropriately programming GPIOn_IPOLR and GPIOn_IENR. The greater synchronous and asynchronous timing must be met. 75 pF load 15 pF load MWCT1200DS, Rev. 1.0 8 Freescale Semiconductor 2.2 Device characteristics Table 6 General device characteristics Power mode transition behavior Symbol TPOR Description After a POR event, the amount of delay from when VDD Min. Max. Unit 199 225 µs Notes reaches 2.7 V to when the first instruction executes (over the operating temperature range). TS2R STOP mode to RUN mode 6.79 7.27 µs 1 TLPS2LPR LPS mode to LPRUN mode 240.9 551 µs 2 Reset and interrupt timing Symbol tRA tRDA Characteristic Minimum Assertion Duration desertion to First Address Fetch Min. Max. Unit Notes 16 - ns 3 865 × TOSC + - ns 4 570.9 ns 8 × TSYSCLK tIF Delay from Interrupt Assertion to Fetch of first 361.3 instruction (exiting STOP mode) PMC Low-Voltage Detection (LVD) and Power-On Reset (POR) parameters Symbol Characteristic 5 VPOR_A POR Assert Voltage VPOR_R POR Release Voltage VLVI_2p7 VLVI_2p2 Min. Typ. Max. Unit - 2.0 - V - 2.7 - V LVI_2p7 Threshold Voltage - 2.73 - V LVI_2p2 Threshold Voltage - 2.23 - V 6 JTAG timing Symbol Description Min. Max. Unit fOP TCK frequency of operation DC fSYSCLK/8 MHz tPW TCK clock pulse width 50 - ns tDS TMS, TDI data set-up time 5 - ns tDH TMS, TDI data hold time 5 - ns tDV TCK low to TDO data valid - 30 ns tTS TCK low to TDO tri-state - 30 ns Notes Regulator 1.2 V parameters Symbol Characteristic Min. Typ. Max. Unit MWCT1200DS, Rev. 1.0 Freescale Semiconductor 9 VCAP Output Voltage 7 8 - 1.22 - V ISS Short Circuit Current - 600 - mA TRSC Short Circuit Tolerance (VCAP shorted to ground) - - 30 Mins VREF Reference Voltage (after trim) - 1.21 - V Phase-locked loop timing Symbol fRef_PLL fOP_PLL Characteristic 9 PLL input reference frequency 10 PLL output frequency 11 tLock_PLL PLL lock time tDC_PLL Allowed Duty Cycle of input reference Min. Typ. Max. Unit 8 8 16 MHz 200 - 400 MHz 35.5 - 73.2 µs 40 50 60 % Relaxation oscillator electrical specifications Symbol fROSC_8M fROSC_8M_Delta fROSC_200k fROSC_200k_Delt a tStab tDC_ROSC Characteristic Min. Typ. Max. Unit 12 8 MHz Output Frequency RUN Mode • 0°C to 105°C • -40°C to 105°C Standby Mode (IRC trimmed @ 8 MHz) • -40°C to 105°C 7.84 8 8.16 MHz 7.76 8 8.24 MHz - 405 - kHz - +/-1.5 +/-1.5 +/-2 +/-3 % % 194 200 206 kHz - +/-1.5 +/-1.5 +/-2 +/-3 % % Stabilization Time 14 • 8 MHz output 15 • 200 kHz output - 0.12 10 - µs µs Output Duty Cycle 48 50 52 % 8 MHz Frequency Variation over 25°C RUN Mode Due to temperature • 0°C to 105°C • -40°C to 105°C 13 200 kHz Output Frequency RUN Mode • -40°C to 105°C 200 kHz Output Frequency Variation over 25°C RUN Mode Due to temperature • 0°C to 85°C • -40°C to 105°C Flash specifications Symbol thvpgm4 thversscr thversall Description Longword Program high-voltage time Sector Erase high-voltage time Erase All high-voltage time 16 16 Min. Typ. Max. Unit - 7.5 18 µs - 13 113 ms - 52 452 ms MWCT1200DS, Rev. 1.0 10 Freescale Semiconductor trd1sec1k Read 1s Section execution time (flash sector) tpgmchk Program Check execution time 17 trdrsrc Read Resource execution time 17 tpgm4 Program Longword execution time tersscr Erase Flash Sector execution time trd1all Read 1s All Blocks execution time Read Once execution time tpgmonce Program Once execution time tvfykey tflashretp10k tflashretp1k nflashcyc 18 17 trdonce tersall 17 Erase All Blocks execution time 18 Verify Backdoor Access Key execution time 17 Data retention after up to 10 K cycles - 60 µs - - 45 µs - - 30 µs - 65 145 µs - 14 114 ms - - 0.9 ms - - 25 µs - 65 - µs - 70 575 ms - - 30 µs - years - years - cycles 5 Data retention after up to 1 K cycles Cycling endurance - 50 20 20 19 100 19 19 10 K 50 K 12-bit ADC electrical specifications Symbol VDDA fADCCLK Characteristic Supply voltage Min. 21 22 ADC conversion clock 23 Typ. Max. Unit 3 3.3 3.6 V 0.1 - 10 MHz VREFL - VREFH V 0 - VDDA V - 8 - tADCCLK RADC Conversion range with single-ended/unipolar VADCIN Input voltage range (per input) with internal reference tADC Conversion time tADCPU ADC power-up time (from adc_pdn) - 13 - tADCCLK IADCRUN ADC RUN current (per ADC block) - 1.8 - mA - +/- 1.5 +/- 2.2 LSB 25 26 24 27 INLADC Integral non-linearity DNLADC Differential non-linearity - +/- 0.5 +/- 0.8 LSB EGAIN Gain Error - 0.996 to 1.004 0.99 to 1.101 - ENOB Effective number of bits - 10.6 - bits 28 - - +/-3 mA - 4.8 - pF 26 IINJ Input injection current CADCI Input sampling capacitance 27 Comparator and 6-bit DAC electrical specifications Symbol Description Min. Typ. Max. Unit VDD Supply voltage 2.7 - 3.6 V IDDHS Supply current, High-speed mode(EN=1, PMODE=1) - 300 - µA IDDLS Supply current, Low-speed mode(EN=1, PMODE=0) - 36 - µA VAIN Analog input voltage Vss - VDD V MWCT1200DS, Rev. 1.0 Freescale Semiconductor 11 VAIO Analog input offset voltage VH Analog comparator hysteresis • CR0[HYSTCTR]=00 • CR0[HYSTCTR]=01 • CR0[HYSTCTR]=10 • CR0[HYSTCTR]=11 29 - - 20 mV - 5 13 mV - 25 48 mV - 55 105 mV - 80 148 mV VCMPOh Output high VDD -0.5 - - V VCMPOl Output low - - 0.5 V tDHS Propagation delay, high-speed mode(EN=1, - 25 50 ns - 60 200 ns PMODE=1) tDLS 30 Propagation delay, low-speed mode(EN=1, PMODE=0) 30 31 tDInit Analog comparator initialization delay - 40 - µs IDAC6b 6-bit DAC current adder (enabled) - 7 - µA RDAC6b 6-bit DAC reference inputs VDDA - VDD V INLDAC6b 6-bit DAC integral non-linearity -0.5 - 0.5 LSB DNLDAC6b 6-bit DAC differential non-linearity -0.3 - 0.3 LSB 32 PWM timing parameters Symbol Characteristic 33,34 Min. Typ. Max. Unit fPWM PWM clock frequency - 100 - MHz SPWMNEP NanoEdge Placement (NEP) step size - 312 - ps tDFLT Delay for fault input activating to PWM output deactivated 1 - - ns tPWMPU Power-up time - 25 - μs 35 Timer timing Symbol Characteristic Min. Max. Unit Notes PIN Timer input period 2Ttimer + 6 - ns 36 PINHL Timer input high/low period 1Ttimer + 3 - ns 36 POUT Timer output period 2Ttimer - 2 - ns 36 POUTHL Timer output high/low period 1Ttimer - 2 - ns 36 SCI timing Symbol Characteristic Min. Max. Unit BRSCI Baud rate - (fMAX_SCI /16) Mbit/s PW RXD RXD pulse width 0.965/BRSCI 1.04/BRSCI ns PW TXD TXD pulse width 0.965/BRSCI 1.04/BRSCI ns Notes 37 MWCT1200DS, Rev. 1.0 12 Freescale Semiconductor IIC timing Min. Symbol Max. Characteristic Unit Min. Max. Min. fSCL SCL clock frequency 0 100 0 400 kHz tHD_STA Hold time (repeated) START condition. After this period, the first clock pulse is generated. 4 - 0.6 - µs tSCL_LOW LOW period of the SCL clock 4.7 - 1.3 - µs tSCL_HIGH HIGH period of the SCL clock 4 - 0.6 - µs tSU_STA Set-up time for a repeated START condition 4.7 0.6 - tHD_DAT Data hold time for IIC bus devices 0 - 38 tSU_DAT Data set-up time 250 tr Rise time of SDA and SCL signals tf 3.45 41 39 0 40 - 100 - 1000 Fall time of SDA and SCL signals - tSU_STOP Set-up time for STOP condition tBUS_Free tSP 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. 21. 22. 23. 24. 25. 0.9 42 Notes Max. µs 38 µs - ns 20 + 0.1Cb 300 ns 43 300 20 + 0.1Cb 300 ns 42, 43 4 - 0.6 - µs Bus free time between STOP and START condition 4.7 - 1.3 - µs Pulse width of spikes that must be suppressed by the input filter N/A N/A 0 50 ns Clock configuration: CPU and system clocks= 100 MHz; Bus Clock = 100 MHz. CPU clock = 200 kHz and 8 MHz IRC on standby. pin filter is enabled by setting the RST_FLT bit in the SIM_CTRL register to 1, the minimum pulse assertion must be If the greater than 21 ns. TOSC means oscillator clock cycle; TSYSCLK means system clock cycle. During 3.3 V VDD power supply ramp down During 3.3 V VDD power supply ramp up (gated by LVI_2p7) Value is after trim Guaranteed by design An externally supplied reference clock should be as free as possible from any phase jitter for the PLL to work correctly. The PLL is optimized for 8 MHz input. The frequency of the core system clock cannot exceed 50 MHz. If the NanoEdge PWM is available, the PLL output must be set to 400 MHz. This is the time required after the PLL is enabled to ensure reliable operation. Frequency after application of 8 MHz trimmed. Frequency after application of 200 kHz trimmed. Standby to run mode transition. Power down to run mode transition. Maximum time based on expectations at cycling end-of-life. Assumes 25 MHz flash clock frequency. Maximum times for erase parameters based on expectations at cycling end-of-life. Typical data retention values are based on measured response accelerated at high temperature and derated to a constant 25°C use profile. Engineering Bulletin EB618 does not apply to this technology. Typical endurance defined in Engineering Bulletin EB619. Cycling endurance represents number of program/erase cycles at -40°C ≤ Tj ≤ 125°C. The ADC functions up to VDDA = 2.7 V. When VDDA is below 3.0 V, ADC specifications are not guaranteed. ADC clock duty cycle is 45% ~ 55%. Conversion range is defined for x1 gain setting. For x2 and x4 the range is 1/2 and 1/4, respectively. In unipolar mode, positive input must be ensured to be always greater than negative input. First conversion takes 10 clock cycles. MWCT1200DS, Rev. 1.0 Freescale Semiconductor 13 26. 27. 28. 29. 30. 31. 32. 33. 34. 35. 36. 37. 38. 39. 40. 41. INLADC/DNLADC is measured from VADCIN = VREFL to VADCIN = VREFH using Histogram method at x1 gain setting. Least Significant Bit = 0.806 mV at 3.3 V VDDA, x1 gain setting. The current that can be injected into or sourced from an unselected ADC input without affecting the performance of the ADC. Typical hysteresis is measured with input voltage range limited to 0.6 to VDD-0.6V. Signal swing is 100 mV. Comparator initialization delay is defined as the time between software writes to change control inputs (Writes to DACEN, VRSEL, PSEL, MSEL, VOSEL) and the comparator output settling to a stable level. 1 LSB = Vreference/64. Reference IPbus clock of 100 MHz in NanoEdge Placement mode. Temperature and voltage variations do not affect NanoEdge Placement step size. Powerdown to NanoEdge mode transition. Ttimer = Timer input clock cycle. For 100 MHz operation, Ttimer = 10 ns. fMAX_SCI is the frequency of operation of the SCI clock in MHz, which can be selected as the bus clock (max. 50 MHz depending on part number) or 2x bus clock (max. 100 MHz) for the device. The master mode I2C deasserts ACK of an address byte simultaneously with the falling edge of SCL. If no slaves acknowledge this address byte, then a negative hold time can result, depending on the edge rates of the SDA and SCL lines. The maximum tHD_DAT must be met only if the device does not stretch the LOW period (tSCL_LOW) of the SCL signal. Input signal Slew = 10 ns and Output Load = 50 pF Set-up time in slave-transmitter mode is 1 IPBus clock period, if the TX FIFO is empty. 42. A Fast mode IIC bus device can be used in a Standard mode IIC bus system, but the requirement tSU_DAT ≥ 250 ns must then be met. This is automatically the case if the device does not stretch the LOW period of the SCL signal. If such a device does stretch the LOW period of the SCL signal, then it must output the next data bit to the SDA line trmax + tSU_DAT = 1000 + 250 = 1250ns (according to the Standard mode I2C bus specification) before the SCL line is released. 43. Cb = total capacitance of the one bus line in pF. 2.3 Thermal operating characteristics Table 7 General thermal characteristics Symbol Description Min Max Unit TJ Die junction temperature -40 125 °C TA Ambient temperature -40 85 °C MWCT1200DS, Rev. 1.0 14 Freescale Semiconductor 3 Typical Performance Characteristics 3.1 System efficiency The typical maximum system efficiency (RX output power vs. TX input power) on the WCT1200 solution with the standard receiver (RX for short, bq51013B based) is more than 71%. Figure 1 System efficiency on the WCT1200 solution Note: Power components are the main factor to determine the system efficiency, such as drivers and MOSFETs. The efficiency data in Figure 1 is obtained on Freescale reference solution with A28 configuration. Figure 2 shows the active charging area of the Freescale WCT1200 A28 transmitter reference solution — transmitter well charges receiver at different X/Y offsets. For this test, the receiver is tested with constant 700 mA loading and 3 mm Z gap between transmitter surface and receiver surface. MWCT1200DS, Rev. 1.0 Freescale Semiconductor 15 Figure 2 Active charging area on the WCT1200 A28 transmitter reference solution 3.2 Standby power WCT1200 solution only consumes the very low standby power with the special low power control method, and can further achieve ultra low standby power by using the Freescale Touch Sensing technology. (Freescale reference solution with A28 configuration uses Freescale GPIO Touch Sensing Software technology). Transmitter (TX for short) power consumption in standby mode: < 11 mA (55 mW with 5 V DC input) Transmitter power consumption in standby mode with GPIO Touch Sensing technology: < 8 mA (40 mW with 5 V DC input) 3.3 Digital demodulation WCT1200 solution employs digital demodulation algorithm to communicate with RX. This method can achieve high performance, low cost, very simple coil signal sensing circuit with less component number. 3.4 Foreign object detection WCT1200 solution uses flexible, intelligent, and easy-to-use FOD algorithm to assure accurate foreign metal objects detection. With Freescale FreeMASTER GUI tool, FOD algorithm can be easily calibrated to get accurate power loss information especially for very sensitive foreign objects. On the Freescale reference solution, the calculated power loss resolution between transmitted power and received power is less than 100 mW. The WCT1200 solution also supports the Resonance Shift FOD. When the FO is present on the active charging surface without the RX, the system detects this FO and enters the fault state. MWCT1200DS, Rev. 1.0 16 Freescale Semiconductor 3.5 Dynamic input power limit When TX is powered by a power limited power supply, such as USB power, WCT1200 can limit the TX output power and provide necessary margin relative to the input power supply capability. By monitoring the input voltage and input current of TX, when it drops to a specified level and still positive Control Error Packet (CEP) is received, WCT1200 will stop increasing output power and control TX operating in input power limit state. User can know the system is in DIPL control mode by LED indication, LED1 and LED2 will be in fast blinking mode when input power is limited. When the WCT1200 enters DIPL mode, it will not exit from this state until the RX is moved away. The input voltage level for DIPL control can be configured in the WCT1200 example project. MWCT1200DS, Rev. 1.0 Freescale Semiconductor 17 4 Device Information 4.1 Functional block diagram From Figure 3, the low power feature with Freescale Touch Sensing technology is optional according to user requirements for minimizing standby power. When this function is not deployed, its pins can be configured for other purpose of use. Besides, 10 pins (dashed) are also configurable for different design requirements to provide design freedom and differentiation. Figure 3 WCT1200 function block diagram 4.2 Pinout diagram Figure 4 WCT1200 pin configuration (32-pin QFN) MWCT1200DS, Rev. 1.0 18 Freescale Semiconductor 4.3 Pin function description By default, each pin is configured for its primary function (listed first). Any alternative functionality, shown in parentheses, must be programmed through the FreeMASTER GUI tool. Table 8 Pin signal descriptions Signal name TCK COIL1_EN COIL2_EN LED1 Pin No. Type Function description 1 Input Test clock input, connected internally to a pull-up resistor 2 Input A direct hardware reset, when RESET is asserted low, device is initialized and placed in the reset state. Connect a pull-up resistor and decoupling capacitor 3 Output Primary coil1 enable pin, enable: high level; disable: low level Input/Output General purpose input/output pin Output Primary coil2 enable pin, enable: high level; disable: low level Input/Output General purpose input/output pin Output LED1 drive output for system status indicator Input/Output General purpose input/output pin 4 5 IN_VOL 6 Input Input voltage detection, analog input pin TEMP3 7 Input Temperature detection input 3, analog input pin IN_CURR 8 Input Input current detection, analog input pin VDDA 9 Supply Analog power to on-chip analog module VSSA 10 Supply Analog ground to on-chip analog module TEMP1 11 Input Temperature detection input 1, analog input pin TEMP2 12 Input Temperature detection input 2, analog input pin COIL_CURR 13 Input Primary coil current detection, analog input pin VSS1 14 Supply Digital ground to on-chip digital module PORT1 15 Input/Output General purpose input/output pin UART_RX 16 Input UART receive data input Input/Output General purpose input/output pin Output UART transmit data output Input/Output General purpose input/output pin Input/Output Touch pad detection interface 1 UART_TX TOUCH_PAD1 17 18 General purpose input/output pin LED2 19 Output LED drive output for system status indicator MWCT1200DS, Rev. 1.0 Freescale Semiconductor 19 TOUCH_PAD2 20 Input/Open-drain output IIC serial clock Input/Output Touch pad detection interface 2 Input/Open-drain output IIC serial data line PWM2 21 Output PWM output 2, control one half of inverter bridge PWM1 22 Output PWM output 1, control another half of inverter bridge TOUCH_PAD3 23 Input/Output Touch pad detection interface 3 General purpose input/output pin COIL0_EN PUMP_PWM DRIVER_EN 24 25 26 Output Primary coil0 enable pin, enable: high level; disable: low level Input/Output General purpose input/output pin Output PWM output for charger pump Input/Output General purpose input/output pin Output Pre-driver chip output and auxiliary power enable pin, enable: high level; disable: low level Input/Output General purpose input/output pin VCAP 27 Supply Connect a 2.2μF or greater capacitor between this pin and VSS VDD 28 Supply Digital power to on-chip digital module VSS2 29 Supply Digital ground to on-chip digital module TDO 30 Output Test data output TMS 31 Input Test mode select input, connect a pull-up resistor to VDD TDI 32 Input Test data input, connected internally to a pull-up resistor 4.4 Ordering information Table 9 lists the pertinent information needed to place an order. Consult a Freescale Semiconductor sales office or authorized distributor to determine availability and to order this device. Table 9 WCT1200 ordering information Device MWCT1200 4.5 Supply voltage 2.7 to 3.6V Package type Quad Flat No-leaded (QFN) Pin count 32 Ambient temp. -40 to +85℃ Order number MWCT1200CFM Package outline drawing To find a package drawing, go to freescale.com and perform a keyword search for the drawing’s document number of 98ASA00473D. MWCT1200DS, Rev. 1.0 20 Freescale Semiconductor 5 Wireless Charging System Operation Principle 5.1 Fundamentals Figure 5 Working principle of Wireless Charging System The Wireless Charging system works as the digital switched mode power supply with the transformer, which is separated into two parts: The transformer primary coil is on the transmitter, working as the TX coil, and the transformer secondary coil is on the receiver side as the RX coil. The basic system working principle diagram is shown in Figure 5. As this system works based on magnetic induction, the better coupling between the TX coil and RX coil gain better system efficiency, so the RX coil should be closely and center aligned with the TX coil as possible. After the RX coil receives the power from the TX coil by magnetic field, it regulates the received voltage to power the load, and send its operational information to TX according to specific protocol by the communication link. Then the system can achieve the closed-loop control, and power the load stably and wirelessly. 5.2 Power transfer When the wireless charging receiver is placed on the transmitter coils and the required conditions are met, the power transfer starts. • The TX coil and RX coil meet proper specifications, such as the inductance, coil dimensions, coil materials, and magnets shielding. • The distance is in suitable range (less than 6 mm for Z axis) between the TX coil and RX coil. • The RX coil should be in the active area of the TX charging surface, which still means that the TX coil and RX coil should be coupled well. Coil coupling highly impacts the power transfer efficiency, and good coupling can achieve high efficiency. The coil shielding is also important, because the magnetic field leaking into the air will not transfer the power from TX to RX, and the shielding can contain the magnetic field as much as possible to improve the system efficiency and avoid bad effect of the nearby objects from interference. The shielding should be designed to place at the back of the TX coil and RX coil. MWCT1200DS, Rev. 1.0 Freescale Semiconductor 21 The power transfer must function correctly under the conditions when the RX coil is on the TX charging area during the overall system operational phases. To facilitate power transfer control, set the system operating frequency on the right side of resonant frequency of resonant network (because resonant converter works in a soft-switching mode when its operational frequency is over the resonant frequency and its output power changes monotonously with the adjustment of the operational frequency). For WPC specification, the “Qi” defines the coil inductance and resonant capacitance, the resonant frequency is fixed as 100 kHz, then power transfer can work normally by adjusting the TX operating frequency from 110 kHz to 205 kHz with fixed 50% duty cycle. The higher operating frequency means lower power transferred to RX, and lower operating frequency means higher power transferred to RX. The duty cycle will decrease when the operating frequency reaches to 205 kHz. Figure 6 shows the voltage gain (voltage on resonant inductor vs. the input voltage) change with operating frequency, as we can see voltage gain will increase when the operating frequency decreases. Figure 6 LC Parallel resonant converter control principle 5.3 5.3.1 Communication Modulator In low power wireless charging application, there is only one-way communication link between the receiver and the transmitter, and the receiver sends the information to transmitter by communication packages. The information includes the power requirements, received power, receiver ID and version, receiver power ratings, and charging end command. MWCT1200DS, Rev. 1.0 22 Freescale Semiconductor Figure 7 Load modulation scheme Figure 7 shows the modulation technologies at the RX side. RX modulates load by switching modulation resistor ( , AC side or DC side), or modulation capacitor ( , AC side). The amplitude of voltage/current on RX coil is modulated through connecting or disconnecting modulation load (resistor or capacitor). The amplitude of voltage/current on TX coil is also modulated to reflect load switching through magnetic induction. Then TX demodulates the sensed amplitude change of current ( > 15mA), > 200mV) on TX coil. Figure 8 shows how the RX switching modulation capacitor affects or voltage ( the TX resonant characteristics (Gain vs. Frequency characteristics). Figure 8 Load modulation principle The Bode diagram in Figure 8 shows that the voltage amplitude on the TX coil will decrease when the modulation capacitor is connected on the RX side. The RX couples the communication signal onto the power signal through modulating power signal directly. The WPC defines the modulation baud rate to 2 kbps. 5.3.2 Demodulator As the RX modulates the communication signal on the power signal, the TX has to demodulate communication signal from the power signal to get the correct information sent by RX, and further control the whole system operation. Figure 9 shows the power signal (voltage) waveform coupled with the communication signal on the TX coil. MWCT1200DS, Rev. 1.0 Freescale Semiconductor 23 Figure 9 TX coil voltage profile with RX modulation The WCT1200 employs the software solution to implement demodulator, also called digital demodulation technology. The WCT1200 directly senses the voltage on resonant capacitor through the very simple, low cost RC circuit (Figure 10), and the high speed 12-bit cyclic ADC is capable of handling the maximum 205 kHz signal in time to assure accurate signal sampling. After the resonant capacitors voltage value is obtained, the equivalent resonant current in the coil can be calculated, and this coil current is used for the digital demodulation algorithm. After that, WCT1200 decodes the demodulated information to get the accurate communication message. Besides, the calculated coil current is also used for the FOD algorithm. Figure 10 Sensing circuit and waveform of TX resonant capacitor voltage With Freescale digital demodulation algorithm, the WCT1200 can support all available modulation methods on the RX, such AC resistor, DC resistor, or AC capacitor, and pass all compliance tests defined in the WPC specifications. 5.3.3 Message encoding scheme The WCT1200 demodulates and decodes the message sent from RX that is encoded by the differential bi-phase scheme. A logic ONE bit is encoded using two transitions in the 2 kHz clock period (500 us), and a logic ZERO bit using one transition. One 8-bit data, one Start bit, one Parity bit and one Stop bit compose one message byte. A typical packet consists of four parts, namely a preamble ( 11 bits), a header (1 byte), a message (1 to 27 bytes), and a checksum (1 byte). Figure 11 shows the detailed message encoding scheme that WPC defines. Digital demodulation module in WCT1200 extracts the digital encoded communication signal from the analog power signal. The decoding module packs up the demodulated bits into message byte, and then message packet, which is processed by the system State Machine. MWCT1200DS, Rev. 1.0 24 Freescale Semiconductor a) Bit Encoding b) Byte Encoding c) Packet Structure Figure 11 WPC communication message encoding scheme 5.4 System control state machine WCT1200 embeds a WPC “Qi” State Machine to process received communication message from RX and control power transfer to RX. The overall system behavior between transmitter and receiver is controlled by the State Machine shown in Figure 12. Figure 12 WPC Wireless Charging System state machine 5.4.1 Start phase In the Start phase, the TX system runs in low power mode to judge whether an object is placed on the TX coil surface. The PING operation runs every 400 ms, and during the PING interval, the system is in the MWCT1200DS, Rev. 1.0 Freescale Semiconductor 25 Start phase. If the touch sensing function is enabled, the WCT1200 enters deep low power mode as described in the Standby Power section. 5.4.2 PING phase In the PING phase, the TX system works on both analog PING and digital PING to detect a receiver placed on the TX charging area. The analog PING time is far shorter than the digital PING for power-saving purposes. The analog PING enables a very short AC pulse on the TX coil, WCT1200 reads back the coil current and compares it with the predefined current change threshold to judge whether an object is put on. The default coil current change threshold is 5%, which the user can set in FreeMASTER GUI to get good sensitivity. For digital PING, the TX system applies a power signal at 175 kHz with 50% duty cycle to attempt to set up communication with RX. In response, RX must send out the Signal Strength packet. Signal Strength message indicates the degree of coupling between TX coil and RX coil, and is the percentage of rectifier output signal against the possible maximum PING signal. In this formula, is the monitored variable, and during digital PING. is the maximum value, which the RX expects for When the Signal Strength packet is received in the PING phase, the system enters the Identification & Configuration phase. 5.4.3 Identification & Configuration phase In the Identification & Configuration phase, the TX system continues to identify the receiver device and collects the configuration information for a power transfer setup. Required packets in the Identification & Configuration phase: • Identification packet (0x71) • Extended Identification packet (0x81)* • Configuration packet (0x51) * If Ext bit of Identification packet is set to 1. The system must receive these packets in order: • Identification packet (0x71) • Extended Identification packet (0x81) • Up to 7 optional configuration packets (0x51) o Power Control Hold-off Packet (0x06) o Proprietary Packet (0x18 – 0xF2) MWCT1200DS, Rev. 1.0 26 Freescale Semiconductor • Configuration Packet (0x51) If the Identification & Configuration packets are received in right timing and format according to specifications, the TX system enters power transfer phase. 5.4.4 Power transfer phase During the Power Transfer phase, the TX system receives the Control Error packet from the RX and controls the amount of output power by adjusting the PWM frequency in 110 kHz – 205 kHz range with 50% duty cycle. If the PWM frequency reaches 110 kHz and the positive Control Error value is still received (more output power required), the TX system keeps the current power output. If the PWM frequency reaches 205 kHz and the negative Control Error value is still received, the TX system decreases PWM duty cycle in the range from 50% to 10%. During the power transfer, the TX system also executes the FOD algorithm by using the power packet received from the RX. Required packets in the Power Transfer phase: • Control Error packet (0x03) • Received Power packet (0x04) When the TX system receives the following packets, it ends power transfer in the Power Transfer phase: • Charge Status packet (0x05) * • End Power Transfer packet (0x02) * If the Charge Status packet value is set to 0xFF. In the Power Transfer phase, the TX system always checks the timing of the Control Error packet and the Received Power packet, and whether it complies with specifications. If any violation happens, the TX system ends the power transfer. 5.5 Standby power When there is no charging activity, the TX system enters the standby (Start phase) mode. In standby mode, all analog parts on a board are powered down by the WCT1200, and the WCT1200 itself runs in low power state during the PING interval. The WCT1200 can enter deep sleep state if Freescale GPIO Touch Sensing technology is supported in TX system. In this case, WCT1200 is in LPSTOP (low power STOP) state, only three GPIO touch pads, timer and CPU are periodically activated to sense the electrode capacitance change to know if an object is placed on TX charging area. By the Freescale Touch Sensing technology, the standby current of the overall TX system can be as low as 8 mA under 5 volts input voltage condition. 5.6 Foreign object detection Following the latest WPC “Qi” specifications, WCT1200 supports the Foreign Object Detection (FOD) function. The WCT1200 detects foreign objects on the TX charging area by using a power loss method MWCT1200DS, Rev. 1.0 Freescale Semiconductor 27 during the Power Transfer phase. TX power loss is calculated by using these equations. When the power loss is greater than a predefined threshold, the system FOD protection is activated. For a “Qi” v1.1 or later version compliant RX, it should send Received Power packet to TX, which equals the RX output power plus RX power loss. But for a “Qi” v1.0 compliant RX, it sends only rectifier output power to TX. The FOD function in WCT1200 is only active when a “Qi” v1.1 or later version compliant RX is detected. To get an accurate power loss on the TX, the user must calibrate the analog sensing modules on the TX system to get accurate input power value and transmitted power value. As a part of the FOD solution, Freescale provides an easy-to-use and user-friendly FreeMASTER GUI tool for input voltage, input current and power loss calibration on the TX board. FOD parameters are burned in the WCT1200 internal Flash, about how to tune FOD related parameters, like power loss threshold, see the WCT Runtime Debug User Guide (WCT1XXXRTDUG). Where: • • ― Wireless charging system power loss ― Transmitted power from TX coil • ― Received power from RX coil • ― TX input power from power source • • ― Total TX power losses for producing transmitted power ― RX output power to load • ― Total RX power losses for producing output power • ― Coefficients to estimate the total TX power losses by coil current • ― TX coil current Besides, Resonance Shift FOD method is also supported by WCT1200, the system will detect the object by feedback signal during analog PING, and check if it is valid RX. If it is the FO, the system enters the fault state and avoids entering the power transfer state. MWCT1200DS, Rev. 1.0 28 Freescale Semiconductor 6 Application Information 6.1 On-board regulator The auxiliary power supply provides supply source for control, sensing, communication and driving circuits. In transmitter design, 3.3 V is required for WCT1200, ADC conditioning circuits, and communication demodulation circuits. And 5 V input voltage is supplied for inverter pre-driver circuit. LDO GS7108 is selected to generate 3.3 V power, this IC can provide 100 mA output current capacity to the load. At the same time, other type LDO can be used to meet the requirements, and the below parameters must be considered for the regulator selection. • Maximum input voltage: > 6 V • Maximum output current: > 100 mA • Output voltage accuracy: < 1% 6.2 Inverter and driver control V_bus PWM1 DC Input PWM2 Q1 a C1 PWM3 Q3 Q2 b PWM4 Q4 Figure 13 Schematic full-bridge inverter topology Figure 13 shows the schematic full-bridge inverter. The input voltage range of this application is from 4.5 to 5.5 volts, and the input current range is from 0 to 2 amps. LC resonant network is connected between the middle point (a) of bridge leg 1 and the middle point (b) of bridge leg 2. N-channel MOSFETs of Q1–Q4 are controlled by PWMs generated from WCT1200, and the operating frequency range of MOSFETs is 110 kHz to 205 kHz. To meet the system efficiency and power transfer requirements, these are some suggestions for the MOSFETs and driver IC selection. • Full-bridge inverter MOSFETs: >= 20 V, < 20 mΩ for power switching application MOSFET is recommended. The MOSFET is the critical component for the system efficiency, AON7400A from AOS is selected as the main power switch, and AON7400A is a 30 V, 40 A, < 10.5 mΩ ( • = 4.5 V), N-channel power MOSFET. Driver: the synchronous BUCK driver IC or bridge driver IC can meet the requirements for the full-bridge inverter. The driver IC should handle 8 V voltage input for some de-rating applications. The synchronous BUCK driver IC is recommended for this application because of good cost advantage, so NCP3420DR2G is selected on this design. This driver IC has the following features: MWCT1200DS, Rev. 1.0 Freescale Semiconductor 29 o Supporting low voltage power supply down to 4.6 V. o Very short propagation delay from input to output (less than 30 ns). o 2 channels PWM can be controlled by WCT1200 independently. o Safety Timer and Overlap protection circuit. 6.3 Primary coil and resonant capacitor The resonant network is shown in Figure 14, which is the basic LC series resonant network circuit. The section of “Power Transfer” in chapter of “Wireless Charging System Operation Principle” describes the basic operation process of LC resonant inverter. For the design principles of resonant components parameters, consider two points: • Set a fixed resonant frequency (WPC defines it as 100 kHz) • Configure a suitable Q (quality factor) value to output required power in specific operational range Meanwhile, all specifications define the specific resonant network parameters for available TX types. Like WPC A28 TX type, = 400 nF (for coils furthest from the shielding) or 357 nF (for coils closest to the shielding), = 6.4 uH (for coils furthest from the shielding) or 6.9 uH (for coils closest to the shielding), this resonant network parameters can meet the low power (5 W) wireless charger requirements under defined operational conditions. Figure 14 Schematic resonant network circuit and are connected in series, the resonant frequency of A28 resonant network can be obtained: fr = 1 1 = = 100kHz −6 2π L p Cr 2π 6.4 ×10 × 400 ×10−9 The electrical and mechanical features of the TX coils are defined in details in specifications. Figure 15 shows the mechanical features of A28 type coil, which are the two types out of the WCT1200 supporting WPC TX coils. • Number of turns per layer: N = 9 • Number of layer = 1 • Inductance: o Lp = 6.9 ± 10% uH for coils closest to the shielding MWCT1200DS, Rev. 1.0 30 Freescale Semiconductor o Lp = 6.4 ± 10% uH for coils furthest from the shielding • Wire: type 2 litz wire having 105 strands of No. 40 AWG (0.08 mm diameter) or equivalent Figure 15 Example of A28 3 coils specification Typically, the A28 coil has three coils. The inductance is different, so the system should change the resonant capacitor value for different coil to keep the resonant frequency to be about 100 kHz. In addition, different manufacturers provide the same type of coil, such as TDK, Sumida, E&E, and Mingstar. The system is also required to work well with these coils. For resonant capacitor, COG ceramic capacitor is selected to meet the critical system requirements, because the capacitance affects the resonant frequency of the resonant network, and 5% tolerance is allowed for the whole system operation. This capacitance with the A28 type coil can achieve 100 kHz resonant frequency. Two types of capacitors are recommended: • Murata: GRM31C5C1H104JA01L – 1206 – 50 V – 100 nF • TDK: C3225C0G1H104JT – 1210 – 50 V – 100 nF 6.4 Primary coil selection switches and charge pump circuits As the WCT1200 supports the multi-coil topology, the coil switches circuit is used to select the proper coil to activate. Figure 16 shows the system block diagram and the details of the selection switches circuit for the A28 type coil. To achieve the switch function, the VCC_SW should be about 8 – 15 V DC in the system. On the A28 reference design, the WCT1200 PUMP_PWM (20 kHz frequency & 50% duty cycle PWM) pin is used to drive the charge pump circuit to achieve the 2X input voltage source. MWCT1200DS, Rev. 1.0 Freescale Semiconductor 31 External touch PAD GPIO Touch Input Current RC Circuit for Coil Current WCT1101 Input Voltage PWM Temperature LC Resonant Circuit Drive Circuit Sampling Circuit Pump 5V=>10V Full Bridge Power Circuit Multi-Coil +3.3V Digital VinH +3.3V Analog Vin +5V Power Supply Management Circuit AO7600 2 3 R38 27 C35 CHARGE_PUMP_PWM 4700pF 7.5K C34 Q7 R44 2 Q5A NTS4001NT1G R39 2 27 2.2uF 1 4 AON7244 TP28 C75 4700PF COILS DNP TP29 DNP R55 2.7K 2,4,7 COIL1_EN R56 5.1K TP30 DNP 100K D7 UDZ15B AON7244 200mW 15V 1 2 3 3 1 R43 100K R93 1 2 3 AO7600 1 Q16 MMBT3904TT1G 2 2.0K C39 10UF 6 R40 R53 4700pF 10K 3 Q5B TP23 DNP 3 C40 A 1 5 2,7 4 C Q13 MMBTA92 2 3 R99 1K TP22 DNP 1 4 R37 2.0K COIL1 HB1A VCC_SW R126 27 BAT54SWT1G D5 Q15 5 Q14 VCC_SW VIN 5 WCT_MultiCoil R57 33K Figure 16 WCT-5WTXMULTI block diagram, charge pump and coil selection switches circuits Low Rds(on), 60 V Vds MOSFET is recommended for the A28 solution. 6.5 Low power control To achieve low power consumption, the driver and analog circuits power are shut down when the system is in standby mode or interval time between the PINGs. The DRV_EN_AUX_P signal is designed to achieve this target. Figure 17 is the typical application circuit to control VCCH on or off. MWCT1200DS, Rev. 1.0 32 Freescale Semiconductor 0 DNP VIN VCCH NTZS3151PT1G 6 5 2 1 4 3 47K DRV_EN_AUX_P 3 0 2200pF 1 2 NTS4001NT1G 100K Figure 17 Auxiliary Power Enable Circuit The power source of the full-bridge drivers and current sensor can be controlled by the above circuit. This circuit is still benefited from the Touch Sensor technology. When the TX goes to the standby mode, the WCT1200 enters deep sleep mode, and the power of the driver and analog circuits is shut down by the DRV_EN_AUX_P signal. If this feature is not used, leave this pin (DRIVER_EN) open. 6.6 GPIO touch sensing Figure 18 Basic Theory of Capacitive Touch Sensor Capacitive touch sensor is selected in this design, and three additional electrode touch pads are designed to sense the placement of mobile device. When the mobile device is put on the TX active charging area, GPIO Touch Sensing will detect the capacitance change on the pad, and then enter digital PING phase for device identification. Figure 18 shows the basic theory for this method, and TOUCH_PAD1, TOUCH_PAD2, TOUCH_PAD3 pins for this feature. Because of FOD function, these electrode touch pads should not be placed on the top of the TX coils, and 5 mm XY (horizontal) distance is required between the TX coil and the electrode touch pad. 6.7 ADC input channels To sense the necessary analog signals in the TX system, all ADC input channels are designed for these analog signals. This list describes the design details of these analog signals in the default setting. For the specific circuits, see the system example design schematics. • Input voltage: 154 kΩ and 20 kΩ resistors to divide the input voltage. • Input current: 15 mΩ current sensing resistor and 1:100 current sensor (CS30CL) are recommended. MWCT1200DS, Rev. 1.0 Freescale Semiconductor 33 • Temperature: 100 kΩ NTC (NCP15WL104E03RC) and 51 kΩ resistors are recommended to sense the temperature of board or coil (over-temperature protection point: 60°C @ 0.94 V ADC input, below this voltage the system will enter over-temperature fault state). • Coil current: 51 kΩ and 5.11 kΩ to divide the resonant capacitor voltage. The 5.1 kΩ pull-up resistor and 33 pF filter capacitor are recommended. 6.8 Faults handling/recovery WCT1200 supports several types of fault protections during the TX system operation, including FOD fault, TX system fault, and RX device fault. According to the fault severity, the faults are divided into several rates: fatal fault, immediate retry fault, and retry fault after several minutes. The fault thresholds and time limits are described in the WCT Runtime Debug User’s Guide. Table 10 lists all the available fault types and their corresponding fault handlings. Table 10 System faults handling Types Name Handling Recovery wait time Conditions Description FOD Fault FOD fault TX system shuts off after fault lasts 1 second Wait 5 minutes or RX removed 1, Power loss base threshold 2, Power loss indication to power cessation 3, Power loss fault retry times Foreign object is detected and lasts for the defined time. The system shuts off, and waits for recovery time or RX removed to enable power transfer. The time limit can be configured by user. TX System Fault Hardware fault (ADC, Chip) TX system shuts off immediately No retry any more - Once hardware fault happens, the TX system shuts off forever. EEPROM corruption fault TX system shuts off immediately No retry any more - The WCT1200 checks data validity of EEPROM after power on, stop running forever if EEPROM is corrupted. Input over-voltage TX system shuts off immediately No retry any more Safety input threshold When input voltage exceeds the threshold, the TX system shuts off forever. Input over-power TX system shuts off immediately Wait for 5 minutes or RX removed Input power threshold When input power exceeds the threshold, the TX system shuts off immediately and waits for recovery time to enable power transfer. Coil over-current TX system shuts off immediately Retry immediately Coil current threshold When coil current exceeds the threshold, the TX system shuts off immediately and tries PING again. MWCT1200DS, Rev. 1.0 34 Freescale Semiconductor TX over-temperature TX system shuts off immediately Wait for 5 minutes or RX removed Temperature threshold When the temperature on the board or the coil exceeds the threshold during power transfer, the TX system shuts off immediately and waits for recovery time or RX removed to enable power transfer. Analog PING fault TX system shuts off immediately No retry any more - When coil current in analog PING exceeds the threshold, the TX system shuts off forever. Received Power packet timeout TX system shuts off immediately Wait for 5 minutes or RX removed - When Received Power packet timeout, the TX system shuts off immediately and waits for recovery time to enable power transfer. Select fault coil TX system shuts off immediately Wait for 5 minutes or RX removed - When fault coil selected, the TX system shuts off immediately and waits for recovery time to enable power transfer. RX internal fault (EPT-02) TX system shuts off immediately No retry any more - The TX system shuts off forever if End Power packet is received and End Power code is internal fault. RX over-temperature (EPT-03) TX system shuts off immediately Wait for 5 minutes or RX removed - The TX system shuts off and waits for recovery time to enable power transfer if End Power packet is received and End Power code is over temperature. RX over-voltage (EPT-04) TX system shuts off immediately Wait for 5 minutes or RX removed - The TX system shuts off and tries PING again if End Power packet is received and End Power code is over voltage. RX over-current (EPT-05) TX system shuts off immediately Retry immediately - The TX system shuts off and tries PING again if End Power packet is received and End Power code is over current. RX battery failure (EPT-06) TX system shuts off immediately No retry any more - The TX system shuts off forever if End Power packet is received and End Power code is battery failure. No response (EPT-08) TX system shuts off immediately Retry immediately - The TX system shuts off and tries PING again if End Power packet is received and End Power code is no response. RX Device Fault MWCT1200DS, Rev. 1.0 Freescale Semiconductor 35 6.9 LEDs function Two pins (user can re-configure them to different configuration ports) on WCT1200 are used to drive LEDs for different system status indication in this design, such as charging, standby and fault status, etc. The LEDs can work on different functions using software configuration. WCT1200 controls the LEDs on/off and blink according to the parameters configuration under different system status. For how to configure LED functions by the FreeMASTER GUI tool, see the WCT Runtime Debug User’s Guide (WCT1XXXRTDUG). The suggested LED functions are listed in Table 11 for different system status indication. Table 11 System LED modes LED configuration option Description Default Default choice Choice 1 Option 1 Option 2 Option 3 6.10 Choice 2 Choice 3 LED # LED operation state Standby Charging Charge complete Power limit FOD fault TX fault RX fault LED 1 Off Blink slow Off Blink fast On On On LED 2 Blink slow On On Blink fast Off Off Off LED 1 Off Blink slow On Off Off Off Off LED 2 Off Off Off Blink fast Blink fast Blink fast Blink fast LED 1 Off On Off Blink fast Off Off Off LED 2 Off Off Off Blink fast On Blink slow Blink slow LED 1 Off Blink slow On Blink fast Blink fast Blink fast Blink fast LED 2 - - - - - - - Configurable pins The WCT1200 supports pin multiplexer, which means that one pin can be configured to different functions. If the default on-chip functions are not used in your applications, such as Touch Sensing ports, and ultra low power control, these pins can be configured for other functions. Table 12 lists the pin multiplexer for WCT1200 configurable pins. Table 12 Configurable pins multiplexer Pin No. Default Function Alternative Function 3 COIL1_EN GPIO 4 COIL2_EN GPIO 5 LED1 GPIO 15 GPIO - 16 UART_RX GPIO 17 UART_TX GPIO MWCT1200DS, Rev. 1.0 36 Freescale Semiconductor 18 TOUCH_PAD1 GPIO 19 LED2 SCL 20 TOUCH_PAD2 SDA 23 TOUCH_PAD3 GPIO 24 COIL0_EN GPIO 25 PUMP_PWM GPIO 26 DRIVER_EN GPIO 6.11 Unused pins All unused pins can be left open unless otherwise indicated. For better system EMC performance, it is recommended that all unused pins are tied to system digital ground and flooded with copper to improve ground shielding. 6.12 Power-on reset WCT1200 can handle the whole system power on sequence with integrated POR mechanism, so no more action and hardware is needed for the whole system powered on. 6.13 External reset WCT1200 can be reset when the pin is pull down to logic low (digital ground). A 4.7 kΩ pull-up resistor to 3.3 V digital power and a 0.1uF filter capacitor to digital ground are recommended for the reliable operation. This pin is used for the JTAG debug and programming purpose in this design. 6.14 Programming & Debug interface One JTAG and one UART communication ports are designed for the communication with the PC. JTAG is used for the system debug, calibration, and programming. And UART is used for the communication with the PC to display the system information, such as input voltage, input current, coil current, and operating frequency. For the hardware design, see the system example design schematics. 6.15 Software module The software in WCT1200 is matured and tested for production ready. Freescale provides a Wireless Charging Transmitter (WCT) software library for speeding user designs. In this library, low level drivers of HAL (Hardware Abstract Layer), callback functions for library access are open to user. About the software API and library details, see the WCT1200 TX Library User Guide. MWCT1200DS, Rev. 1.0 Freescale Semiconductor 37 6.15.1 Memory map The WCT1200 has 32 Kbytes on-chip Flash memory and 6 Kbytes program/data RAM. Besides for wireless transmitter library code, the user can develop private functions and link it to library through predefined APIs. Table 13 WCT1200 memory footprint (CodeWarrior V10.6, Code Size Optimization Level 4) Memory Total size Example code size FreeMASTER size Library size Free size Flash 32 Kbytes 31.8 Kbytes 19 Kbytes 3.5 Kbytes 0.2 Kbytes RAM 6 Kbytes 5.5 Kbytes 4.3 Kbytes 0.1 Kbytes 0.5 Kbytes 6.15.2 Software library The WCT software library provides the complete wireless charging function which is compliant with the latest version WPC “Qi” specifications. This library includes the “Qi” communication protocol, power transfer control program, FOD algorithm using power loss method, system status indication module, and fault protection module. Figure 19 shows the complete software structure of this library. A data structure in the software library can be accessed by user code, which contains runtime data like input current, input voltage, coil current, PWM frequency and duty cycle. For the details of how to use this library, the API definitions, and the data structure, see the WCT1200 TX Library User Guide. Besides, a FreeMASTER calibration module is integrated into this library, which enables the end product customization and FOD calibration through the SCI port. User Layer • Parameter Calibration & Configuration • Customer Code User Layer FreeMASTER Open Application Level APP Layer Power Control Monitor & Protection& Diagnostic Object Detection Low Power Mode FreeMASTER API API FOD “Qi” Communication LED & Buzzer Touch Sensor Inverter Control Coil Selection PID Control Middle Layer LIB WCT1xxx Silicon Level Library Open UART JTAG PWM GPIO IIC PIT Timer Flash ADC DMA Processor Layer Figure 19 Software Structure of WCT Library 6.15.3 API description Through WCT library APIs, the user can easily get the typical signals on TX system, such as the input voltage, input current, coil current, and PWM frequency. The user can conveniently know WCT1200 MWCT1200DS, Rev. 1.0 38 Freescale Semiconductor operational status by watching variables through the FreeMASTER GUI tool. For more information about API definitions, see WCT1200 TX Library User Guide. 6.16 Example design schematics Please go to freescale website freescale.com and search “WCT1200” to find the schematic details and the A28 user guide. 6.17 Guideline to other solutions configuration WCT1200 supports any free positioning multiple coils power transmitter solutions by using frequency and duty cycle control. Based on the example design schematics of Freescale wireless transmitter system with A28 configuration, you can easily develop other solutions according to the following guidelines from both hardware and software perspectives. • For higher input voltage solutions (Such as A6, A14, A19, A21) 1. Replace LDO (U1) with BUCK converter for 3.3V voltage generation from the input voltage. 2. Change the full bridge power stage to half bridge power stage if half bridge topology is used. 3. Use corresponding primary coils and resonant capacitor. 4. Use new coil current calibration formula in the software. Adjust the coil current sensing circuits to make the “AC_COIL_CURRET” signal in the range of 0 V DC – 3.3 V DC, and change the mapping parameters in the software. • For same input voltage solutions Replace the corresponding primary coils and resonant capacitor only. MWCT1200DS, Rev. 1.0 Freescale Semiconductor 39 7 Design Considerations 7.1 Electrical design considerations Use the following list of considerations to assure correct operation of the device and system: • The minimum bypass requirement is to place 0.01 – 0.1 μF capacitors positioned as near as possible to the package supply pins. The recommended bypass configuration is to place one bypass capacitor on each of the VDD/VSS pairs, including VDDA/VSSA. Ceramic and tantalum capacitors tend to provide better tolerances. • Bypass the VDD and VSS with approximately 10 μF, plus the number of 0.1 μF ceramic capacitors. • Consider all device loads as well as parasitic capacitance due to PCB traces when calculating capacitance. This is especially critical in systems with higher capacitive loads that could create higher transient currents in the VDD and VSS circuits. • Take special care to minimize noise levels on the VDDA, and VSSA pins. • Using separate power planes for VDD and VDDA and separate ground planes for VSS and VSSA are recommended. Connect the separate analog and digital power and ground planes as near as possible to power supply outputs. If an analog circuit and digital circuit are powered by the same power supply, you should connect a small inductor or ferrite bead in serial with VDDA traces. • If desired, connect an external RC circuit to the RESET pin. The resistor value should be in the range of 4.7 kΩ – 10 kΩ; and the capacitor value should be in the range of 0.1 μF – 4.7 μF. • Add a 2.2 kΩ external pull-up on the TMS pin of the JTAG port to keep device in a restate during normal operation if JTAG converter is not present. • During reset and after reset but before I/O initialization, all I/O pins are at input mode with internal weak pull-up. • To eliminate PCB trace impedance effect, each ADC input should have a no less than 33 pF/10 Ω RC filter. • Need some optional circuits for the power saving function, those circuit can be removed when the design is not sensitive for this requirements, so the touch sensor IC and AUXP_CTRL can be removed. • The system with A28 coil can pass the EMI test with the qualified adaptor and without additional filter. The margin should be more than 6 dB, and the following design items should be considered: o The full bridge MOSFET driver resistor can be adjusted. For AOS7400A, the driver resistor is 27 Ω. MWCT1200DS, Rev. 1.0 40 Freescale Semiconductor o The MOSFET Snubber circuit should be added to decrease the spike on the MOSFET during switching. At present, the Snubber circuit is a 4700 pF ceramic capacitor. This circuit is shown on the example schematic. o A parallel 4.7 nF 50 V capacitor for the each coil is recommended to add, which will solve the additional unexpected resonance (disabled coil and some parasitical capacitors on the coil switch MOSFET) effect for the CE testing. 7.2 PCB layout considerations • Provide a low-impedance path from the board power supply to each VDD pin on the device and from the board ground to each VSS pin. • Ensure that capacitor leads and associated printed circuit traces that connect to the chip VDD and VSS pins are as short as possible. • PCB trace lengths should be minimal for high-frequency signals. • Physically separate analog components from noisy digital components by ground planes. Do not place an analog trace in parallel with digital traces. Place an analog ground trace around an analog signal trace to isolate it from digital traces. • The decoupling capacitors of 0.1 μF must be placed on the VDD pins as close as possible, and place those ceramic capacitors on the same PCB layer with the WCT1200 device. VIA is not recommend between the VDD pins and decoupling capacitors. • The WCT1200 bottom EP pad should be soldered to the ground plane, which will make the system more stable, and VIA matrix method can be used to connect this pad to the ground plane. • As the wireless charging system functions as a switching-mode power supply, the power components layout is very important for the whole system power transfer efficiency and EMI performance. The power routing loop should be small and short as can as possible, especially for the resonant network, the traces of this circuit should be short and wide, and the current loop should be optimized smaller for the MOSFETs, resonant capacitor and primary coil. Another important thing is that the control circuit and power circuit should be separated. 7.3 Thermal design considerations WCT1200 power consumption is not so critical, so there is not additional part needed for power dissipation. But the full-bridge inverter needs the additional PCB Cu copper to dissipate the heat, so good thermal package MOSFET is recommended to select, such as DFN package, and for the resonant capacitor, COG material, and 1206 or 1210 package are recommended to meet the thermal requirement. The transmitter system internal power loss is about 0.4 W with full 5 W loads, and the worst case is on the inverter, so the user should make some special action to dissipate those heat. Figure 20 shows one thermal strategy for the inverter. MWCT1200DS, Rev. 1.0 Freescale Semiconductor 41 Cu copper for heat dissipation of the inverter MOSFET Cu copper for heat dissipation of resonant capacitors Figure 20 Thermal Design Strategy for Inverter MWCT1200DS, Rev. 1.0 42 Freescale Semiconductor 8 References and Links 8.1 References • WCT1200 A28 Reference Design System User Guide (WCT1200SYSUG) • WCT1200 TX Library User Guide (WCT1200LIBUG) • WCT Runtime Debug User Guide (WCT1XXXRTDUG) • WCT1200 A28 Reference Design Calibration User Guide (WCT1200CALUG) • WPC Low Power Wireless Transfer System Description, Part 1: Interface Definition 8.2 Useful Links • freescale.com • freescale.com\wirelesscharging • www.wirelesspowerconsortium.com • www.powermatters.org MWCT1200DS, Rev. 1.0 Freescale Semiconductor 43 How to Reach Us: Home Page: freescale.com Web Support: freescale.com/support Information in this document is provided solely to enable system and software implementers to use Freescale products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits based on the information in this document. Freescale reserves the right to make changes without further notice to any products herein. Freescale makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters that may be provided in Freescale data sheets and/or specifications can and do vary in different applications, and actual performance may vary over time. All operating parameters, including “typicals,” must be validated for each customer application by customer’s technical experts. Freescale does not convey any license under its patent rights nor the rights of others. Freescale sells products pursuant to standard terms and conditions of sale, which can be found at the following address: freescale.com/SalesTermsandConditions. Freescale and the Freescale logo are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. All other product or service names are the property of their respective owners. ©2014 Freescale Semiconductor, Inc. Document Number: MWCT1200 Rev. 1.0 01/2015