Features • • • • Gain Control in 20-dB Steps Very Low I/Q Amplitude and Phase Errors High Input P1dB Small and Optimized Package for High Reliability and Performance Applications • Infrastructure Digital Communication Systems • GSM/Cellular Transceivers • ISM Band Transceivers Benefits • Fully Integrated Device with Reduced External Component Count 65 - 300 MHz SiGe IF Receiver/ Demodulator ATR0797 Electrostatic sensitive device. Observe precautions for handling. Description The ATR0797 is a multi-purpose demodulator RFIC. The silicon monolithic integrated circuit is designed with Atmel’s advanced SiGe technology. This demodulator is capable of both quadrature demodulation or direct IF output. Features include switchable gain control on a frequency range from 65 MHz to 300 MHz. The device performs a very low amplitude as well as phase error and allows high input P1dB. The ATR0797 targets a variety of system applications for communications including 3G wireless. Figure 1. Block Diagram GC1 GC2 5 4 2 1 8 ϕ 9 16 15 BBQP BBQN 13 12 LOP LON IFP IFN BBIP BBIN Rev. 4665D–SIGE–08/04 Pin Configuration Figure 2. Pinning BBIN BBIP VCC GC2 GC1 GND VCC IFP 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 BBQP BBQN VCC LOP LON GND VCC IFN Pin Description 2 Pin Symbol Function 1 BBIN 2 BBIP Baseband I-axis positive output, self biasing 3 VCC 5 V power supply 4 GC2 Gain control input, stage 2, 5 V CMOS levels 5 GC1 Gain control input, stage 1, 5 V CMOS levels 6 GND Ground 7 VCC 5 V power supply 8 IFP IF positive input, self biasing, AC-coupled 9 IFN IF negative input, self biasing, AC-coupled Baseband I-axis negative output, self biasing 10 VCC 5 V power supply 11 GND Ground 12 LON Local oscillator, negative input, self biasing, AC-coupled 13 LOP Local oscillator, positive input, self biasing, AC-coupled 14 VCC 5 V power supply 15 BBQN Baseband Q-axis negative output, self biasing 16 BBQP Baseband Q-axis positive output, self biasing ATR0797 4665D–SIGE–08/04 ATR0797 Product Description Atmel’s ATR0797 is a variable gain I-Q demodulator designed for use in receiver IF sections, that are typically existing in superheterodyne RF architectures. The ATR0797 has two gain stages that are independent of each other. These gain stages are broadband differential amplifiers each with a digital control pin to set the gain. Since the amplifiers have approximately the same gain, setting GC1 high and GC2 low results in approximately the same gain as setting GC1 low and GC2 high. Former setting offers better noise figures. The IF input is a differential input that has internal bias circuitry to set the common mode voltage. The use of blocking capacitors to facilitate AC coupling is highly recommended to avoid changing the common mode voltage. Either input may be driven single ended if the other input is connected to ground through an AC short such as a 1000 pF capacitor. This typically results in slightly lower input P1dB. The two matched mixers are configured with the quadrature LO generator to provide inphase and quadrature baseband outputs. The LO and IF ports offer a differential 50 Ω impedance. The passives at these ports (parallel L-R network) and the package itself adds inductance that tends to degrade return loss. The ATR0797 features immunity from changes in LO power. The gain features change by less than 0.6 dB over a 6 dB range of LO power. Also note the excellent I/Q balance, which typically falls within 0.1 dB and 1 degree from 65 MHz to 300 MHz, and varies less than 0.05 dB and 0.5 degree over temperature (-40°C to +85°C). The frequency response of the IF and LO ports is dominated by the L-R network on the input. When de-embedded, the gain and P1dB response is within 0.5 dB from 65 MHz to 300 MHz. The figures in the datasheet illustrate a typical ATR0797’s performance with respect to temperature. Note that these numbers include the effect of the R-L network in the IF port. Evaluation board design and equipment constraints: Please take into account that the evaluation board uses baluns on the I/Q outputs, and these baluns limit the low frequency response of the device. For true baseband operation, the baluns should be removed, and the differential signals used directly. The 27 pF capacitor on the evaluation board is appropriate for lower frequencies. 3 4665D–SIGE–08/04 Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. All voltages are referred to GND. Parameters Supply voltage Symbol Value Unit VCC 5.5 V LO input LOP, LON 10 dBm IF input IFN, IFP 10 V Operating temperature TOP -40 to +85 °C Storage temperature Tstg -65 to +150 °C Symbol Value Unit RthJA 35 K/W Note: The device may not survive all maximums applied simultaneously. Thermal Resistance Parameters Junction ambient Electrical Characteristics Test conditions: VCC = 5 V, Tamb = 25°C, LO input: 0 dBm at 200 MHz IF input: at 200.1 MHz, GC1 = 0, GC2 = 0; 0 dBm IF input: at 200.1 MHz, GC1 = 1, GC2 = 0; -20 dBm IF input: at 200.1 MHz, GC1 = 1, GC2 = 1; -40 dBm No. 1 Test Conditions Pin Symbol Min. Typ. Max. Unit Type(1) 8-9 f 65 120 220 300 MHz B D IF Input (I/Q Mixing to Baseband) 1.1 Frequency range 1.2 IF input return loss 50 Ω nominal differential input(2) 8-9 RL 20 dB 1.3 IF input common mode voltage Internally generated 8, 9 VCH 2 V 1.4 Gain 2-1, 16-15 G 32 35 1.5 Input P1dB 1, 2, 15, 16 P1dB -29 1.6 DSB Noise figure 2-1, 16-15 NF 1.7 Gain 2-1, 16-15 G 12 15 1.8 Input P1dB 1, 2, 15, 16 P1dB -8 1.9 DSB Noise figure 2-1, 16-15 NF Notes: 4 Parameters Gain set = high; GC1 = GC2 = 1 Gain set = medium; GC1 = 1; GC2 = 0 or GC1 = 0; GC2 = 1 38 dB A -27 dBm C 11 dB D dB A -6 dBm C 14.5 dB D 17 1. Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter 2. The parasitic inductance of the package, the board, and L5, L6 must be matched out at the center frequency with a series capacitor to achieve 20 dB of port match. 3. The parasitic inductance of the package must be matched out to reach 20 dB port match above 100 MHz. ATR0797 4665D–SIGE–08/04 ATR0797 Electrical Characteristics (Continued) Test conditions: VCC = 5 V, Tamb = 25°C, LO input: 0 dBm at 200 MHz IF input: at 200.1 MHz, GC1 = 0, GC2 = 0; 0 dBm IF input: at 200.1 MHz, GC1 = 1, GC2 = 0; -20 dBm IF input: at 200.1 MHz, GC1 = 1, GC2 = 1; -40 dBm No. Parameters 1.10 Gain 1.11 Input P1dB 1.12 DSB Noise figure 2 Test Conditions Gain set = low; GC1 = GC2 = 0 Pin Symbol Min. Typ. Max. Unit Type(1) 2-1, 16-15 G -7 -4 -2 dB A 1, 2, 15, 16 P1dB 12 14 dBm C 2-1, 16-15 NF 31 dB D I/Q Output 2.1 I/Q output frequency range 1, 2, 15, 16 2.2 I/Q output amplitude error 2.3 fI/Q DC 500 MHz D 2-1, 16-15 -0.2 +0.2 dB A I/Q phase error 2-1, 16-15 -2 +2 deg A 2.4 I/Q output common mode voltage 1, 2, 15, 16 V A 2.5 I/Q output differential offset voltage 2-1, 16-15 Voffset mV A 2.6 I/Q output return loss 1, 2, 15, 16 RLI/Q dB D dBm D dB D 300 MHz D 5.25 V A mA A 3 50 Ω nominal differential output(3) 2.5 -100 +100 20 LO input -3 3.1 LO input level 13-12 PLO 3.2 Return loss 13-12 RLLO 3.3 LO frequency range 13-12 RLLO 65 4.75 0 +3 20 4 Miscellaneous 4.1 Supply voltage 3, 7, 10, 14 VCC 4.2 Supply current 3, 7, 10, 14 ICC 4.3 GC1, GC2 logic level low 4, 5 VIL 0 0.3 × VCC V D 4.4 GC1, GC2 logic level high 4, 5 VIH 0.7 × VCC VCC V D 4.5 GC1, GC2 input impedance 4, 5 Z 40 kΩ D Notes: 5 195 1. Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter 2. The parasitic inductance of the package, the board, and L5, L6 must be matched out at the center frequency with a series capacitor to achieve 20 dB of port match. 3. The parasitic inductance of the package must be matched out to reach 20 dB port match above 100 MHz. 5 4665D–SIGE–08/04 Figure 3. Gain versus Temperature 35 High Gain 30 Gain (dB) 25 20 15 Med Gain 10 5 0 -5 Low Gain -10 -40 -20 0 20 40 60 80 100 80 100 Temperature (°C) Figure 4. Noise Figure versus Temperature 35 Low Gain Noise Figure (dB) 30 25 20 Med Gain 15 10 High Gain 5 0 -40 -20 0 20 40 60 Temperature (°C) Figure 5. Amplitude Difference versus LO Frequency Amplitude Difference (dB) 0.4 0.3 0.2 0.1 0.0 -0.1 -0.2 -0.3 -0.4 0 100 200 300 400 500 600 700 800 LO Frequency (MHz) 6 ATR0797 4665D–SIGE–08/04 ATR0797 Figure 6. Output P1dB versus Temperature Output P1dB (dBm) 10 9 Low Gain 8 7 High Gain 6 Med Gain 5 -40 -20 0 20 40 60 80 100 Temperature (°C) Figure 7. Output P1dB versus LO Power Output P1dB (dBm) 10 9 Low Gain 8 7 High Gain 6 Med Gain 5 -4 -3 -2 -1 0 1 2 3 4 600 700 800 Temperature (°C) Figure 8. Phase Difference versus LO Frequency Phase Difference (degrees) 92.0 91.5 91.0 90.5 90.0 89.5 89.0 0 100 200 300 400 500 LO Frequency (MHz) 7 4665D–SIGE–08/04 Figure 9. Demo Test Board Schematic J2 L2 R5 R4 J3 L3 BBIN BBQP C8 C9 C5 C3 C7 C10 C6 L1 R3 R6 L4 BBIP VCC VCC R7 1 2 3 4 5 6 7 8 VCC R8 C12 GC2 GC1 VCC C15 5V J4 BBQN D1 VCC R9 ATR0797 J1 C4 L5 16 15 14 13 12 11 10 9 VCC J5 C11 LOin C14 T3 VCC L6 C18 C17 C13 C16 R10 L7 T4 C19 H2 IFin J6 Table 1. Bill of Materials Component Reference Vendor Part Number IF Demodulator D1 Atmel ATR0797 SMA end launch connector J1, J2, J3, J4, J5, J6 Johnson Components™ 742-0711-841 T3, T4 Mini-Circuits® TC1-1 Transformer Supply bypass capacitor Resistor Capacitor Inductor Capacitor Resistor Capacitor Value Size/Package PSSO16 C19 1 µF 1206 R7, R8 1 kΩ 0402 22 pF 0402 1 µH 1210 C13, C14, C17, C18 68 pF 0402 R3, R4, R5, R6 0Ω 0402 C3, C4, C5, C6, C7, C8, C9, C10 820 pF 0402 C11, C12, C16 L1, L2, L3, L4, L7 ® Würth Elektronik 74476401 Resistor R9, R10 51 Ω 0402 Inductor L5, L6 10 nH 0402 C15 100 pF 0402 Capacitor 8 ATR0797 4665D–SIGE–08/04 ATR0797 Figure 10. Demo Test Board (Fully Assembled PCB) Figure 11. Recommended Package Footprint 1.25 3.0 0.25 0.74 0.4 0.74 3.0 φ0.33 via 0.7 0.9 6.9 all units are in mm - Indicates metalization - vias connect pad to underlying ground plane Remark: Heatslug must be soldered to GND. In order to avoid soldering problems, plugging of the vias under the heatslug is recommended. Only ground signal traces are allowed directly under the package. 9 4665D–SIGE–08/04 Ordering Information Extended Type Number Package Remarks ATR0797-6CPH PSSO16 Lead free Package Information 10 ATR0797 4665D–SIGE–08/04 Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Regional Headquarters Europe Atmel Sarl Route des Arsenaux 41 Case Postale 80 CH-1705 Fribourg Switzerland Tel: (41) 26-426-5555 Fax: (41) 26-426-5500 Asia Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong Tel: (852) 2721-9778 Fax: (852) 2722-1369 Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan Tel: (81) 3-3523-3551 Fax: (81) 3-3523-7581 Atmel Operations Memory 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 RF/Automotive Theresienstrasse 2 Postfach 3535 74025 Heilbronn, Germany Tel: (49) 71-31-67-0 Fax: (49) 71-31-67-2340 Microcontrollers 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 La Chantrerie BP 70602 44306 Nantes Cedex 3, France Tel: (33) 2-40-18-18-18 Fax: (33) 2-40-18-19-60 ASIC/ASSP/Smart Cards 1150 East Cheyenne Mtn. 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The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein. No licenses to patents or other intellectual property of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use as critical components in life support devices or systems. © Atmel Corporation 2004. All rights reserved. Atmel ® and combinations thereof are the registered trademarks of Atmel Corporation or its subsidiaries. Johnson Components™ is a trademark of Emerson Electric Co., Mini-Circuits ® is a registered trademark of Scientific Components, Würth Elektronik ® is a registered trademark of Adolf Würth GmbH & Co. KG,. Other terms and product names may be the trademarks of others. Printed on recycled paper. 4665D–SIGE–08/04