AN55662 Migrating from STK14C88-3 to CY14B256LA.pdf

AN55662
Migrating from STK14C88-3 to CY14B256LA
Author: Ravi Prakash
Associated Project: No
Associated Part Family: STK14C88-3, CY14B256LA
Software Version: N/A
Related Application Notes: None
AN55662 provides details for migrating from the STK14C88-3 nvSRAM part to CY14B256LA part in applications. This
application note also lists the parameter differences between the parts and the design considerations for migration when
converting applications to CY14B256LA.
Introduction
Feature Set
Cypress CY14B256LA is a 3 V, 256 Kbit (32 K x 8) nvSRAM
in 0.13 micron technology. This part with a few performance
enhancements is functionally equivalent to STK14C88-3 in
0.8 micron technology but with a few differences in
parameters. This application note highlights the differences
between the STK14C88-3 and the CY14B256LA and the
parameters of significance that must be considered while
migrating.
Overview
The following tables compare the features and parameters
of the two parts. As shown in Table 1, the 256 Kbit nvSRAM
is available in x8 configuration.
Table 1. Part Number Description
Description
Original
Part Number
Replacement
Part Number
32 K x 8
STK14C88-3
CY14B256LA
Speed
STORE Cycles
Data Retention
STK14C88-3
35 ns
45 ns
1,000,000
100 years at 55 °C
CY14B256LA
25 ns
45 ns
1,000,000
20 years at 85 °C
Operating Temperature Range
While STK14C88-3 is available in both commercial and
industrial temperature ranges, CY14B256LA is offered only
in the industrial temperature range.
Table 3. Operating Temperature Range Comparison
Operating
Temperature Range
Commercial
(0 to 70 °C)
Industrial
(–40 to 85 °C)
STK14C88-3
CY14B256LA
Available
Not Available
Available
Available
Feature Set
Packages
Both the parts share the same overall feature set and are
available in the operation speed bins give in Table 2.
CY14B256LA is pin compatible with STK14C88-3 and is
available in the packages and pin configurations as follows.
Table 2. Feature Set Comparison
Table 4. Packages Comparison
Feature Set
AutoStore
Software STORE
Hardware STORE
Software RECALL
AutoStore Inhibit
AutoStore
Enable/Disable
Preventing STORE
on the fly
www.cypress.com
STK14C88-3
Available
Available
Available
Available
Available
CY14B256LA
Available
Available
Available
Available
Not Available
Not Available
Available
Available
Not Available
Package
STK14C88-3
CY14B256LA
32-pin SOIC
Available
Available
32-pin PDIP
Available
Not Available
48-pin SSOP
Not Available
Available
44-pin TSOPII
Not Available
Available
Document No. 001-55662 Rev. *E
1
Migrating from STK14C88-3 to CY14B256LA
Parameters
The CY14B256LA is a pin compatible replacement for STK14C88-3 and requires minimum changes in the application board in
most applications. However, the differences in parameters should be considered before replacing one part with the other.
Table 5 lists the differences in parameters between STK14C88-3 and CY14B256LA.
Table 5. Parameter Comparison
Parameter
Description
Speed
STK14C88-3
CY14B256LA
Min
Max
Min
Max
-
3.0
3.6
2.7
3.6
25 ns
-
-
-
70
35 ns
-
52
-
-
45 ns
-
44
-
52
-
3
-
10
Unit
DC Parameters
VCC
Power Supply
ICC1
Average VCC Current
ICC2
Average VCC Current during STORE
-
ICC3
Average VCC Current at
tRC = 200 ns, VCC typ, 25 °C
-
ICC4
Average VCAP Current during AutoStore
Cycle
-
-
2
ISB1
Average VCC Standby Current (Standby,
Cycling Input)
35 ns
-
19
45 ns
-
17
ISB
VCC Standby Current
-
-
1
VIH
Input High Voltage
-
2.2
9 (typ)
5
Not specified
-
VOH
Output HIGH Voltage
-
-
VOL
Output LOW Voltage
-
-
0.4
(IOUT = 8 mA)
VCAP
Storage Capacitor
-
mA
mA
5
2
2.4
(IOUT = -4 mA)
mA
mA
35 (typ)
-
V
mA
V
-
2.4
(IOUT = -2 mA)
V
-
0.4
(IOUT = 4 mA)
V
54 to 264
61 to 180
µF
AC Switching Parameters
tOHA
Output Hold After Address Change
-
5
-
3
-
ns
tLZCE
Chip Enable to Output Active
-
5
-
3
-
ns
tLZWE
Output Active After End of Write
-
5
-
3
-
ns
AutoStore / Power-Up RECALL Parameters
tHRECALL
Power-Up RECALL Duration
-
-
0.55
-
20
ms
tSTORE
STORE Cycle Duration
-
-
10
-
8
ms
tVSBL
Low Voltage Trigger (VSWITCH) to
-
-
300
-
25
ns
tRESET
Low Voltage Reset Level
-
-
2.4
tSWITCH
Low Voltage Trigger Level
-
2.7
2.95
tDELAY
Time Allowed to Complete SRAM Cycle
-
1,000
low
Not Applicable
V
-
2.65
V
-
25
ns
1.9
V
VHDIS
Output Disable Voltage
-
Not specified
-
tLZHSB
To Output Active Time
-
Not specified
-
5
µs
tHHHD
High Active Time
-
Not specified
-
500
ns
Software Controlled STORE/RECALL Cycle Parameters
tHA
Address Hold Time
-
20
0
ns
tRECALL
RECALL Duration
-
-
20
-
200
µs
Hardware STORE Cycle Parameters
tHLBL
LOW to STORE Busy
-
-
300
-
25 (tDELAY)
ns
tDHSB
To Output Active Time
-
-
700
-
25
ns
www.cypress.com
Document No. 001-55662 Rev. *E
2
Migrating from STK14C88-3 to CY14B256LA
Critical Considerations
The impact of the differences in CY14B256LA with respect
to the STK14C88-3 in existing applications are discussed in
this section. System designers are recommended to review
the detailed datasheets when migrating to the new part.
DC Parameters
The power supply design in most applications with
STK14C88-3 would require no changes when replacing the
nvSRAM with the CY14B256LA in spite of the higher values
in the operating / higher standby current. The critical
parameters to consider are the VCAP and the VSWITCH.
VCAP
While most of the differences do not impact the application,
the difference in VCAP is a critical consideration while
converting from the older rev parts. VCAP is the capacitor,
that provides the required charge for AutoStore to complete
NV store of the SRAM data during power down. The
required capacitor range is different for the two parts.
Table 6. VCAP Comparison
Description
STK14C88-3
CY14B256LA
VCAP
54 µF to 264 µF
61 µF to 180 µF
Therefore, in any existing application which uses a capacitor
value outside the overlapping range (61 µF to 180 µF) the
impact of capacitor dimensions needs to be considered
while changing to the new capacitor.
be in tristate as long as the
controller.
is held LOW by the
AC Switching Parameters
There are a few minor differences in switching parameters
between the CY14B256LA and the STK14C88-3, as listed in
the Table 5. However, these differences do not impact most
applications. For replacing 35 ns speed parts, choose the
25 ns speed parts as replacement (since 35 ns speed grade
is not available in the CY14B256LA).
AutoStore/Power-Up RECALL Parameters
tHRECALL
The power-up RECALL is much different in the
CY14B256LA compared to the STK14C88-3 because of
architecture differences.
Table 8. tHRECALL Comparison
Description
STK14C88-3
CY14B256LA
tHRECALL
550 µs
20 ms
This difference is not likely to affect applications since the
initialization of the controller on the board happens at the
same time. However, this should be taken into consideration
when replacing the STK14C88-3 with CY14B256LA.
Software Controlled STORE/RECALL Cycle
Parameters
Note The capacitor range is the absolute value of the
capacitor, net of tolerence.
The Software cycle parameter tRECALL is different in
CY14B256LA as described in the following section.
VSWITCH
tRECALL
The STK14C88-3 operates from 3 V while
the
CY14B256LA operates from 2.7 V. Hence the VSWITCH levels
are different.
Software RECALL time (tRECALL) is higher in CY14B256LA.
Table 7. VCC, VSWITCH Comparison
Description
STK14C88-3
CY14B256LA
VCC
3.0 V to 3.6 V
2.7 V to 3.6 V
VSWITCH
2.7 V to 2.95 V
<2.65 V
Table 9. tRECALL Comparison
Description
STK14C88-3
CY14B256LA
tRECALL
20 µs
200 µs
This difference could require firmware change in the existing
application to increase the controller wait state when
software RECALL is initiated.
The difference in levels do not affect most applications
except where the controller has operating range from 3.0 V
and above. In such applications, if CY14B256LA is used to
replace STK14C88-3, at voltage levels below 3 V, the
controller could be tristated and hence CY14B256LA could
write invalid data into the SRAM. This is because the
CY14B256LA would be active up to 2.7 V. In such
application, it is necessary that the controller issues a reset
when the VCC crosses below 3 V and remains LOW as long
as the controller is inactive. This would initiate a Hardware
STORE in the CY14B256LA and the nvSRAM outputs would
www.cypress.com
Document No. 001-55662 Rev. *E
3
Migrating from STK14C88-3 to CY14B256LA
Software Sequence
AutoStore Inhibit
The CY14B256LA has been designed to be compatible with
the CY14B256L/STK14C88-3 in the software sequence
modes. Hence, the same Software STORE and RECALL
address sequences in CY14B256L/STK14C88-3 works in
CY14B256LA, requiring no firmware change. However,
there is a difference in the required state of
/
during
the software sequence reads as explained further.
The STK14C88-3 has the AutoStore Inhibit feature and the
CY14B256LA has AutoStore Disable mode. These two
provide the same result of AutoStore disable but are done
by different means – hardware in STK14C88-3 and software
in CY14B256LA.
In the CY14B256L/STK14C88-3 while software sequence
must be clocked with
/
controlled reads it is not
necessary that
/ be low for the sequence to be valid.
That is, it is not necessary that the read is a real read with
/
held LOW. But, in the CY14B256LA the software
sequence may be clocked with
controlled reads or
controlled reads. This means that while in the STK14C88-3
/ state was immaterial, in the CY14B25LA ,
needs
to be LOW for a valid software sequence read. It does not
matter if
goes LOW first or
goes LOW first but the
read is valid for software sequence only when both
and
have gone LOW. In both the STK14C88-3 and
CY14B256LA
must be kept HIGH for all the six read
sequences.
In effect, this difference will affect applications where
software sequence reads are done with
/ held HIGH.
Firmware change will be required to take
LOW when
using the new part CY14B256LA. Applications where
software sequence reads are performed with
/
LOW
do not require any change.
Hardware STORE Cycle Parameters
The Hardware STORE parameters are improved in the
CY14B256LA. The improvements are listed under the
Details of Improvement section. No changes are required in
applications.
www.cypress.com
To disable AutoStore in STK14C88-3, the power is
connected to the VCAP pin and the VCC pin is grounded (or
left open). This cannot be done in CY14B256LA. For proper
operation of the device, in CY14B256LA, power is
connected to the VCC pin only. However, AutoStore disable
is more easily done through simple software sequence.
Therefore, if the STK14C88-3 is replaced in an application
where AutoStore has been disabled, then the layout has to
be modified to connect the power to the VCC pin and a
software sequence has to be used to disable AutoStore
function followed by a Software STORE, the first time the
board is powered up.
Preventing STORE
In the STK14C88-3, STORE function can be disabled on the
fly by holding
pin HIGH at the onset of STORE with a
driver capable of sourcing 30 mA at a VOH of at least 2.2 V.
This feature is not available in the CY14B256LA parts. In the
CY14B256LA, a STORE initiated by any means, cannot be
disabled on the fly.
Data Retention
The Data Retention in the CY14B256LA part is improved
from the older technology part. The CY14B256LA has data
retention of 20 years at 85 °C against the STK14C88-3 data
retention of 100 years at 55 °C. This translates to over four
times improvement in data retention at the same
temperatures.
Document No. 001-55662 Rev. *E
4
Migrating from STK14C88-3 to CY14B256LA
Details of Improvement
Hardware STORE Related Improvements
pin (Hardware STORE Busy Indication/Hardware
STORE Initiation)
The
pin of the nvSRAM is an open drain I/O pin used
to indicate or initiate a STORE operation. When a STORE
operation is in progress, nvSRAM pulls the
pin low to
indicate that the device is busy and cannot be accessed for
read/write operation. During normal operation, the
pin
can be pulled low to initiate a Hardware STORE operation.
As shown in Table 5, several timing parameters related to
the
pin input and output have changed from
STK14C88-3 to CY14B256LA. All of these changes are
improvements from the original part specification and should
be considered as added benefits in your system while
migrating to the new part number.
tDELAY
If a write latch is set and the
pin is pulled low,
STK14C88-3 enables 1 µs time for write operations to
complete before STORE operation begins and reads and
writes are inhibited. This potentially enables inadvertent data
to be written to the nvSRAM during the tDELAY duration.
Note rite Latch: hen a write operation is done, a ‘write
latch’ is set internally. hen
is pulled low, nvSRAM
checks this write latch before initiating a STORE. This is
done to prevent any unnecessary loss of endurance cycles.
In CY14B256LA, the tDELAY parameter enables only one
write cycle time for any ongoing write to complete after
pin is pulled low. This improvement provides better security
from inadvertent write operations.
Also, if
pin is pulled low externally for a minimum of
tPHSB time on CY14B256LA, the output driver of
pin
pulls the pin low only indicating a STORE operation within
25 ns (tDELAY). This parameter for
low to STORE busy
is not specified in the STK14C88-3. (See Figure 1 and
Figure 2).
LOW when write latch not set:
If no writes are performed since the last STORE/RECALL
operation, STORE operation does not start when
is
pulled low. However, the
pin is still internally pulled low
for 1 us (tDELAY) time in the STK14C88-3 device.
CY14B256LA device does not pull the
pin low
internally if write latch is not set. This improvement prevents
the possibility of being in an infinite loop when
pins of
two nvSRAM devices are ganged.
Figure 1. STK14C88-3: AC Parameters Related to
Figure 2. CY14B256LA: AC Parameters Related to
Write Latch Set
www.cypress.com
Write Latch Not Set
Document No. 001-55662 Rev. *E
5
Migrating from STK14C88-3 to CY14B256LA
Power-Up Recall Related Improvements
Additional parameters are specified in CY14B256LA such as
Output Disable Voltage (VHDIS),
To Output Active Time
(tLZHSB), and
High Active Time (tHHHD), which helps in system design. See the Figure 3 and Figure 4 for the definition of
the additional specs in power-up. Also, note that
remains low until the end of the power-up in the new part. This would
guard against the system inadvertently thinking the part has completed the boot up prior to real completion.
Figure 3. STK14C88-3: Power-Up Recall
Figure 4. CY14B256LA: Power-Up Recall
www.cypress.com
Document No. 001-55662 Rev. *E
6
Migrating from STK14C88-3 to CY14B256LA
Summary
The application note discusses the differences between
CY14B256LA in the latest 0.13 micron technology and
STK14C88-3 in the 0.8 micron technology. Several
parameters related to
and power-up have improved/
specified in the new device enabling faster device response,
greater data security, and ease of design.
application board in most applications. Applications where
STK14C88-3 is in AutoStore inhibit mode would require
layout changes, and also, it is not possible to prevent
STORE on the fly in the CY14B256LA. The value of VCAP in
the existing design needs to be considered while replacing
the part.
CY14B256LA is pin compatible with STK14C88-3 and can
replace the STK14C88-3 device with minimum changes in
www.cypress.com
Document No. 001-55662 Rev. *E
7
Migrating from STK14C88-3 to CY14B256LA
Document History
Document Title: Migrating from STK14C88-3 to CY14B256LA – AN55662
Document Number: 001-55662
Revision
ECN
Orig. of
Change
Submission
Date
Description of Change
**
2773126
PSR
10/01/09
New Spec.
*A
3016464
PSR
09/27/10
Updated Introduction in page 1.
Added a feature, Preventing STORE on the fly, to Table 2 and added a
paragraph under Critical Consideration indicating this feature difference.
Changed STORE cycles of CY14B256LA in Table 2 to 1,000,000 and
deleted the STORE cycles paragraph under Critical Consideration since
the parts are identical in this.
Updated Summary in page 7.
*B
3376003
GVCH
09/19/2011
Added
requirement differences in Software Sequence section in
page 3, 4
*C
3618997
PSR
06/05/2012
Updated document to match with current Cypress template.
hanged title from “ onverting” to “Migrating”
Reworded the Abstract for better understanding.
Text and drawing updates for more clarity. No change in technical
content.
*D
4168635
GVCH
10/21/2013
Obsolete document.
*E
4221998
GVCH
12/19/2013
Document reactivated.
Updated in new template.
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Document No. 001-55662 Rev. *E
8
Migrating from STK14C88-3 to CY14B256LA
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Document No. 001-55662 Rev. *E
9