AN202471 Migrating from Winbond W25Q-FV, Micron N25Q-A, and Macronix M25L-F Devices to Cypress S25FL-L Author: Arthur Claus Associated Part Family: S25FL-L Associated Code Examples: None Related Application Notes: None AN202471 discusses the key differences that need to be considered when migrating to Cypress S25FL-L devices from Winbond W25Q-FV, Micron N25Q-A, and Macronix M25L-F devices. Contents 1 2 3 4 1 Introduction ...............................................................1 Comparison of 128Mb devices .................................2 Comparison of 256-Mb devices ................................4 Command Sets .........................................................6 4.1 Addressing .......................................................6 4.2 Read Device ID................................................6 4.3 Read Flash Array .............................................7 4.4 Program Flash Array ........................................8 4.5 Erase Flash Array ............................................8 4.6 Register Access ...............................................9 4.7 Reset ............................................................. 11 Array Protection...................................................... 11 5.1 Legacy SPI Flash Protection (Block Protection Bits) ................................... 11 5.2 Additional Protection Mechanisms ................. 12 6 Summary ................................................................ 12 7 Related Documents ................................................ 13 Document History............................................................ 14 Worldwide Sales and Design Support ............................. 15 5 Introduction The Cypress S25FL-L Family devices are 3.0-V flash nonvolatile memory products fabricated on the 65-nm Floating Gate process technology. Their high performance and standard features are good replacements for many competing devices. This application note describes the key considerations that must be taken into account when migrating to a Cypress S25FL-L device from Winbond W25Q-FV, Micron N25Q-A, and Macronix M25L-F devices. www.cypress.com Document No. 002-02471 Rev. ** 1 Migrating from Winbond W25Q-FV, Micron N25Q-A, and Macronix M25L-F Devices to Cypress S25FL-L 2 Comparison of 128-Mb Devices Table 1 gives a detailed comparison of the 128-Mb devices. Table 1. Detailed Comparison Table 1 S25FL128L W25Q128FV N25Q128A MX25L12845G 8-pin SOIC 208 mil Yes Yes Yes Yes USON 5 × 6 mm Yes Yes Yes Yes WSON 6 × 8 mm No Yes Yes No 16-pin SOIC 300 mil Yes Yes Yes Yes BGA 24 (6 Ball × 4 Ball) 6 × 8 mm Yes Yes No No BGA 24 (5 Ball × 5 Ball) 6 × 8 mm Yes Yes Yes No Industrial (-40°C to 85°C) Yes Yes Yes Yes Industrial Plus (-40°C to 105°C) Yes No No No Extended (-40°C to 125°C) Yes No Yes No 2.7 V to 3.6 V 2.7 V to 3.6 V 2.7 V to 3.6 V Package/Pinout Temperature Range Operating Voltage Range Standby Current2 2.7 V to 3.6 V 3 Typical 20 µA 4 Max Deep Power Down Current6 Single Bit Read Data Current Quad Output Read Current Page Program Current 100 µA 10 µA 20 µA 5 50 µA 100 µA 100 µA 2 µA 1 µA – 2 µA 20 µA7 20 µA – 20 µA Typical 15 mA @ 50 MHz – – 12 mA @ 84 MHz Max 25 mA @ 50 MHz 15 mA @ 50 MHz 6 mA @ 54 MHz – Max 40 mA @ 133 MHz 20 mA @ 104 MHz 15 mA @ 108 MHz 15 mA @ 84 MHz Typical 25 mA @ 108 MHz8 – – 12 mA @ 104 MHz Max 35 mA @ 108 MHz 18 mA @ 80 MHz – 20 mA @ 104 MHz Max 40 mA @ 133 MHz 20 mA @ 104 MHz 20 mA @ 108 MHz 25 mA @ 133 MHz Typical 40 mA 20 mA – 12 mA Max 50 mA 25 mA 20 mA 20 mA Typical Max 1 For the test conditions for the parameters listed in this table, reference the appropriate datasheet. 2 Values shown for -40°C to 85°C 3 RESET#, CS#=VDD; SI, SCK = VDD or VSS: SPI, Dual I/O and Quad I/O Modes. 60 µA RESET#, CS#=VDD; SI, SCK = VDD or VSS: QPI Mode 4 100 µA for -40°C to 105°C and 150 µA for -40°C to 125°C 5 150 µA for -40°C to 125°C 6 Values shown for -40°C to 85°C 7 30 µA for -40°C to 105°C and 50 µA for -40°C to 125°C 8 For DDR Typical 30 mA and Max 40 mA @ 66 MHz www.cypress.com Document No. 002-02471 Rev.** 2 Migrating from Winbond W25Q-FV, Micron N25Q-A, and Macronix M25L-F Devices to Cypress S25FL-L 1 S25FL128L W25Q128FV Typical 40 mA 8 mA Max 50 mA 12 mA Typical 40 mA 20 mA Max 50 mA 25 mA 20 mA Data Retention 20-year data retention typical 20-year data retention minimum 20-year data retention minimum Endurance (Program/Erase Cycles) 100k erase/program cycles minimum 100k erase/program cycles minimum See Section 4 See Section 4 See Section 4 See Section 4 66 MHz Not Supported Not Supported 54 MHz 8, 16, 32, 64 Bytes 8, 16, 32, 64 Bytes 16, 32, 64 Bytes 8, 16, 32, 64 Bytes Typical 145 ms 10 ms 1.3 ms Max 750 ms 15 ms 8 ms 40 ms 256 Bytes 256 Bytes 256 Bytes 256 Bytes Typical 300 µs 700 µs 500 µs9 250 µs Max 900 µs 3 ms 5 ms 1.5 ms Write Status Register Current N25Q128A MX25L12845G 10 mA 20 mA 12 mA 10 mA Erase Current Command Set Max Quad I/O DDR Read Clock Rate Burst Wrap Lengths Write Status Register Time Page Buffer Size Page Program Time Sector Erase Time (4 KB) Block Erase Time (64 KB) 100k erase/program cycles minimum 10 Typical 50 ms 45 ms Max 200 ms 400 ms 11 250 ms 800 ms 12 25 mA 20-year data retention 100k erase/program cycles typical 30 ms 400 ms Typical 270 ms 150 ms 700 ms 380 ms Max 725 ms 2000 ms 3000 ms 2000 ms 13 Typical 70 s 40 s 170 s 55 s Max 180 s 200 s 250 s 200 s Yes/Yes Yes/Yes Yes/Yes Yes/Yes See Section 5 See Section 5 See Section 5 See Section 5 4 × 256 Bytes Security Regions 3 × 256 Bytes Security Regions 64-Byte OTP 512-Byte OTP Chip Erase Time Program/Erase Suspend/Resume Block Protection Security Regions / OTP 9 For N25Q128A13Exx4xx from week code 13 2014 onwards Typical = 0.2 ms Max = 0.4 ms 10 W25Q128FVxIG Typical time = 100 ms 11 For N25Q128A13Exx4xx from week code 13 2014 onwards Typical = 60 ms Max = 200 ms 12 For N25Q128A13Exx4xx from week code 13 2014 onwards Typical = 300 ms Max = 1000 ms 13 For N25Q128A13Exx4xx from week code 13 2014 onwards Typical = 46 s Max = 250 s www.cypress.com Document No. 002-02471 Rev.** 3 Migrating from Winbond W25Q-FV, Micron N25Q-A, and Macronix M25L-F Devices to Cypress S25FL-L 3 Comparison of 256-Mb Devices Table 2 gives a detailed comparison of the 256-Mb devices. Table 2. Detailed Comparison Table 14 S25FL256L W25Q256FV N25Q256A MX25L25645G 8-pin SOIC 208 mil No No No Yes USON 5 × 6 mm Yes No No No WSON 6 × 8 mm No Yes Yes Yes 16-pin SOIC 300 mil Yes Yes Yes Yes BGA 24 (6 × 4) 6 × 8 mm Yes Yes No No BGA 24 (5 × 5) 6 × 8 mm Yes Yes Yes No Industrial (-40°C to 85°C) Yes Yes Yes Yes Industrial Plus (-40°C to 105°C) Yes No No No Enhanced (-40°C to 125°C) Yes No Yes No 2.7 V to 3.6 V 2.7 V to 3.6 V 2.7 V to 3.6 V Package/Pinout Temperature Range Operating Voltage Range 2.7 V to 3.6 V 16 Standby Current15 Typical 20 µA 10 µA – 15 µA Max 100 µA17 50 µA 100 µA 50 µA Deep Power Down Current18 Typical 2 µA 1 µA – 3 µA 25 µA – 20 µA Single Bit Read Data Current Quad Output Read Current Page Program Current 19 Max 20 µA Typical 15 mA @ 50 MHz – – 12 mA @ 84 MHz Max 25 mA @ 50 MHz 15 mA @ 50 MHz 6 mA @ 54 MHz – Max 40 mA @ 133 MHz 20 mA @ 104 MHz 15 mA @ 108 MHz 15 mA @ 84 MHz Typical 25 mA @ 108 MHz20 – – 12 mA @ 104 MHz Max 35 mA @ 108 MHz 18 mA @ 80 MHz – 20 mA @ 104 MHz Max 40 mA @ 133 MHz 20 mA @ 104 MHz 20 mA @ 108 MHz 25 mA @ 133 MHz Typical 40 mA 20 mA – 12 mA Max 50 mA 25 mA 20 mA 20 mA 14 For the test conditions for the parameters listed in this table reference the appropriate datasheet 15 Values shown for -40°C to 85°C 16 RESET#, CS#=VDD; SI, SCK = VDD or VSS: SPI, Dual I/O and Quad I/O Modes. 60 µA RESET#, CS#=VDD; SI, SCK = VDD or VSS: QPI Mode 17 100 µA for -40°C to 105°C and 150 µA for -40°C to 125°C 18 Values shown for -40°C to 85°C 19 30 µA for -40°C to 105°C and 50 µA for -40°C to 125°C 20 For DDR Typical 30 mA and Max 40 mA @ 66 MHz www.cypress.com Document No. 002-02471 Rev.** 4 Migrating from Winbond W25Q-FV, Micron N25Q-A, and Macronix M25L-F Devices to Cypress S25FL-L 14 S25FL256L W25Q256FV N25Q256A MX25L25645G Typical 40 mA 8 mA – 10 mA Max 50 mA 12 mA 20 mA 12 mA Typical 40 mA 20 mA – 10 mA Max 50 mA 25 mA 20 mA 25 mA Data Retention 20-year data retention typical 20-year data retention minimum 20-year data retention minimum Endurance (Program/Erase Cycles) 100k erase/program cycles minimum 100k erase/program cycles minimum See Section 4 See Section 4 See Section 4 See Section 4 66 MHz Not Supported 54 MHz 84 MHz21 8, 16, 32, 64 Bytes 8, 16, 32, 64 Bytes 16, 32, 64 Bytes 8, 16, 32, 64 Bytes Typical 145 ms 10 ms 1.3 ms 40 ms Max 750 ms 15 ms 8 ms – 256 Bytes 256 Bytes 256 Bytes 256 Bytes Typical 300 µs 700 µs 500 µs 250 µs Max 900 µs 3 ms Write Status Register Current Erase Current Command Set Max Quad I/O DDR Read Clock Rate Burst Wrap Lengths Write Status Register Time Page Buffer Size Page Program Time 100k erase/program cycles minimum 20-year data retention 100k erase/program cycles typical 5 ms 1.5 ms 22 Sector Erase Time (4 KB) Typical 50 ms 45 ms 250 ms 30 ms Max 200 ms 400 ms 800 ms 400 ms Block Erase Time (64 KB) Typical 270 ms 150 ms 700 ms 280 ms Max 725 ms 2000 ms 3000 ms 2000 ms Typical 140 s 80 s 240 s 150 s Max 360 s 400 s 480 s 400 s Yes/Yes Yes/Yes Yes/Yes Yes/Yes See Section 5 See Section 5 See Section 5 See Section 5 4 × 256 Bytes Security Regions 3 × 256 Bytes Security Regions 64-Byte OTP 512-Byte OTP Chip Erase Time Program/Erase Suspend/Resume Block Protection Security Regions / OTP 21 100 MHz for the restricted voltage range 3.0-3.6 V 22 W25Q256FVxIG Typical time = 100 ms www.cypress.com Document No. 002-02471 Rev.** 5 Migrating from Winbond W25Q-FV, Micron N25Q-A, and Macronix M25L-F Devices to Cypress S25FL-L 4 Command Sets 4.1 Addressing Legacy SPI flash command sets supported 24-bit addressing, which allowed addressing of 16 MB (128 Mb). With the advent of 32-MB (256 Mb) devices, this has become an issue. The SPI flash manufacturers developed several methods for dealing with this issue such as the following: New commands which only accept 4-byte addressing Commands to enter and exit the 4-byte addressing mode A register to fill the extra address bits for legacy software Table 3. 4-Byte Addressing Table Device 4.2 4-Byte Commands Commands to Enter/Exit 4-Byte Addressing Extended Address Register S25FL128L Yes Yes No S25FL256L Yes Yes No W25Q128FV No No No W25Q256FV Yes Yes Yes N25Q128A No No No N25Q256A Yes Yes Yes 23 MX25L12845G Yes No No MX25L25645G Yes Yes Yes Read Device ID When supported, the Read JEDEC Serial Flash Discoverable Parameters 5Ah command should be used to read device identification, feature, and configuration information in accordance with the JEDEC JESS216 standard. Otherwise, the Read ID (RDID) 9Fh command should be used to access manufacturer identification, device identification, and Common Flash Interface (CFI) information. Table 4. Read Device ID Table Device Read SFDP (5A) READ ID (9F) READ QUAD ID (AF) Read Unique ID (48) Device ID (AB) Read Manufacturer Device ID (90, 92, 94)24 S25FL128L Yes Yes Yes Yes No No S25FL256L Yes Yes Yes Yes No No W25Q128FV Yes Yes Yes Yes Yes Yes W25Q256FV Yes Yes Yes Yes Yes Yes N25Q128A Yes Yes Yes No No No N25Q256A Yes Yes Yes No No No MX25L12845G Yes Yes No No Yes 90 only MX25L25645G Yes Yes No No Yes 90 only 23 Only Advanced Sector Protection commands have 4-byte addresses 24 90 single-bit output, 92 2-bit output, 94 4-bit output www.cypress.com Document No. 002-02471 Rev.** 6 Migrating from Winbond W25Q-FV, Micron N25Q-A, and Macronix M25L-F Devices to Cypress S25FL-L 4.3 Read Flash Array All manufacturers support multiple commands to read the Flash array. The different commands define how the address of the data and the data being read are transferred from and to the host. Table 5. Read Array Command Table Command Description S25FL128L S25FL256L W25Q128FV W25Q256FV N25Q128A N25Q256A MX25L12845G MX25L12845G Read 03h 03h 03h 03h 03h 03h 03h 03h Fast Read 0Bh 0Bh 0Bh 0Bh 0Bh 0Bh 0Bh 0Bh Read Dual Out 3Bh 3Bh 3Bh 3Bh 3Bh 3Bh 3Bh 3Bh Read Quad Out 6Bh 6Bh 6Bh 6Bh 6Bh 6Bh 6Bh 6Bh Dual I/O Read BBh BBh BBh BBh BBh BBh BBh BBh Quad I/O Read EBh EBh EBh EBh EBh EBh EBh EBh DDR Fast Read – – – – – 0Dh – – DDR Dual I/O Read – – – – – 3Dh – – DDR Quad I/O Read EDh EDh – – – EDh EDh EDh Read (4Byte Address) 13h 13h – 13h – 13h – 13h Fast Read (4-Byte Address) 0Ch 0Ch – 0Ch – 0Ch – 0Ch Read Dual Out (4-Byte Address) 3Ch 3Ch – 3Ch – 3Ch – 3Ch Read Quad Out (4-Byte Address) 6Ch 6Ch – 6Ch – 6Ch – 6Ch Dual I/O Read (4-Byte Address) BCh BCh – BCh – BCh – BCh Quad I/O Read (4-Byte Address) ECh ECh – ECh – ECh – ECh DDR Quad I/O Read (4Byte Address) EEh EEh – – – – – EEh Word Read Quad I/O – – E7h E7h – – – – Octal Word Read Quad I/O – – E3h E3h – – – – www.cypress.com Document No. 002-02471 Rev.** 7 Migrating from Winbond W25Q-FV, Micron N25Q-A, and Macronix M25L-F Devices to Cypress S25FL-L 4.4 Program Flash Array Page Program and Quad Page Program commands are supported by all the devices to program the array. Macronix devices use a different instruction code. All Cypress and Micron 256-Mb devices support specific 4-byte address commands. Micron devices have numerous proprietary inputs. All the devices support suspending and resuming program operations. Table 6. Program Array Command Table Command Description S25FL128L S25FL256L W25Q128FV W25Q256FV N25Q128A N25Q256A MX25L12845G MX25L12845G Page Program 02h 02h 02h 02h 02h 02h 02h 02h Page Program (4-Byte Address) 12h 12h – – – 12h – – Dual Input Fast Program – – – – A2h A2h – – Extended Dual Input Fast Program – – – – D2h D2h – – 32h 32h 32h 32h 32h 32h 38h 38h – – – – 12h 12h/38h – – Quad Page Program (4-Byte Address) 34h 34h – – 34h 34h – – Program Suspend 75h 75h 75h 75h 75h 75h 75h 75h Program Resume 7Ah 7Ah 7Ah 7Ah 7Ah 7Ah 7Ah 7Ah Quad Page Program Extended Quad Input Fast Program 4.5 Erase Flash Array All devices support erasing 4-KB (sectors or sub-sectors), 64-KB (blocks or sectors). All the devices except for Micron devices support erasing a 32-KB half block. All the devices except Micron support both 60h and C7h for chip erase. Micron devices only support C7h. Cypress and Macronix 256-Mb devices support specific 4-byte address commands although they are not the same. All devices support suspending and resuming erase operations. Table 7. Erase Array Command Table Command Description S25FL128L S25FL256L W25Q128FV W25Q256FV N25Q128A N25Q256A MX25L12845G MX25L12845G Sector Erase 20h 20h 20h 20h 20h 20h 20h 20h Half Block Erase 52h 52h 52h 52h – – 52h 52h Block Erase D8h D8h D8h D8h D8h D8h D8h D8h Chip Erase 60h/C7h 60h/C7h 60h/C7h 60h/C7h C7h C7h 60h/C7h 60h/D8h www.cypress.com Document No. 002-02471 Rev.** 8 Migrating from Winbond W25Q-FV, Micron N25Q-A, and Macronix M25L-F Devices to Cypress S25FL-L Command Description S25FL128L S25FL256L W25Q128FV W25Q256FV N25Q128A N25Q256A MX25L12845G MX25L12845G Sector Erase (4-Byte Address) 21h 21h – – – 21h – 21h Half Block Erase (4-Byte Address) 53h 53h – – – – – 5Ch Block Erase (4-Byte Address) DCh DCh – – – DCh – DCh Erase Suspend 75h 75h 75h 75h 75h 75h 75h 75h Erase Resume 7Ah 7Ah 7Ah 7Ah 7Ah 7Ah 7Ah 7Ah 4.6 Register Access All manufacturers support the following Write and Register Access commands: Write Enable 06h, Write Disable 04h, Read Status Register 05h, and Write Register 01h. Status and configuration registers command operations will require customization because of register bit and operational differences. For example, Cypress, Macronix, Micron, and Winbond have the same 8-bit Status Register 1 accessed with the Read Status Register 05h and Write Register 01h commands, but the definition of Status Register 1 bit 6 and bit 5 differ for each. Table 8. Register Access Command Table Command Description S25FL128L S25FL256L W25Q128FV W25Q256FV N25Q128A N25Q256A MX25L12845G MX25L12845G Read Status Register 1 05h 05h 05h 05h 05h 05h 05h 05h Read Status Register 2 07h 07h 35h 35h – – – – Read Config Register 1 35h 35h – – – – 15h 15h Read Config Register 2 15h 15h – – – – – – Read Config Register 3 33h 33h – – – – – – Read Any Register 65h 65h – – – – – – Write Register 01h 01h 01h 01h 01h 01h 01h 01h Write Disable 04h 04h 04h 04h 04h 04h 04h 04h Write Enable for non-volatile Data Change 06h 06h 06h 06h 06h 06h 06h 06h www.cypress.com Document No. 002-02471 Rev.** 9 Migrating from Winbond W25Q-FV, Micron N25Q-A, and Macronix M25L-F Devices to Cypress S25FL-L Command Description S25FL128L S25FL256L W25Q128FV W25Q256FV N25Q128A N25Q256A MX25L12845G MX25L12845G Write Enable for volatile Data change 50h 50h 50h 50h – – – – Write Any Register 71h 71h – – – – – – Clear Status Register 30h 30h – – – – – – Enter 4-Byte address mode B7h B7h – B7h – B7h – B7h Exit 4-Byte address mode E9h E9h – E9h – E9h – E9h Set Burst Length 77h 77h 77h 77h – – – – Enter QPI Mode 38h 38h 38h 38h – 35h 35h 35h Exit QPI Mode F5h F5h – – – F5h F5h F5h Read Learning Pattern Data 41h 41h – – – – – – Program non-volatile Learning Data 43h 43h – – – – – – Write volatile Learning Data 4Ah 4Ah – – – – – – Write Status Register 2 – – 31h 31h – – – – Read Status Register 3 – – 15h 15h – – – – Write Status Register 3 – – 11h 11h – – – – Set Read Parameters – – C0h C0h – – – – Read Extended Address Register – – – C8h – C8h – C8h Write Extended Address Register – – – C5h – C5h – C5h Read Lock Register – – – – E8h E8h – – Write Lock Register – – – – E5h E5h – – www.cypress.com Document No. 002-02471 Rev.** 10 Migrating from Winbond W25Q-FV, Micron N25Q-A, and Macronix M25L-F Devices to Cypress S25FL-L Command Description S25FL128L S25FL256L W25Q128FV W25Q256FV N25Q128A N25Q256A MX25L12845G MX25L12845G Read Flag Status Register – – – – 70h 70h – – Clear Flag Status Register – – – – 50h 50h – – Read Config Register – – – – 85h 85h – – Write Config Register – – – – 81h 81h – – Read Enhanced volatile Config Register – – – – 65h 65h – – Write Enhanced volatile Config Register – – – – 61h 61h – – 4.7 Reset All devices support resetting the device with the same commands. Cypress and Winbond devices have input sequences that will exit continuous mode output. Table 9. Reset Command Table Command Description S25FL128L S25FL256L W25Q128FV W25Q256FV N25Q128A N25Q256A MX25L12845G MX25L12845G Software Reset Enable 66h 66h 66h 66h 66h 66h 66h 66h Software Reset 99h 99h 99h 99h 99h 99h 99h 99h Mode Bit Reset FFh FFh 25 26 – – – – 5 Array Protection Array protection is another area where manufacturers have implemented different mechanisms; therefore, you should pay attention to these differences when changing devices. Protection mechanisms fall into two broad categories and each manufacturer provides a mechanism in both categories. 5.1 Legacy SPI Flash Protection (Block Protection Bits) All devices provide some form of protection using BP bits in the status register and modifying bits in the status register or another register. 25 Input 1 on IO0 for 8-16 clocks depending on the command 26 Input 1 on IO0 for 8-20 clocks depending on the command www.cypress.com Document No. 002-02471 Rev.** 11 Migrating from Winbond W25Q-FV, Micron N25Q-A, and Macronix M25L-F Devices to Cypress S25FL-L Table 10. Legacy Protection Table Command Description S25FL128L S25FL256L W25Q128FV W25Q256FV N25Q128A N25Q256A MX25L12845G MX25L12845G Number of BP bits in Status Register 3 4 3 4 4 4 4 4 Protection Start (Top or Bottom) Yes (In Status Register) Yes (In Status Register) Yes (In Status Register) Yes (In Status Register) Yes (In Status Register) Yes (In Status Register) Yes (In Config Register) Yes (In Config Register) Sector (4 KB) or Block (64 KB) Region Size Selector in Status Register Yes No Yes No No No No No Compliment Bit Yes (In Config Register 1) Yes (In Config Register 1) Yes (In Status Register 2) Yes (In Status Register 2) No No No No 5.2 Additional Protection Mechanisms 5.2.1 C yp r e s s S 2 5 F L 1 2 8 L a n d S 2 5 F L 2 5 6 L In addition to the legacy protection mechanisms, Cypress devices provide the following: 1. A volatile mechanism to lock all the blocks (64 KB) in the array except for the top and bottom blocks which have protection for the sectors (4 KB) which make them up. 2. A nonvolatile mechanism to lock a region containing an arbitrary number of sectors (4 KB) from 0 to the whole array. 5.2.2 Winbond W25Q128FV and W25Q256V In addition to the legacy protection mechanisms, Winbond devices provide a volatile mechanism to lock all the blocks (64 KB) in the array except for the top and bottom blocks which have protection for the sectors (4 KB) which make them up. 5.2.3 Micron N25Q128A and N25Q256A In addition to the legacy protection mechanisms the Micron devices provide a volatile mechanism to lock the entire array. This mechanism can be locked until the next power cycle. 5.2.4 Macronix MX25L12845G and MX25L12845G In addition to the legacy protection mechanisms the Micron devices provide the following: 6 1. A volatile mechanism to lock all the blocks (64 KB) in the array except for the top and bottom blocks which have protection for the sectors (4 KB) which make them up. 2. A nonvolatile mechanism to lock all the blocks (64 KB) in the array except for the top and bottom blocks which have protection for the sectors (4 KB) which make them up. Summary AN202471 discussed the differences between the S25FL-L family devices and their counterparts from several competitors. www.cypress.com Document No. 002-02471 Rev.** 12 Migrating from Winbond W25Q-FV, Micron N25Q-A, and Macronix M25L-F Devices to Cypress S25FL-L 7 Related Documents Cypress S25FL128L and S25FL256L Datasheet (Preliminary) Winbond W25Q128FV Datasheet (Revision L) Winbond W25Q256FV Datasheet (Revision H) Micron N25Q128A Datasheet (Revision R) Micron N25Q256A Datasheet (Revision U) Macronix MX25L12845G Datasheet (Rev 1.0 Jun 05 2015) Macronix MX25L25645G Datasheet (Rev 0.02 Nov 27 2014) www.cypress.com Document No. 002-02471 Rev.** 13 Migrating from Winbond W25Q-FV, Micron N25Q-A, and Macronix M25L-F Devices to Cypress S25FL-L Document History Document Title: AN202471 - Migrating from Winbond W25Q-FV, Micron N25Q-A, and Macronix M25L-F Devices to Cypress S25FL-L Document Number: 002-02471 Revision ** ECN 4965121 www.cypress.com Orig. of Change Submission Date AHCL 10/15/2015 Description of Change New Application Note Document No. 002-02471 Rev.** 14 Migrating from Winbond W25Q-FV, Micron N25Q-A, and Macronix M25L-F Devices to Cypress S25FL-L Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. 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