DISCRETE SEMICONDUCTORS DATA SHEET M3D574 PESD5V2S18U ESD protection array Product data sheet 2003 Apr 28 NXP Semiconductors Product data sheet ESD protection array FEATURES PESD5V2S18U PINNING • Uni-directional ESD protection of up to 18 lines PIN DESCRIPTION 1 to 5 cathode (k1 to k5) • Maximum peak reverse power: PPP = 100 W at tp = 8/20 µs 6 and 16 • Low clamping voltage: VCL = 12 V max. at IZSM = 10 A 7 to 15 cathode (k6 to k14) 17 to 20 cathode (k15 to k18) common anode (a1; a2) • Low leakage current: IR = 100 nA typ. at VRWM = 5.2 V • IEC 61000-4-2, level 4 (ESD); 15 kV (air) and 8 kV (contact). handbook, 4 columns 1 20 2 19 APPLICATIONS 3 18 • Printer parallel ports 4 17 • Computers and peripherals 5 16 • Communication systems. 6 15 7 14 8 13 9 12 10 11 1 20 DESCRIPTION Monolithic ESD protection device designed to protect up to 18 transmission or data lines from the damage caused by electrostatic discharge (ESD) and surge pulses. 10 11 MHC510 Fig.1 Simplified outline (SSOP20; SOT339-1) and symbol. LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT IPP non-repetitive peak reverse current tp = 8/20 µs − 10 A PPP non-repetitive peak reverse power dissipation tp = 8/20 µs − 100 W Tstg storage temperature −65 +150 °C Tj junction temperature −65 electrostatic discharge voltage +150 °C IEC 61000-4-2 (contact discharge) 30 − kV HBM MIL-Std 883 − kV ESD standards compliance IEC 61000-4-2, level 4 (ESD) >15 kV (air); >8 kV (contact) HBM MIL-Std 883, class 3 >4 kV 2003 Apr 28 2 10 NXP Semiconductors Product data sheet ESD protection array PESD5V2S18U THERMAL CHARACTERISTICS SYMBOL Rth j-a PARAMETER CONDITIONS thermal resistance from junction to ambient VALUE UNIT 135 K/W one or more diodes loaded Note 1. Refer to SOT339-1 standard mounting conditions. ELECTRICAL CHARACTERISTICS Tamb = 25 °C unless otherwise specified. SYMBOL PARAMETER VRWM crest working reverse voltage IR reverse current VCL clamping voltage VBR breakdown voltage rdiff differential resistance Cd diode capacitance 2003 Apr 28 CONDITIONS MIN. TYP. MAX. UNIT − − 5.2 V VRWM = 5.2 V − 0.1 1 µA IZSM = 3 A; tp = 8/20 µs; see Fig.5 − − 8 V IZSM = 10 A; tp = 8/20 µs; see Fig.5 − − 12 V IZ = 5 mA 6.4 6.8 7.2 V IZ = 1 mA − − 40 Ω IZ = 5 mA − − 8 Ω VR = 0; f = 1 MHz; see Fig.4 − 100 − pF 3 NXP Semiconductors Product data sheet ESD protection array PESD5V2S18U MHC485 103 handbook, halfpage MHC486 102 handbook, halfpage PZSM (W) IZSM (A) 102 10 10 10−2 Fig.2 10−1 1 tp (ms) 1 10−2 10 Maximum non-repetitive peak reverse power as a function of pulse duration. Fig.3 MHC487 110 10−1 1 tp (ms) 10 Maximum non-repetitive peak reverse current as a function of pulse duration. MHC488 11 handbook, halfpage handbook, Cd halfpage VCL (V) (pF) 100 10 90 80 9 70 60 8 50 7 40 0 1 2 3 4 5 3 6 4 VR (V) f = 1 MHz; Tamb = 25 °C tp = 8/20 µs Fig.4 Fig.5 Diode capacitance as a function of reverse voltage; typical values. 2003 Apr 28 4 5 6 7 8 9 10 IPP(A) Clamping voltage as a function of peak reverse pulse current; typical values. NXP Semiconductors Product data sheet ESD protection array PESD5V2S18U ESD TESTER RZ 450 Ω RG 223/U 50 Ω coax CZ DIGITIZING OSCILLOSCOPE 10× ATTENUATOR 50 Ω note 1 Note 1: attenuator is only used for open socket high voltage measurements IEC 1000-4-2 network CZ = 150 pF; RZ = 330 Ω 1/18 PESD5V2S18U vertical scale = 200 V/Div horizontal scale = 50 ns/Div vertical scale = 5 V/Div horizontal scale = 50 ns/Div GND GND unclamped +1 kV ESD voltage waveform (IEC 1000−4−2 network) clamped +1 kV ESD voltage waveform (IEC 1000−4−2 network) GND GND vertical scale = 200 V/Div horizontal scale = 50 ns/Div unclamped −1 kV ESD voltage waveform (IEC 1000−4−2 network) vertical scale = 5 V/Div horizontal scale = 50 ns/Div clamped −1 kV ESD voltage waveform (IEC 1000−4−2 network) Fig.6 ESD clamping test set-up and waveforms. 2003 Apr 28 5 MHC489 NXP Semiconductors Product data sheet ESD protection array PESD5V2S18U PACKAGE OUTLINE SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm D SOT339-1 E A X c HE y v M A Z 20 11 Q A2 A (A 3) A1 pin 1 index θ Lp L 1 10 bp e detail X w M 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 7.4 7.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.63 0.9 0.7 0.2 0.13 0.1 0.9 0.5 8 0o Note 1. Plastic or metal protrusions of 0.2 mm maximum per side are not included. OUTLINE VERSION SOT339-1 2003 Apr 28 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 MO-150 6 o NXP Semiconductors Product data sheet ESD protection array PESD5V2S18U DATA SHEET STATUS DOCUMENT STATUS(1) PRODUCT STATUS(2) DEFINITION Objective data sheet Development This document contains data from the objective specification for product development. Preliminary data sheet Qualification This document contains data from the preliminary specification. Product data sheet Production This document contains the product specification. Notes 1. Please consult the most recently issued document before initiating or completing a design. 2. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. DISCLAIMERS General ⎯ Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Terms and conditions of sale ⎯ NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. Right to make changes ⎯ NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use ⎯ NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. No offer to sell or license ⎯ Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control ⎯ This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. Applications ⎯ Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Quick reference data ⎯ The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Limiting values ⎯ Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to 2003 Apr 28 7 NXP Semiconductors Customer notification This data sheet was changed to reflect the new company name NXP Semiconductors. No changes were made to the content, except for the legal definitions and disclaimers. Contact information For additional information please visit: http://www.nxp.com For sales offices addresses send e-mail to: [email protected] © NXP B.V. 2009 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 613514/01/pp8 Date of release: 2003 Apr 28 Document order number: 9397 750 10889