BOURNS TISP6NTP2CDR-S

H
V SC
AV ER O M
A I S IO P L
L A N IA
BL S N T
E
TISP6NTP2C
*R
o
QUAD FORWARD-CONDUCTING P-GATE THYRISTORS
PROGRAMMABLE OVERVOLTAGE PROTECTORS
TISP6NTP2C High Voltage Ringing SLIC Protector
Independent Tracking Overvoltage Protection for Two SLICs:
- Dual Voltage-Programmable Protectors
- Supports Battery Voltages Down to -155 V
- Low 5 mA max. Gate Triggering Current
- High 150 mA min. (70 °C) Holding Current
- Specified 2/10 Limiting Voltage
- Small Outline Surface Mount Package
- Full 0 °C to 70 °C Temperature Range
D Package (Top View)
K1
1
8
K2
G1,G2
2
7
A
G3,G4
3
6
A
K3
4
5
K4
MDRXAN
Rated for Common Impulse Waveforms
IPPSM
Voltage Impulse
Current Impulse
Wave Shape
Wave Shape
A
10/1000
10/1000
25
10/700
5/310
40
2/10
2/10
90
Device Symbol
K1
G1,G2
Typical TISP6NTP2C Router Application
TERMINAL ADAPTOR
K2
SLIC 1
A
TISP6NTP2C
PROCESSOR
A
POTS 1
K3
POTS 2
SLIC 2
G3,G4
LINE
TRANSCEIVER
TRANSCEIVER
LAN
AI6NTP2C
SDRXAIA
K4
............................................ UL Recognized Components
Description
The TISP6NTP2C has been designed for short loop systems such as:
– WILL (Wireless In the Local Loop)
– SOHO (Small Office Home Office)
– FITL (Fibre In The Loop)
– ISDN-TA (Integrated Services Digital Network - Terminal Adaptors)
– DAML (Digital Added Main Line, Pair Gain)
How to Order
Device
TISP6NTP2C
Package
D (8-pin Small-Outline)
For Standard
Termination Finish
Order As
For Lead Free
Termination Finish
Order As
R (Embossed Tape Reeled)
TISP6NTP2CDR
TISP6NTP2CDR-S
- (Tube)
TISP6NTP2CD
TISP6NTP2CD-S
Carrier
*RoHS Directive 2002/95/EC Jan 27 2003 including Annex
MARCH 2002 – REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP6NTP2C High Voltage Ringing SLIC Protector
Description (Continued)
The systems described often have the need to source two POTS (Plain Old Telephone Service) lines, one for a telephone and the other for a
facsimile machine. In a single surface mount package, the TISP6NTP2C protects the two POTS line SLICs (Subscriber Line Interface Circuits)
against overvoltages caused by lightning, a.c. power contact and induction.
The TISP6NTP2C has an array of four buffered P-gate forward conducting thyristors with twin commoned gates and a common anode
connection. Each thyristor cathode has a separate terminal connection. An antiparallel anode-cathode diode is connected across each
thyristor. The buffer transistors reduce the gate supply current.
In use, the cathodes of an TISP6NTP2C thyristors are connected to the four conductors of two POTS lines (see applications information).
Each gate is connected to the appropriate negative voltage battery feed of the SLIC driving that line pair. By having separate gates, each SLIC
can be protected at a voltage level related to the negative supply voltage of that individual SLIC. The anode of the TISP6NTP2C is connected
to the SLIC common. The TISP6NTP2C voltage and current ratings also make it suitable for the protection of ISDN d.c. feeds of down to
-115 V (ETSI Technical Report ETR 080:1993, ranges 1 to 5).
Positive overvoltages are clipped to common by forward conduction of the TISP6NTP2C antiparallel diode. Negative overvoltages are initially
clipped close to the SLIC negative supply by emitter follower action of the TISP6NTP2C buffer transistor. If sufficient clipping current flows,
the TISP6NTP2C thyristor will regenerate and switch into a low voltage on-state condition. As the overvoltage subsides, the high holding
current of the TISP6NTP2C prevents d.c. latchup.
Absolute Maximum Ratings, 0 °C ≤ TJ ≤ 70 °C (Unless Otherwise Noted)
Value
Unit
Repetitive peak off-state voltage, VGK = 0
Rating
Symbol
VDRM
-170
V
Repetitive peak gate-cathode voltage, VKA = 0
VGKRM
-167
V
Non-repetitive peak on-state pulse current (see Notes 1 and 2)
10/1000 (Telcordia (Bellcore) GR-1089-CORE, Issue 2, February 1999, Section 4)
5/320 (ITU-T K.20, K.21& K.45, K.44 open-circuit voltage wave shape 10/700)
25
IPPSM
A
40
2/10 (Telcordia (Bellcore) GR-1089-CORE, Issue 2, February 1999, Section 4)
90
Non-repetitive peak on-state current, 50 Hz/60 Hz (see Notes 1 and 2)
0.1 s
7
1s
2.7
ITSM
5s
A
1.5
300 s
0.45
900 s
0.43
Non-repetitive peak gate current, 1/2 µs pulse, cathodes commoned (see Note 1)
I GSM
+25
A
TA
-40 to +85
°C
TJ
-40 to +150
°C
Tstg
-40 to +150
°C
Operating free-air temperature range
Junction temperature
Storage temperature range
NOTES: 1. Initially, the protector must be in thermal equilibrium. The surge may be repeated after the device returns to its initial conditions.
Gate voltage range is -20 V to -155 V.
2. These non-repetitive rated currents are peak values for either polarity. The rated current values may be applied to any cathodeanode terminal pair. Additionally, all cathode-anode terminal pairs may have their rated current values applied simultaneously (in
this case the anode terminal current will be four times the rated current value of an individual terminal pair).
Recommended Operating Conditions
Component
CG
RS
Gate decoupling capacitor
Series resistor for GR-1089-CORE intra-building surge survival, section 4.5.9, tests 1 and 2
Series resistor for K.20, K.21 and K.45 coordination with a 400 V primary protector
Min
Typ
Max
Unit
100
220
nF
5
50
Ω
10
50
Ω
MARCH 2002 – REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP6NTP2C High Voltage Ringing SLIC Protector
Electrical Characteristics, 0 °C ≤ TJ ≤ 70 °C (Unless Otherwise Noted)
Parameter
ID
V(BO)
V(BO)
VGK(BO)
VF
VFRM
VFRM
IH
IGKS
IGT
VGT
CKA
Test Conditions
V D = VDRM , VGK = 0
Ramp breakover
UL 497B, dv/dt ≤±100 V/µs, di/dt = ±10 A/µs,
Impulse breakover
voltage
Gate-cathode impulse
breakover voltage
Forward voltage
Ramp peak forward
recovery voltage
Impulse peak forward
VGG = -100 V, Maximum ramp value = ±10 A
2/10 µs, ITM = -27 A, di/dt = -27 A/µs, RS = 50 Ω, VGG = -100 V,
2/10 µs, ITM = -27 A, di/dt = -27 A/µs, RS = 50 Ω, VGG = -100 V,
(see Note 3)
I F = 5 A, t w = 200 µs
UL 497B, dv/dt ≤±100 V/µs, di/dt = ±10 A/µs,
Maximum ramp value = ±10 A
Holding current
I T = -1 A, di/dt = 1A/ms, VGG = -100 V
Gate-cathode trigger
voltage
Cathode-anode offstate capacitance
TJ = 25 °C
2/10 µs, ITM = -27 A, di/dt = -27 A/µs, RS = 50 Ω,
(see Note 3)
Gate trigger current
TJ = 25 °C
(see Note 3)
recovery voltage
Gate reverse current
Typ
TJ = 25 °C
Off-state current
voltage
Min
µA
µA
-112
V
-115
V
15
V
3
V
5
V
12
V
mA
IT = -3 A, t p(g) ≥ 20 µs, VGG = -100 V
f = 1 MHz, Vd = 1 V, IG = 0, (see Note 4)
-5
-50
-5
TJ = 25 °C
I T = -3 A, t p(g) ≥ 20 µs, VGG = -100 V
Unit
-150
TJ = 25 °C
VGG = VGK = VGKRM, VKA = 0
Max
µA
-50
µA
5
mA
6
mA
2.5
V
VD = -3 V
100
pF
VD = -48 V
50
pF
NOTES: 3. GR-1089-CORE intra-building 2/10, 1.5 kV conditions with 20 MHz bandwidth. The diode forward recovery and the thyristor gate
impulse breakover (overshoot) are not strongly dependent of the SLIC supply voltage value (VGG).
4. These capacitance measurements employ a three terminal capacitance bridge incorporating a guard circuit. The unmeasured
device terminals are a.c. connected to the guard terminal of the bridge.
Thermal Characteristics
Parameter
RθJA
Junction to free air thermal resistance
Test Conditions
TA = 70 °C, EIA/JESD51-3 PCB,
EIA/JESD51-2 environment, Ptot = 0.52 W
MARCH 2002 – REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
Min
Typ
Max
Unit
160
°C/W
TISP6NTP2C High Voltage Ringing SLIC Protector
Parameter Measurement Information
PRINCIPAL TERMINAL V-I CHARACTERISTIC
GATE TRANSFER
CHARACTERISTIC
+i
+iK
Quadrant I
IPPSM
Forward
Conduction
Characteristic
IFSM (= |ITSM |)
IF
IF
VF
VGK(BO)
VGG
-v
IGT
VD
ID
+v
-i G
+iG
IH
V(BO)
IT
IT
ITSM
IG
Quadrant III
Switching
Characteristic
IK
IPPSM
-i
PM6XAIC
-i K
Figure 1. Principal Terminal and Gate Transfer Characteristics
MARCH 2002 – REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP6NTP2C High Voltage Ringing SLIC Protector
APPLICATIONS INFORMATION
SLIC Protection
The generation of POTS lines at the customer premise normally uses a ringing SLIC. Although the lines are short, a central office ringing
voltage level is often required for fax machine operation. High voltage SLICs are now available that can produce adequate ringing voltage (see
table). The TISP6NTP2C has been designed to work with these SLICs which use battery voltages, VBATH , down to -150 V. Figure 2 shows a
typical example with one TISP6NTP2C protecting two SLICs.
The table below shows some details of HV SLICs using multiple negative supply rails.
Manufacturer
INFINEON‡
SLIC Series
SLIC-P‡
LEGERITY™‡
Unit
ISLIC™‡
SLIC #
PEB 4266
79R241
79R101
79R100
Data Sheet Issue
14/02/2001
-/08/2000
-/07/2000
-/07/2000
Short Circuit Current
110
150
150
150
mA
VBATH max.
-155
-104
-104
-104
V
VBATL max.
-150
-104
V BATH
VBATH
V
AC Ringing for:
85
45†
50†
55†
V rms
Crest Factor
1.4
1.4
1.4
1.25
VBATH
-70
-90
-99
-99
VBATR
-150
R or T Overshoot < 250 ns
Line Feed Resistance
-36
-15
20 + 30
-24
15
50
-20
-24
12
50
V
-20
V
12
50
V
Ω
† Assumes -20 V battery voltage during ringing.
‡ Legerity, the Legerity logo and ISLIC are the trademarks of Legerity, Inc.
Other product names used in this publication are for identification purposes only and may be trademarks of their respective
companies .
ISDN Protection
For voltage feed protection, the cathodes of an TISP6NTP2C thyristors are connected to the four conductors to be protected (see Figure 3).
Each gate is connected to the appropriate negative voltage feed. The anode of the TISP6NTP2C is connected to the system common.
Positive overvoltages are clipped to common by forward conduction of the TISP6NTP2C antiparallel diode. Negative overvoltages are initially
clipped close to the negative supply by emitter follower action of the TISP6NTP2C buffer transistor. If sufficient clipping current flows, the
TISP6NTP2C thyristor will regenerate and switch into a low voltage on-state condition. As the negative overvoltage subsides, the high holding
current of the TISP6NTP2C prevents d.c. latchup.
Voltage Stress Levels
Figure 4 shows the protector electrodes. The package terminal designated gate, G, is the transistor base, B, electrode connection and so is
marked as B (G). The following junctions are subject to voltage stress: Transistor EB and CB, SCR AK (off state) and the antiparallel diode
(reverse blocking). This clause covers the necessary testing to ensure the junctions are good.
Testing transistor CB and EB: The maximum voltage stress level for the TISP6NTP2C is VBATH with the addition of the short term antiparallel
diode voltage overshoot, VFRM. The current flowing out of the G terminal is measured at VBATH plus VFRM. The SCR K terminal is shorted to the
common (0 V) for this test (see Figure 4). The measured current, IGKS , is the sum of the junction currents ICB and IEB.
Testing transistor CB, SCR AK off state and diode reverse blocking: The highest AK voltage occurs during the overshoot period of the
protector. To make sure that the SCR and diode blocking junctions do not break down during this period, a d.c. test for off-state current, ID,
can be applied at the overshoot voltage value. To avoid transistor CB current amplification by the transistor gain, the transistor base-emitter is
shorted during this test (see Figure 5).
Summary: Two tests are need to verify the protector junctions. Maximum current values for IGKS and ID are required at the specified applied
voltage conditions.
MARCH 2002 – REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP6NTP2C High Voltage Ringing SLIC Protector
APPLICATIONS INFORMATION
R
CURRENT
SINK
R
CURRENT
SINK
R
CURRENT
SINK
R
CURRENT
SINK
-ve
SLIC
PROTECTOR
+t°
0
+t°
RS1
-ve
+t°
SLIC 1
0
+t°
-ve
+t°
RS2
0
+t°
VBATH
-ve
+t°
0V
ISDN
POWER
SUPPLY
0
+t°
TISP6NTP2C
NEGATIVE
SUPPLY
RS3
SLIC 2
IK
RS4
AI6XBNB
CG
100 nF
0V
AI6XDJA
TISP6NTP2C
Resistor "R" may be needed if sink has internal clamp diode
Figure 2. SLIC Protection
Figure 3. Protection of Four ISDN Power Feeds
0V
0V
ICB
B (G)
VBATH
+ VFRM
ICB
V(BO)
IR
1/4 T ISP
6NTP2C
K
B (G)
ID(I)
A
0V
K
IGKS
ID
1/4 T ISP
IEB
6NTP2C
AI6XCEB
Figure 4. Transistor CB and EB Verification
AI6XCFB
ID(I) is the internal SCR value of ID
Figure 5. Off-State Current Verification
MARCH 2002 – REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP6NTP2C High Voltage Ringing SLIC Protector
MECHANICAL DATA
Device Symbolization Code
Devices will be coded as below.
Device
Symbolization
Code
TISP6NTP2C
6NTP2C
MARCH 2002 – REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP6NTP2C High Voltage Ringing SLIC Protector
MECHANICAL DATA
D008 Plastic Small-Outline Package
This small-outline package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. The compound will
withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated in high
humidity conditions. Leads require no additional cleaning or processing when used in soldered assembly.
D008
8-pin Small Outline Microelectronic Standard
Package MS-012, JEDEC Publication 95
4.80 - 5.00
(0.189 - 0.197)
5.80 - 6.20
(0.228 - 0.244)
8
7
6
5
1
2
3
4
INDEX
3.81 - 4.00
(0.150 - 0.157)
1.35 - 1.75
(0.053 - 0.069)
0.25 - 0.50 x 45 ° N0M
(0.010 - 0.020)
7 ° NOM
3 Places
0.102 - 0.203
(0.004 - 0.008)
0.28 - 0.79
(0.011 - 0.031)
DIMENSIONS ARE:
NOTES: A.
B.
C.
D.
0.36 - 0.51
(0.014 - 0.020)
8 Places
Pin Spacing
1.27
(0.050)
(see Note A)
6 places
4.60 - 5.21
(0.181 - 0.205)
4°±4°
7 ° NOM
4 Places
0.190 - 0.229
(0.0075 - 0.0090)
0.51 - 1.12
(0.020 - 0.044)
MILLIMETERS
(INCHES)
Leads are within 0.25 (0.010) radius of true position at maximum material condition.
Body dimensions do not include mold flash or protrusion.
Mold flash or protrusion shall not exceed 0.15 (0.006).
Lead tips to be planar within ±0.051 (0.002).
MDXXAAF
MARCH 2002 – REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP6NTP2C High Voltage Ringing SLIC Protector
MECHANICAL DATA
D008 - Tape Dimensions
D008 Package (8-pin Small Outline) Single-Sprocket Tape
3.90 - 4.10
(.154 - .161)
1.50 - 1.60
(.059 - .063)
1.95 - 2.05
(.077 - .081)
7.90 - 8.10
(.311 - .319)
0.40
(0.016)
0.8
MIN.
(0.03)
5.40 - 5.60
(.213 - .220)
6.30 - 6.50
(.248 - .256)
ø
1.5
MIN.
(.059)
Carrier Tape
Embossment
DIMENSIONS ARE:
11.70 - 12.30
(.461 - .484)
Cover
0 MIN.
Tape
Direction of Feed
2.0 - 2.2
(.079 - .087)
MILLIMETERS
(INCHES)
NOTES: A. Taped devices are supplied on a reel of the following dimensions:Reel diameter:
330 +0.0/-4.0
(12.99 +0.0/-.157)
Reel hub diameter:
100 ± 2.0
(3.937 ± .079)
Reel axial hole:
13.0 ± 0.2
(.512 ± .008)
B. 2500 devices are on a reel.
“TISP” is a trademark of Bourns, Ltd., a Bourns Company, and is Registered in U.S. Patent and Trademark Office.
“Bourns” is a registered trademark of Bourns, Inc. in the U.S. and other countries.
MARCH 2002 – REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
MDXXATD