TISPPBL1D, TISPPBL1P, TISPPBL2D, TISPPBL2P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS FOR ERICSSON COMPONENTS SLICS PROGRAMMABLE OVERVOLTAGE PROTECTION FOR ERICSSON COMPONENTS SUBSCRIBER LINE INTERFACE CIRCUITS, SLICS ● Overvoltage Protectors for listed SLICs:SLIC †§ TISPPBL1 TISPPBL2 PBL 386 50/2 û û û û ü ü ü ü û û ü ü û û û û û û û PBL 386 61/2 < 55 mA‡ PBL 386 65/2 < 55 mA‡ PBL 387 10/1 û ü ü ü ü ü ü ü ü ü ü ü ü ü ü ü ü ü ü ü ü ü ü PBL 3762A/2 PBL 3762A/4 PBL 3764A/4 PBL 3764A/6 PBL 3766 PBL 3766/6 PBL 3767 PBL 3767/6 PBL 3860A/1 PBL 3860A/6 PBL 386 10/2 PBL 386 11/2 PBL 386 14/2 PBL 386 15/2 PBL 386 20/2 PBL 386 21/2 PBL 386 30/2 PBL 386 40/2 D PACKAGE (TOP VIEW) K1 K1 (Tip) 1 8 2 7 A (Ground) NC 3 6 A (Ground) (Ring) K2 4 5 K2 (Ring) (Tip) (Gate) G MD6XANA NC - No internal connection Terminal typical application names shown in parenthesis P PACKAGE (TOP VIEW) (Tip) K1 1 8 K1 (Tip) 2 7 A (Ground) NC 3 6 A (Ground) (Ring) K2 4 5 K2 (Ring) (Gate) G MD6XAV NC - No internal connection Terminal typical application names shown in parenthesis device symbol K1 K1 A G1,G2 A § See Applications Information for earlier SLIC types. ‡ Use TISPPBL2 when programmed line current is above 55 mA K2 ● Rated for International Surge Wave Shapes WAVE SHAPE 2/10 µs ● ● STANDARD Terminals K1, K2 and A correspond to the alternative line designators of T, R and G or A, B and C. The negative protection voltage is controlled by the voltage, VGG, applied to the G terminal. SD6XAEA ITSP A GR-1089-CORE 100 1.2/50 µs ITU-T K22 100 0.5/700 µs I3124 40 10/700 µs ITU-T K20, K21 40 10/1000 µs GR-1089-CORE 30 Specified Impulse Limiting Voltage - Voltage-Time Envelope Guaranteed - Full -40 °C to 85 °C Temperature Range UL Recognized, E195925 K2 ● Feed-Through Package Connections - Minimises Inductive Wiring Voltages ● Surface Mount and Through-Hole Ordering Options DEVICE CODE PACKAGE AND CARRIER TYPE TISPPBLxD 8-pin Small-Outline in a Tube TISPPBLxDR 8-pin Small-Outline on Tape and Reeled TISPPBLxP 8-pin Plastic DIP in a Tube † Customers are advised to obtain the latest version of the relevant Ericsson Components SLIC information to verify, before placing orders, that the information being relied on is current. PRODUCT INFORMATION AUGUST 1997 - REVISED AUGUST 2002 Specifications are subject to change without notice. 1 TISPPBL1D, TISPPBL1P, TISPPBL2D, TISPPBL2P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS FOR ERICSSON COMPONENTS SLICS description The TISPPBL1 and TISPPBL2 are dual forward-conducting buffered p-gate overvoltage protectors. They are designed to protect the Ericsson Components SLICs (Subscriber Line Interface Circuits) against overvoltages on the telephone line caused by lightning, a.c. power contact and induction. The TISPPBLx limits voltages that exceed the SLIC supply rail levels. The SLIC line driver section is typically powered by a negative voltage, VBat, in the region of -10 V to -85 V. The protector gate is connected to this negative supply. This references the protection (clipping) voltage to the negative supply voltage. As the protection voltage will track the negative supply voltage the overvoltage stress on the SLIC is minimised. The TISPPBLx buffered gate design reduces the loading on the SLIC supply during overvoltages caused by power cross and induction. Positive overvoltages are clipped to ground by diode forward conduction. Negative overvoltages are initially clipped close to the SLIC negative supply rail value. If sufficient current is available from the overvoltage, then the protector will crowbar into a low voltage ground referenced on-state condition. As the overvoltage subsides the high holding current of the crowbar prevents d.c. latchup. The difference between the TISPPBL1 and TISPPBL2 is the minimum value of holding current. The 105 mA TISPPBL1 can delatch SLIC programmed line currents up to 55 mA and the 150 mA TISPPBL2 can delatch all programmed line current values. These monolithic protection devices are fabricated in ion-implanted planar vertical power structures for high reliability and in normal system operation they are virtually transparent. The TISPPBLx is available in 8-pin plastic small-outline surface mount package and 8-pin plastic dual-in-line package. absolute maximum ratings, -40 °C ≤ TA ≤ 85 °C (unless otherwise noted) RATING SYMBOL VALUE UNIT Repetitive peak off-state voltage, IG = 0 VDRM -100 V Repetitive peak gate-cathode voltage, VKA = 0 VGKRM -90 V Non-repetitive peak on-state pulse current (see Notes 1 and 2) 10/1000 µs (Bellcore GR-1089-CORE, Issue 2, December 1997, Section 4) 30 0.2/310 µs (I3124, open-circuit voltage wave shape 0.5/700 µs) ITSP 5/310 µs (ITU-T K20 & K21, open-circuit voltage wave shape 10/700 µs) 40 40 1/20 µs (ITU-T K22, open-circuit voltage wave shape 1.2/50 µs) 100 2/10 µs (Bellcore GR-1089-CORE, Issue 2, December 1997, Section 4) 100 A Non-repetitive peak on-state current, 50/60 Hz (see Notes 1 and 2) 100 ms 11 1s ITSM 5s 300 s 4.5 A 2.4 0.95 900 s 0.93 Non-repetitive peak gate current, 1/2 µs pulse, cathodes commoned (see Note 1) IGSM 40 A Operating free-air temperature range TA -40 to +85 °C Junction temperature TJ -40 to +150 °C Tstg -65 to +150 °C Storage temperature range NOTES: 1. Initially the protector must be in thermal equilibrium with -40 °C ≤ TJ ≤ 85 °C. The surge may be repeated after the device returns to its initial conditions. 2. These non-repetitive rated currents are peak values for either polarity. The rated current values may be applied either to the Ring to Ground or to the Tip to Ground terminal pairs. Additionally, both terminal pairs may have their rated current values applied simultaneously (in this case the Ground terminal current will be twice the rated current value of an individual terminal pair). Above 85 °C, derate linearly to zero at 150 °C lead temperature. PRODUCT 2 INFORMATION AUGUST 1997 - REVISED AUGUST 2002 Specifications are subject to change without notice. TISPPBL1D, TISPPBL1P, TISPPBL2D, TISPPBL2P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS FOR ERICSSON COMPONENTS SLICS recommended operating conditions SEE Figure 18 C1 R1a R1b Gate decoupling capacitor MIN TYP 100 220 Series resistance for GR-1089-CORE first-level and second-level surge survival 40 Series resistance for GR-1089-CORE first-level surge survival 25 Series resistance for ITU-T recommendation K20/21 10 MAX UNIT nF Ω electrical characteristics, -40 °C ≤TA ≤ 85 °C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TJ = 85 °C -50 µA -70 V 1 µs IF = 5 A, tw = 500 µs 3 V IF = 20 A, 0.5/700 generator, Figure 3 test circuit (See Figure 2) 8 V VD = VDRM, VGK = 0 V(BO) Breakover voltage IT = -20 A, 0.5/700 generator, Figure 3 test circuit (See Figure 2) t(BR) Breakdown time VF Forward voltage IT = -20 A, 0.5/700 generator, Figure 3 test circuit (See Figure 2) voltage IF = 20 A, 0.5/700 generator, Figure 3 test VF > 5 V 1 VF > 1 V 10000 Forward recovery time IH Holding current IT = -1 A, di/dt = 1A/ms, VGG = -50 V, IGAS Gate reverse current VGG = VGKRM, VAK = 0 IGAT on state V(BR) < -50 V circuit (See Figure 2) tFR Gate reverse current, UNIT µA Off-state current Peak forward recovery MAX -5 ID VFRM TYP TJ = -40 °C TISPPBL1 -105 TISPPBL2 -150 µs mA TJ = -40 °C -5 µA TJ = 85 °C -50 µA -1 mA IT = -0.5 A, tw = 500 µs, VGG = -50 V, TA = 25 °C Gate reverse current, IGAF forward conducting IF = 1 A, tw = 500 µs, VGG = -50 V, TA = 25 °C -10 mA state IGT Gate trigger current IT = -5 A, tp(g) ≥ 20 µs, VGG = -50 V, TA = 25 °C VGT Gate trigger voltage IT = -5 A, tp(g) ≥ 20 µs, VGG = -50 V, TA = 25 °C CAK NOTE 5 Anode-cathode off- f = 1 MHz, Vd = 1 V, IG = 0, TA = 25 °C VD = -3 V state capacitance (see Note 3) VD = -50 V mA 2.5 V 110 pF 60 pF 3: These capacitance measurements employ a three terminal capacitance bridge incorporating a guard circuit. The unmeasured device terminals are a.c. connected to the guard terminal of the bridge. thermal characteristics PARAMETER RθJA Junction to free air thermal resistance PRODUCT TEST CONDITIONS MIN TYP MAX Ptot = 0.8 W, TA = 25 °C D Package 160 5 cm2, FR4 PCB P Package 100 UNIT °C/W INFORMATION AUGUST 1997 - REVISED AUGUST 2002 Specifications are subject to change without notice. 3 TISPPBL1D, TISPPBL1P, TISPPBL2D, TISPPBL2P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS FOR ERICSSON COMPONENTS SLICS PARAMETER MEASUREMENT INFORMATION PRINCIPAL TERMINAL V-I CHARACTERISTIC GATE TRANSFER CHARACTERISTIC +iK Quadrant I +i IFSP (= |ITSP|) Forward Conduction Characteristic IFSM (= |ITSM|) IF IF VF VGK(BO) IGT VD VGG (Circuit VB) -v +v ID I(BO) +i G IGAF IH IS VT VS V(BO) -i G IGAT IT IT ITSM IG Quadrant III Switching Characteristic IK ITSP -i -iK PM6XAIB Figure 1 PRINCIPAL TERMINAL AND GATE TRANSFER CHARACTERISTICS PROTECTOR MAXIMUM LIMITING VOLTAGE vs TIME 10 5 MAX VFRM = 8 V 1 µs 10 ms VOLTAGE - V 0 -50 Time VGG = VB = -50 V 1 µs -60 -70 MAX V(BO) = -70 V PM6XALB -80 Figure 2 TRANSIENT LIMITS FOR TISPPBLx LIMITING VOLTAGE PRODUCT 4 INFORMATION AUGUST 1997 - REVISED AUGUST 2002 Specifications are subject to change without notice. TISPPBL1D, TISPPBL1P, TISPPBL2D, TISPPBL2P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS FOR ERICSSON COMPONENTS SLICS PARAMETER MEASUREMENT INFORMATION IMPULSE R1 CURRENT 50 Ω IT, IF Hi S1 15 Ω 25 Ω ±1960 V 20 µF 20 nF Lo Th4 LIMITING VOLTAGE VK, VF ECAT WITH E502 0.5/700 SURGE NETWORK DUT (TISPPBLx) Th5 R1 = ONE SECTION OF A THICK-FILM HIGH VOLTAGE PULSE RESISTOR NETWORK IG 220 nF VB (VGG) -50 V AI6XBACB Figure 3 TEST CIRCUIT FOR MEASUREMENT OF LIMITING VOLTAGE 80 di/dt - Rate of Rise of Wavefront Current - A/µs i - Wavefront Current - A 20 E502 0.5/700 WAVEFRONT CURRENT vs TIME AI6XAY 15 10 5 0 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 Time - µs Figure 4 CURRENT WAVEFRONT PRODUCT E502 0.5/700 WAVEFRONT di/dt vs TIME AI6XAZ 70 60 50 40 30 20 10 0 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 Time - µs Figure 5 CURRENT WAVEFRONT di/dt INFORMATION AUGUST 1997 - REVISED AUGUST 2002 Specifications are subject to change without notice. 5 TISPPBL1D, TISPPBL1P, TISPPBL2D, TISPPBL2P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS FOR ERICSSON COMPONENTS SLICS THERMAL INFORMATION ITSM - Peak Non-Recurrent 60 Hz Current - A PEAK NON-RECURRING AC vs CURRENT DURATION 10 TI6LACB RING AND TIP CONNECTIONS ITSM applied simultaneously to both GROUND CONNECTION Return current is twice ITSM VGEN = 600 Vrms RGEN = 70 to 950 Ω VGG = -48 V, TAMB = 85°C 1 0·1 1 10 100 1000 t - Current Duration - s Figure 6 PRODUCT 6 INFORMATION AUGUST 1997 - REVISED AUGUST 2002 Specifications are subject to change without notice. TISPPBL1D, TISPPBL1P, TISPPBL2D, TISPPBL2P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS FOR ERICSSON COMPONENTS SLICS TYPICAL CHARACTERISTICS VK - Cathode Voltage - V -10 -20 50 devices tested from 10 wafer lots 0.5/700 Waveform IT = -20 A TA = 25°C VGG = -50 V DISTRIBUTION LIMITS OF DIODE FORWARD VOLTAGE vs TIME 6 -30 -40 -50 4 3 2 50 devices tested from 10 wafer lots 0.5/700 Waveform IF = 20 A TA = 25°C VGG = -50 V 1 -60 0 0.0 0.1 0.2 0.3 -70 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 Time - µs Figure 7 99·9 0.9 1.0 DIODE FORWARD CURRENT vs FORWARD VOLTAGE TC61AD 0.7 0.4 99 IF - Forward Current - A Cumulative Population - % 1 50 devices tested from 10 wafer lots IF = 20 A, IT = -20 A, 0.5/700 Waveform TA = 25°C, VGG = -50 V 99·99 0.4 0.5 0.6 0.7 0.8 Time - µs Figure 8 CUMULATIVE POPULATION % vs PEAK LIMITING VOLTAGE TC6XAB 99·999 AI6XAX 5 VF - Forward Voltage - V 0 DISTRIBUTION LIMITS OF THYRISTOR LIMITING VOLTAGE vs TIME AI6XAW 90 70 50 30 10 85°C 0.2 25°C -40°C 0.1 0.07 0.04 1 DIODE VFRM 0·1 THYRISTOR VGG - V(BO) 0.02 0·01 0·001 4 5 6 7 8 9 10 Peak Limiting Voltage - V 15 Figure 9 PRODUCT 0.01 0.5 0.6 0.7 0.8 0.9 1.0 VF - Forward Voltage - V 1.1 1.2 Figure 10 INFORMATION AUGUST 1997 - REVISED AUGUST 2002 Specifications are subject to change without notice. 7 TISPPBL1D, TISPPBL1P, TISPPBL2D, TISPPBL2P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS FOR ERICSSON COMPONENTS SLICS TYPICAL CHARACTERISTICS 99·99 Cumulative Population - % 99·9 50 devices tested from 10 wafer lots IF = 20 A, IT = -20 A, 0.5/700 Waveform TA = 25°C, VGG = -50 V 99 90 70 50 30 10 1 0·1 0·01 DIODE tFR for VF > 5 V Outliers (2) @ 0 µs THYRISTOR t(BR) for V(BR) < VGG 0·001 0.001 1 0.004 0.01 0.04 0.1 0.4 t(BR), tFR - Breakdown and Forward Recovery Times - µs 1.10 Normalised Peak Limiting Voltages 99·999 NORMALISED PEAK LIMITING VOLTAGES vs JUNCTION TEMPERATURE TC6XAA CUMULATIVE POPULATION % vs LIMITING TIME TC6XAC 1.05 1.00 0.95 Normalised to 25°C values of V(BO) and VFRM IF = 20 A, IT = -20 A 0.5/700 Waveform VGG = -50 V THYRISTOR V(BO) DIODE VFRM 0.90 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 TJ - Junction Temperature - °C Figure 11 Figure 12 APPLICATIONS INFORMATION operation of gated protectors The following SLIC circuit definitions are used in this data sheet: VBAT — Package pin label for the battery supply voltage. VBat — Voltage applied to the VBAT pin. VB — Negative power supply voltage applied to the VBAT pin via an isolation diode. This voltage is also the gate reference voltage, VGG, of the TISPPBLx. When the isolation diode, D1, is conducting, then VBat = VB + 0.7. The isolation diode, D1 in Figure 13, is to prevent a damaging current flowing into the SLIC substrate (VBAT pin) if the VBat voltage becomes more negative than the VB supply during a negative overvoltage condition. Each SLIC needs an isolation diode from the VB voltage supply. Figure 13 and Figure 14 show how the TISPPBLx limits overvoltages. The TISPPBLx thyristor sections limit negative overvoltages and the diode sections limit positive overvoltages. Negative overvoltages (Figure 13) are initially clipped close to the SLIC negative supply rail value (VB) by the conduction of the transistor base-emitter and the thyristor gate-cathode junctions. If sufficient current is available from the overvoltage, then the thyristor will crowbar into a low voltage ground referenced on-state condition. As the overvoltage subsides the high holding current of the crowbar thyristor prevents d.c. latchup. The negative protection voltage will be the sum of the gate supply (VB) and the peak gate(terminal)-cathode voltage (VGK(BO)). Under a.c. overvoltage conditions VGK(BO) will be less than 3 V. The integrated transistor buffer in the TISPPBLx greatly reduces the gate positive current (from about 50 mA to 1 mA) and introduces a negative gate current. Figure 1 shows that the TISPPBLx gate current depends on the current being PRODUCT 8 INFORMATION AUGUST 1997 - REVISED AUGUST 2002 Specifications are subject to change without notice. TISPPBL1D, TISPPBL1P, TISPPBL2D, TISPPBL2P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS FOR ERICSSON COMPONENTS SLICS conducted by the principal terminals. The gate current is positive during clipping (charging the VB supply) and negative when the thyristor is on or the diode is conducting (loading the VB supply). Without the negative gate current and the reduced level of positive gate current the VB supply could be charged with a current of nearly 100 mA. As the VB supply is likely to be electronic it would not be designed to be charged like a battery. As a result, the SLIC could be destroyed by the voltage of VB increasing to a level that exceeded the SLIC’s capability on the VBAT pin. The integrated transistor buffer removes this problem. Fast rising impulses will cause short term overshoots in gate-cathode voltage. The negative protection voltage under impulse conditions will also be increased if there is a long connection between the gate decoupling capacitor, C1, and the gate terminal. During the initial rise of a fast impulse, the gate current (IG) is the same as the cathode current (IK). Rates of 60 A/µs can cause inductive voltages of 0.6 V in 2.5 cm of printed wiring track. To minimise this inductive voltage increase of protection voltage, the length of the capacitor to gate terminal tracking should be minimised. Inductive voltages in the protector cathode wiring can increase the protection voltage. These voltages can be minimised by routing the SLIC connection through the protector as shown in Figure 13 and Figure 14. SLIC PROTECTION TISPPBLx Th4 SLIC PROTECTION TISPPBLx Th4 SLIC SLIC IT IF Th5 VB VBat C1 D1 Th5 VB VBat C1 D1 C2 AI6XANB C2 AI6XAOB Figure 13 NEGATIVE OVERVOLTAGE CONDITION Figure 14 POSITIVE OVERVOLTAGE CONDITION Positive overvoltages (Figure 14) are clipped to ground by forward conduction of the diode section in the TISPPBLx. Fast rising impulses will cause short term overshoots in forward voltage (VFRM). TISPPBLx limiting voltages This clause details the TISPPBLx voltage limiting levels under impulse conditions. test circuit Figure 3 shows the basic test circuit used for the measurement of impulse limiting voltage. During the impulse, the high levels of electrical energy and rapid rates of change cause electrical noise to be induced or conducted into the measurement system. It is possible for the electrical noise voltage to be many times the wanted signal voltage. Elaborate wiring and measurement techniques where used to reduce the noise voltage to less than 2 V peak to peak. impulse generator A Keytek ECAT E-Class series 100 with an E502 surge network was used for testing. The E502 produces a 0.5/700 voltage impulse. This particular waveform was used as it has the fastest rate of current rise (di/dt) of the commonly used lightning surge waveforms. This maximises the measured limiting voltage. Figure 4 shows the current wavefront through the DUT. To produce a peak test current level of ±20 A, the E502 charging voltage was set to ±1960 V. Figure 5 shows the DUT current di/dt. Initially the wavefront current rises PRODUCT INFORMATION AUGUST 1997 - REVISED AUGUST 2002 Specifications are subject to change without notice. 9 TISPPBL1D, TISPPBL1P, TISPPBL2D, TISPPBL2P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS FOR ERICSSON COMPONENTS SLICS at 60 A/µs, this rate then reduces as the peak current is approached. At the TISPPBLx V(BO) condition the di/dt is about 50 A/µs. limiting voltage levels Fifty devices were measured in the test circuit of Figure 3. The 50 devices were made up from groups of 5 devices taken from 10 separately processed device lots. Figure 7 shows the total waveform variation of the thyristor limiting voltage across the 50 devices. This shows that the largest peak limiting voltage (Breakover voltage, V(BO)) is -62 V, a 12 V overshoot beyond the -50 V gate reference supply, VB. The limiting voltage exceeds the gate reference supply voltage level for a period (t(BR)) of about 0.4 µs. Figure 9 and Figure 11 show these two waveform parameters in terms of device population. In Figure 9, the limiting voltage is shown in terms of the overshoot beyond the gate reference supply (VB - V(BO)). Removing the gate reference voltage level magnifies the thyristor limiting voltage variation and shows the data stratification caused by the oscilloscope digitisation. Extrapolating the data trend indicates that the overshoot is less than 14 V at the 99.997% level (equal to 30 ppm of the population exceeding 14 V, equivalent to +4 sigma point of a normal distribution). In Figure 11, extrapolating the thyristor data trend to the 99.997% level indicates a maximum breakdown time, t(BR), of 0.5 µs. Figure 12 shows that increasing the temperature up to 85 °C increases the thyristor peak limiting voltage by 2.4%, giving a maximum 85 °C peak limiting voltage of 1.024x(-50-14) = -65.5 V. Over the -40 °C to 85 °C temperature range the TISPPBLx is specified to have a maximum V(BO) value of -70 V and a breakdown time, t(BR), of 1 µs. Figure 8 shows the total waveform variation of the diode limiting voltage across the 50 devices. The peak limiting voltage (Peak Forward Recovery Voltage VFRM) is less than 6 V, and this value includes the 2 V of magnetically induced noise in the probe. Figure 9 shows that extrapolated 99.997% level is about 5.5 V. In Figure 11, extrapolating the diode data trend to the 99.997% level indicates a maximum forward recovery time, tFR, of 0.1 µs. Figure 12 indicates that there is about a 10% uplift by increasing the temperature to 85 °C. This gives a maximum 85 °C peak limiting voltage of 1.1x(5.5) = 6.1 V. Over the -40 °C to 85 °C temperature range, the TISPPBLx is specified to have a maximum VFRM value of 8 V and a maximum forward recovery time of 1 µs. Diodes do not switch to a much lower voltage like thyristors, so the diode limiting voltage applies for the whole impulse duration. Forward voltages of 1 V or less are normally considered safe. Figure 10 shows that the lowest current 1 V condition occurs at -40 °C with a current of 0.3 A. When the TISPPBLx is tested with the rated 10/1000 impulse it would take about 8 ms for the current to decay from 30 A to 0.3 A. Over the -40 °C to 85 °C temperature range, the TISPPBLx is specified to have a VF below 1 V within 10 ms. SLIC protection requirements This clause discusses the voltage withstand capabilities of the various Ericsson Components SLIC groups and compares these to the TISPPBLx protector parameters. The examples provided are intended to provide designers information on how the TISPPBLx protector and specific SLICs work together. Designers should always follow the circuit design recommendations contained in the latest edition of a SLIC data sheet. temperature range Some SLICs are rated for 0 °C to 70 °C operation, others for -40 °C to 85 °C operation. The TISPPBLx protector is specified for -40 °C to 85 °C operation and so covers both temperature ranges. PRODUCT 10 INFORMATION AUGUST 1997 - REVISED AUGUST 2002 Specifications are subject to change without notice. TISPPBL1D, TISPPBL1P, TISPPBL2D, TISPPBL2P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS FOR ERICSSON COMPONENTS SLICS PART NUMBER MAXIMUM VOLTAGE RATINGS d.c. VBAT & +2 V, < 10 ms VBAT -20 V & +5 V, < 1 µs VBAT -40 V & +10 V, < 250 ns VBAT -70 V & +15 V TIPX or RINGX Voltage - V PBL 3762A/2 PBL 3762A/4 PBL 3764A/4 PBL 3764A/6 PBL 3860A/1 PBL 3860A/6 PBL 386 10/2 PBL 386 11/2 PBL 386 14/2 PBL 386 15/2 PBL 386 61/2 PBL 386 65/2 PBL 387 10/1 15 10 5 0 10 ms 1 µs 0.25 µs VBat VBat - 10 VBat - 20 VBat - 30 VBat - 40 VBat - 50 TIPX or RINGX VOLTAGE RATING vs TIME VBat - 60 (NEGATIVE RATING RELATIVE TO VBat ) VBat - 70 AI6XDBAA d.c. VBAT & +0.5 V, < 10 ms VBAT -20 V & +5 V, < 1 µs VBAT -40 V & +10 V, < 250 ns VBAT -70 V & +15 V TIPX or RINGX Voltage - V PBL 3766 PBL 3766/6 PBL 3767 PBL 3767/6 15 10 5 0 10 ms 1 µs Time 0.25 µs VBat VBat - 10 VBat - 20 VBat - 30 VBat - 40 VBat - 50 TIPX or RINGX VOLTAGE RATING vs TIME VBat - 60 (NEGATIVE RATING RELATIVE TO VBat ) VBat - 70 AI6XDBAB d.c. -80 V & +2 V, < 10 ms VBAT -10 V & +5 V, < 1 µs VBAT -25 V & +10 V, < 250 ns VBAT -35 V & +15 V TIPX or RINGX Voltage - V PBL 386 20/2 PBL 386 21/2 PBL 386 30/2 PBL 386 40/2 PBL 386 50/2 Time 15 10 5 0 10 ms 1 µs Time 0.25 µs VBat - 80 V VBat - 10 VBat - 20 VBat - 30 VBat - 40 TIPX or RINGX VOLTAGE RATING vs TIME (NEGATIVE IMPULSE RATING RELATIVE TO VBat ) AI6XDBAC Figure 15 TIPX AND RINGX RATED VALUES PRODUCT INFORMATION AUGUST 1997 - REVISED AUGUST 2002 Specifications are subject to change without notice. 11 TISPPBL1D, TISPPBL1P, TISPPBL2D, TISPPBL2P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS FOR ERICSSON COMPONENTS SLICS normal operation Depending on the SLIC type, the maximum SLIC supply voltage rating (VBat) will be -70 V, -80 V or -85 V. The -90 V rating of the TISPPBLx gate-cathode (VGKRM) exceeds the highest SLIC voltage rating. To restore normal operation after the TISPPBLx has switched on, the minimum switch-off current (holding current IH) needed is equal to the maximum SLIC short circuit current to ground (d.c. line current together with the maximum longitudinal current). The first page of this data sheet has a list of the appropriate TISPPBLx protectors that can be used with each SLIC. maximum TIPX and RINGX terminal ratings The withstand levels of a SLIC line drive amplifier TIPX and RINGX can be expressed in terms of maximum voltage for certain time periods. The negative voltage rating can be specified in two ways; relative to ground or relative to the SLIC negative supply voltage (VBat). The TIPX or RINGX voltage withstand levels for the current range of Ericsson SLICs falls into three groups, see Figure 15. The first group, headed by the PBL 3762A/2 SLIC, has a positive polarity d.c. withstand of +2 V. For 10 ms, the output can withstand a voltage of +5 V. For 1 µs, the output can withstand a voltage of +10 V. For 250 ns, the output is able to withstand a voltage of +15 V. In the negative polarity, the output can withstand VBat continuously. For 10 ms, the output can withstand a voltage of VBat - 20 V. For 1 µs, the output can withstand a voltage of VBat - 40 V. For 250 ns, the output is able to withstand a voltage of VBat - 70 V. The second group, headed by the PBL 3766 SLIC, has a positive polarity d.c. withstand of +0.5 V. For 10 ms, 1 µs and 250 ns the withstand voltage is the same as the PBL 3762A/2 group. In the negative polarity the withstand voltage of the PBL 3766 group is the same as the PBL 3762A/2 group. The third group, headed by the PBL 386 20/2 SLIC, has the same positive polarity withstand as the PBL 3762A/2 group. In the negative polarity, the output can withstand -80 V continuously. For 10 ms, the output can withstand a voltage of VBat - 10 V. For 1 µs, the output can withstand a voltage of VBat - 25 V. For 250 ns, the output is able to withstand a voltage of VBat - 35 V. protection requirements to cover all SLICs To protect all SLICs, the TISPPBLx protector must limit the voltage to the lowest withstand levels of the three SLIC groups shown in Figure 15. Figure 16 shows that this will be the positive polarity rating of the PBL 3766 group and the negative rating of the PBL 386 20/2 group. . TISPPBLx voltage limiting performance Figure 17 shows how the TISPPBLx protection voltages compare to the minimum voltage withstands of Figure 16. The two shaded areas represent the positive and negative maximum limiting voltage levels of the TISPPBLx from Figure 2. The isolation diode voltage drop displaces the TISPPBLx negative limiting voltage 1 µs, -20 V pulse area by -0.7 V from VBat. So the actual negative limiting voltage is -20.7 V relative to VBat. This value does not exceed any part of the SLIC minimum negative voltage ratings. Any negative voltage disturbance in the VB supply caused by TISPPBLx gate current will be tracked in VBat by conduction of the isolation diode D1. So a negative going change in VB does not substantially increase the TIPX and RINGX voltage stress relative to VBat. However, the absolute value of VBat with respect to ground must be kept within the data sheet rating. In the positive polarity the TISPPBLx limits the maximum voltage to 8 V in a 1 µs period and between 1 V and 5 V for a 10 ms period. These values do not exceed any of the SLIC minimum positive voltage ratings. application circuit Figure 18 shows a typical TISPPBLx SLIC card protection circuit. The incoming line conductors, R and T, connect to the relay matrix via the series over-current protection. Fusible resistors, fuses and positive PRODUCT 12 INFORMATION AUGUST 1997 - REVISED AUGUST 2002 Specifications are subject to change without notice. TISPPBL1D, TISPPBL1P, TISPPBL2D, TISPPBL2P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS FOR ERICSSON COMPONENTS SLICS 40 SLIC GROUP VOLTAGE RATINGS vs TIME 30 20 PBL 3766 GROUP PBL3762A/2 AND PBL386 20/2 GROUPS 10 Voltage - V 0 Time 10 ms 1 µs 0.25 µs VBat VBat - 10 VBat - 20 VBat - 30 VBat - 40 PBL 386 20/2 GROUP VBat - 50 VBat - 60 PBL3762A/2 AND PBL3766 GROUPS VBat - 70 AI6XBDD Figure 16 SLIC VOLTAGE RATINGS 40 SLIC MINIMUM VOLTAGE WITHSTAND AND TISPPBLx VOLTAGE LIMITING vs TIME 30 20 TISPPBLx 10 Voltage - V 0 Time 10 ms 1 µs 0.25 µs VBAT 0.7 V ISOLATION DIODE (D1) VOLTAGE DROP FROM VBat TISPPBLx VBAT - 10 VBAT - 20 VBAT - 30 AI6XBC VBAT - 40 Figure 17 SLIC VOLTAGE RATINGS AND TISPPBLx PROTECTION LEVELS temperature coefficient (PTC) resistors can be used for over-current protection. Resistors will reduce the prospective current from the surge generator for both the TISPPBLx and the ring/test protector. The TISP7xxxF3 protector has the same protection voltage for any terminal pair. This protector is used when the ring generator configuration may be ground or battery-backed. For dedicated ground-backed ringing generators, the TISP3xxxF3 gives better protection as its inter-conductor protection voltage is twice the conductor to ground value. PRODUCT INFORMATION AUGUST 1997 - REVISED AUGUST 2002 Specifications are subject to change without notice. 13 TISPPBL1D, TISPPBL1P, TISPPBL2D, TISPPBL2P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS FOR ERICSSON COMPONENTS SLICS SERIES RESISTANCE T WIRE R1b TEST RELAY RING RELAY Th1 R1a (INCLUDES OVERCURRENT PROTECTION) R WIRE RING/TEST PROTECTION SLIC PROTECTION Th4 S3a S2a S1a Th3 SLIC RELAY SLIC Th2 TISP 3xxxF3 OR 7xxxF3 Th5 S3b S1b S2b TISP PBLx VB TEST EQUIPMENT RING GENERATOR VBat C1 D1 C2 AI6XAPEA Figure 18 TYPICAL APPLICATION CIRCUIT Relay contacts 3a and 3b connect the line conductors to the SLIC via the TISPPBLx protector. Closing contacts 3a and 3b connects the TISPPBLx protector in parallel with the ring/test protector. As the ring/test protector requires much higher voltages than the TISPPBLx to operate, it will only operate when the contacts 3a and 3b are open. Both protectors will divert the same levels of peak surge current and their required current ratings should be similar. The TISPPBLx protector gate reference voltage comes from the SLIC negative supply feed (VB). A local gate capacitor, C1, sources the gate current pulses caused by fast rising impulses. PRODUCT 14 INFORMATION AUGUST 1997 - REVISED AUGUST 2002 Specifications are subject to change without notice. TISPPBL1D, TISPPBL1P, TISPPBL2D, TISPPBL2P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS FOR ERICSSON COMPONENTS SLICS Earlier protection recommendations The table below lists the protection recommendations from earlier versions of the TISPPBLx data sheet. TISPPBL1 TISPPBL2 PBL 3796 SLIC < 55 mA‡ PBL 3796/2 < 55 mA‡ PBL 3798 < 55 mA‡ PBL 3798/2 < 55 mA‡ PBL 3798/5 < 55 mA‡ PBL 3798/6 ü û û ü ü ü ü ü ü ü ü ü ü ü ü ü ü ü ü ü ü PBL 3799 PBL 3799/2 PBL 386 20/1 ¶ PBL 386 21/1 ¶ PBL 386 30/1 ¶ PBL 386 40/1 ¶ PBL 386 50/1 ¶ ¶ Product Change Notification 109 21-PBL 386 xx/1-1 Uen of 06-06-1999 improved the silicon design of the PBL 386 20/1, PBL 386 21/1, PBL 386 30/1, PBL 386 40/1 and PBL 386 50/1. These improved devices are designated by a /2 as PBL 386 20/2, PBL 386 21/2, PBL 386 30/2, PBL 386 40/2 and PBL 386 50/2 respectively. ‡ Use TISPPBL2 when programmed line current is above 55 mA PRODUCT INFORMATION AUGUST 1997 - REVISED AUGUST 2002 Specifications are subject to change without notice. 15 TISPPBL1D, TISPPBL1P, TISPPBL2D, TISPPBL2P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS FOR ERICSSON COMPONENTS SLICS MECHANICAL DATA D008 plastic small-outline package This small-outline package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. The compound will withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated in high humidity conditions. Leads require no additional cleaning or processing when used in soldered assembly. D008 8-pin Small Outline Microelectronic Standard Package MS-012, JEDEC Publication 95 5,00 (0.197) 4,80 (0.189) 6,20 (0.244) 5,80 (0.228) 8 7 6 5 1 2 3 4 INDEX 4,00 (0.157) 3,81 (0.150) 7° NOM 3 Places 1,75 (0.069) 1,35 (0.053) 0,203 (0.008) 0,102 (0.004) 0,79 (0.031) 0,28 (0.011) 5,21 (0.205) 4,60 (0.181) 0,50 (0.020) x 45°NOM 0,25 (0.010) 7° NOM 4 Places 0,51 (0.020) 0,36 (0.014) 8 Places Pin Spacing 1,27 (0.050) (see Note A) 6 Places 0,229 (0.0090) 0,190 (0.0075) 4° ± 4° 1,12 (0.044) 0,51 (0.020) ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES NOTES: A. B. C. D. Leads are within 0,25 (0.010) radius of true position at maximum material condition. Body dimensions do not include mold flash or protrusion. Mold flash or protrusion shall not exceed 0,15 (0.006). Lead tips to be planar within ±0,051 (0.002). PRODUCT 16 MDXXAAC INFORMATION AUGUST 1997 - REVISED AUGUST 2002 Specifications are subject to change without notice. TISPPBL1D, TISPPBL1P, TISPPBL2D, TISPPBL2P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS FOR ERICSSON COMPONENTS SLICS MECHANICAL DATA D008 tape dimensions D008 Package (8-pin Small Outline) Single-Sprocket Tape 4,10 3,90 8,10 7,90 1,60 1,50 2,05 1,95 0,40 0,8 MIN. 5,60 5,40 6,50 6,30 Direction of Feed Embossment Cover 0 MIN. ø 1,5 MIN. Carrier Tape 12,30 11,70 Tape 2,2 2,0 ALL LINEAR DIMENSIONS IN MILLIMETERS NOTES: A. Taped devices are supplied on a reel of the following dimensions:Reel diameter: Reel hub diameter: Reel axial hole: MDXXATB 330 +0,0/-4,0 mm 100 ±2,0 mm 13,0 ±0,2 mm B. 2500 devices are on a reel. PRODUCT INFORMATION AUGUST 1997 - REVISED AUGUST 2002 Specifications are subject to change without notice. 17 TISPPBL1D, TISPPBL1P, TISPPBL2D, TISPPBL2P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS FOR ERICSSON COMPONENTS SLICS MECHANICAL DATA P008 plastic dual-in-line package This dual-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. The compound will withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated in high humidity conditions The package is intended for insertion in mounting-hole rows on 7,62 (0.300) centres. Once the leads are compressed and inserted, sufficient tension is provided to secure the package in the board during soldering. Leads require no additional cleaning or processing when used in soldered assembly. P008 Designation per JEDEC Std 30: PDIP-T8 10,2 (0.400) MAX 8 7 6 5 Index Dot C L 1 2 3 C L 7,87 (0.310) 7,37 (0.290) T.P. 4 6,60 (0.260) 6,10 (0.240) 1,78 (0.070) MAX 4 Places 5,08 (0.200) MAX Seating Plane 105° 90° 8 Places 0,51 (0.020) MIN 3,17 (0.125) MIN 2,54 (0.100) T.P. 6 Places (see Note A) 0,36 (0.014) 0,20 (0.008) 8 Places 0,533 (0.021) 0,381 (0.015) 8 Places ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES NOTE A: Each pin centerline is located within 0,25 (0.010) of its true longitudinal position MDXXABA PRODUCT 18 INFORMATION AUGUST 1997 - REVISED AUGUST 2002 Specifications are subject to change without notice.