www.fairchildsemi.com FAN8006D3 4-CH Motor Driver Features Description • • • • • • The FAN8006D3 is a monolithic integrated circuit, suitable for 4-CH motor driver which drives focus actuator, tracking actuator, sled motor and loading motor of a CD-media system. 4-Channel BTL (Balanced transformer-less) driver Built-in thermal shutdown circuit Built-in power save circuit Separated power supply Operating supply voltage: 4.5V ~ 13.2V Corresponds to 3.3V or 5V DSP 28-SSOPH-375SG2 Target Application • Compact disk player • Digital video disk player • Compact disk ROM Ordering Information Device Package Ope. Temp. FAN8006D3 28-SSOPH-375SG2 −35°C ~ +85°C FAN8006D3TF 28-SSOPH-375SG2 −35°C ~ +85°C Rev. 1.0.0 ©2002 Fairchild Semiconductor Corporation 2 1 2 3 4 5 6 7 BIAS OPIN1(+) OPIN1(−) OPOUT1 IN2 MUTE STBY2 PreVcc OPIN4(+) OPIN4(−) OPOUT4 OPIN3(+) OPIN3(−) OPOUT3 28 27 26 25 24 23 22 STBY1 PowVcc3 CH3/4 VO3(−) VO3(+) VO4(−) VO4(+) 20 19 18 17 16 15 8 9 10 11 12 13 14 PowVcc CH2 VO2(−) VO2(+) VO1(−) VO1(+) FIN(GND) 21 PowVcc CH1 FAN8006D3 GND FIN(GND) GND FAN8006D3 FAN8006D3 Pin Assignments FAN8006D3 Pin Definitions Pin Number Pin Name I/O Pin Function Description 1 BIAS I Bias voltage input 2 OPIN1(+) I Op-amp CH1 input (+) 3 OPIN1(−) I Op-amp CH1 input (−) 4 OPOUT1 O Op-amp CH1 output 5 IN2 I CH2 input 6 MUTE I CH1 mute control when STBY1 is logic high 7 STBY2 I CH2 standby control 8 GND - Signal ground 9 PowVcc1 CH1 - BTL CH1 power supply 10 PowVcc2 CH2 - BTL CH2 power supply 11 VO2(−) O Drive2 output (−) 12 VO2(+) O Drive2 output (+) 13 VO1(−) O Drive1 output (−) 14 VO1(+) O Drive1 output (+) 15 VO4(+) O Drive4 output (+) 16 VO4(−) O Drive4 output (−) 17 VO3(+) O Drive3 output (+) 18 VO3(−) O Drive3 output (−) 19 PowVcc3 CH3/4 - BTL CH3/4 power supply 20 STBY1 I Input for CH1/3/4 standby control 21 GND - Ground 22 OPOUT3 O Op-amp CH3 output 23 OPIN3(−) I Op-amp CH3 input (−) 24 OPIN3(+) I Op-amp CH3 input (+) 25 OPOUT4 O Op-amp CH4 output 26 OPIN4(−) I Op-amp CH4 input (−) 27 OPIN4(+) I Op-amp CH4 input (+) 28 PreVcc - Vcc for pre block 3 FAN8006D3 22 + − + VO4(+) OPOUT3 23 VO4(−) OPIN3(−) 24 VO3(+) OPIN3(+) 25 VO3(−) OPOUT4 26 PowVcc3 CH3/4 OPIN4(−) 27 STBY1 OPIN4(+) 28 FIN (GND) GND PreVcc Internal Block Diagram 21 20 19 18 17 16 15 − −− ++ 10k + − + + 10k − LEVEL SHIFT + PowVcc CH3/4 + PowVcc CH3/4 + − 10k − − 10k LEVEL SHIFT 10k −− ++ 10k 10k 20k 20k + + 10k − - 10k 10k TSD + − 10k 20k LEVEL SHIFT + 4 OPIN1(−) OPOUT1 IN2 MUTE STBY2 10k 9 10 11 12 13 14 VO1(+) OPIN1(+) (GND) FIN 8 VO1(−) 7 VO2(+) 6 + VO2(−) 5 − PowVcc CH2 4 BIAS 10k 3 + PowVcc CH1 2 + GND 1 − + 10k − + 10k − 10k 10k 20k ++ -− LEVEL SHIFT PowVcc CH1 − 10k PowVcc CH2 − 10k + − 10k FAN8006D3 Equivalent Circuits (Continued) POWER OUTPUT CHANNEL OPAMP INPUT 9 10 19 28 28 11 12 13 14 2 15 16 24 17 18 27 2KΩ 28 2KΩ 3 25Ω 1KΩ 25Ω 1KΩ 23 26 CHANNEL OP-AMP OUTPUT BIAS INPUT 28 28 20KΩ 20KΩ 28 10KΩ 25Ω 1 27p 25Ω 20KΩ 4 22 25 CHANNEL 2 INPUT STANDBY 1/2 INPUT 28 28 20KΩ 28 20KΩ 28 1KΩ 28 20KΩ 25Ω 25Ω 7 20 10KΩ 80KΩ 5 40KΩ 1KΩ 20KΩ 1KΩ 100KΩ 20KΩ 40KΩ 20KΩ 40KΩ 20KΩ 100KΩ 40KΩ 20KΩ 25Ω 1KΩ 5 FAN8006D3 Equivalent Circuits MUTE INPUT 28 6 1KΩ 1KΩ 30KΩ 6 1KΩ 40KΩ 25Ω FAN8006D3 Absolute Maximum Ratings ( Ta=25°C) Parameter Symbol Value Unit Maximum supply voltage PreVccmax 15 V Power dissipation PD 2.5 note W Operating temperature range TOPR −35 ~ +85 °C Storage temperature range TSTG −55 ~ +150 °C NOTE: Pd is measured base on the JEDEC/STD(JESD 51-2) Epoxy board Pd=2.5W 1. Test PCB is single layer PCB which has only 1 signal plane. PCB size is 76mm × 114mm × 1.6mm. 2. Power dissipation is reduced for using above Ta=25°C. It’s slope is -20.0mW/°C. 3. Do not exceed PD and SOA (Safe Operating Area). Pd (mW) 2,000 1,500 500 0 0 SOA 25 50 75 85 100 125 150 175 Ambient temperature, Ta [°C] Recommended Operating Conditions ( Ta=25°C) Parameter Symbol Min. Typ. Max. Unit Supply voltage PreVcc 4.5 - 13.2 V Supply voltage PowVcc CH1 4.5 - PreVcc V Supply voltage PowVcc CH2 4.5 - PreVcc V Supply voltage PowVcc CH3/4 4.5 - PreVcc V 7 FAN8006D3 Electrical Characteristics (Unless otherwise specified, Ta=25°C, PreVcc=12V, PowVcc CH1=PowVcc CH3/4=5V, PowVcc CH2=12V, RL=8Ω,24Ω) Parameter Symbol Conditions Min. Typ. Max. Unit - 0.1 1 mA Quiescent current1 ICC1 STBY1,2=0.5V,Mute=2V,RL=∞ Quiescent current2 ICC2 STBY1,2=2V,Mute=0.5V,RL=∞ - 22.0 31.0 mA Quiescent current3 ICC3 STBY2=2V, STBY1,Mute=0.5V - 5.5 8.5 mA Quiescent current4 ICC4 STBY2=0.5V, STBY1,Mute=2V - 12.0 17.0 mA Quiescent current5 ICC5 STBY2,Mute=0.5V,STBY1=2V, - 17.5 24.5 mA Mute on voltage VMON - 2.0 - - V Mute off voltage VMOFF - - - 0.5 V STBY1 on voltage VSTON1 - - - 0.5 V STBY1 off voltage VSTOFF1 - 2.0 - - V STBY2 on voltage VSTON2 - - - 0.5 V STBY2 off voltage VSTOFF2 - 2.0 - - V Output offset voltage 1,3,4 VOF1,3,4 - −50 - +50 mV Maximum output voltage 1,3,4 VOM1,3,4 - 3.6 4.0 - V Closed loop voltage gain 1,3,4 GVC1,3,4 - 17 18 19 dB Ripple rejection ratio 1,3,4 RR1,3,4 - - 60 - dB Slew rate 1,3,4 SR1,3,4 - - 1 - V/µs Output offset voltage 2 VOF2 - −50 - +50 mV Maximum output voltage 2 VOM2 - 9.5 10.5 - V Closed loop voltage gain 2 GVC2 - 17 18 19 dB Ripple rejection ratio 2 RR2 - - 60 - dB Slew rate 2 SR2 - - 1 - V/µs VOFOP - −10 - +10 mV IBOP - - - 400 nA BTL DRIVE CIRCUIT Channel 1,3,4(RL=8Ω) Channel 2(RL=24Ω) INPUT OP-AMP Input offset voltage Input bias current High level output voltage VOHOP PreVcc=5V, RL=∞ 4.5 - - V Low level output voltage VOLOP PreVcc=5V, RL=∞ - - 0.5 V ISINK PreVcc=5V, RL=50Ω 3 - - mA ISOURCE PreVcc=5V, RL=50Ω 2 - - mA VIN = -75dB, 1KHz - 75 - dB Output sink current Output source current Open loop voltage gain GVO Ripple rejection ratio RROP VIN = 120KHz, 2VPP - 60 - dB Slew rate SROP VIN = -20dB, 120Hz - 1 - V/µs Common mode rejection ratio CMRR VIN = -20dB, 1KHz - 80 - dB Common mode input range CMIR PreVcc=5V -0.3 - 4 V 8 FAN8006D3 Application Information 1. Standby/Mute Input FAN8006D3 have 2 independent standby inputs that is , pin #7(STBY2) and pin #20(STBY1), and 1 independent mute input(pin #7). The digital logics of these functions are as below. STBY1=>Low Mute=>Low CH 1 STBY1=>High Mute=>High standby CH3/4 CH2 - Mute=>Low operate - STBY2 Mute=>High High Low high impedance - - operate - - - - operate standby 2. Mute Timing Chart If the mute input(pin #6) voltage rises above 2.0V, the output(CH1) current can be muted under normal operating conditions, make sure to open pin #7 or pull it down below 0.5V. Below figure is high impedance mute timing chart. PreVcc = 12V PowVcc CH1= 5V BIAS = 1.65V RL = 8Ω Tm ≤ 125µsec Voltage 2[V] Mute(pin #6) 0 Voltage Vout (pin#13,14) time Tm Vom 0.5[mV] 0 time 9 FAN8006D3 3. CH2 Drive Output Schematic M − 11 DO DO+ 12 Inside IC Power amp 10K 10K 10K − 10K − + + − R + 10 PowVccCH2 Current Conveyor Type 2 R PowVccCH2 1 Bias − + 20K 10K 5 • The reference voltage BIAS is given externally through pin 1. • The input signal is amplified by (20K/10K) times and then fed to the current conveyor type 2 circuit and the power amp circuit. • The power amp circuit produces the differential output voltages and drives two output power amplifier circuits. • Since the differential gain of the power amplifier is equal to 2 × (1+10K / 10K) , the output signal of the input OP-amp is amplified totally 8. • If the total gain is insufficient or large, external resistor can be used to adjust the gain. 10 FAN8006D3 4. CH1/3/4 Drive Output Schematic M − 13 16 18 DO DO+ 14 15 17 Inside IC Power amp 10K 10K 10K 10K − − R + PowVccCH1 (PowVccCH3/4) − + + 9 19 Current Conveyor Type 2 R PowVccCH1 (PowVccCH3/4) 20K + − 1 Bias 2 24 27 − + 10K 3 23 26 4 22 25 • The reference voltage BIAS is given externally through pin 1. • The input OP-amp output signal is amplified by (20K/10K) times and then fed to the current conveyor type 2 circuit and the power amp circuit. • The power amp circuit produces the differential output voltages and drives two output power amplifier circuits. • Since the differential gain of the power amplifier is equal to 2 × (1+10K / 10K) , the output signal of the input OP-amp is amplified totally 8. • If the total gain is insufficient or large, the input OP-amp and the external resistors can be used to adjust the gain. 11 FAN8006D3 Application Circuits (Voltage control mode) BIAS VOLTAGE 1 BIAS PreVcc 28 12V SERVO AMP FOCUS 2 OPIN1(+) OPIN4(+) 27 SLED 3 OPIN1(−) OPIN4(−) 26 TRACKING 4 OPOUT1 OPOUT4 25 5 IN2 OPIN3(+) 24 MUTE 6 MUTE OPIN3(−) 23 STBY2 7 STBY OPOUT3 22 LOADING FAN8006D3 8 GND 9 PowVcc CH1 GND 21 STBY1 20 STBY1 10 PowVcc CH2 PowVcc CH3/4 19 LOADING MOTOR TRACKING ACTUATOR 12 11 VO2(−) VO3(−) 18 12 VO2(+) VO3(+) 17 13 VO1(−) VO4(−) 16 14 VO1(+) VO4(+) 15 SLED MOTOR FOCUS ACTUATOR FAN8006D3 13 FAN8006D3 DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com 6/24/02 0.0m 001 Stock#DSxxxxxxxx 2002 Fairchild Semiconductor Corporation