www.fairchildsemi.com KA9259D(KA9259HD) 5-Channel Motor Drive IC Features Description • 4-CH Balanced Transformerless(BTL) Driver • 1-CH (Forward/Reverse) DC Motor Driver With Speed Control Circuit • Built-in TSD (Thermal Shutdown) Circuit • Built-in 5V Regulator (With an External PNP Transistor) • Built-in Mute Circuit • Wide Operating Supply Voltage Range: 6V~13.2V The KA9259D is a monolithic integrated circuit, and suitable for 5-CH motor driver which drives focus actuator, tracking actuator, sled motor, spindle motor and loading motor of compact disk player system. Typical Applications Ordering Information • • • • Compact Disk Player (CDP) Video Compact Disk Player (VCD) Automotive Compact Disk Player (CDP) Other Compact Disk Media 28-SSOPH-375 Device Package Operating Temp. KA9259HD 28-SSOPH-375 -25°C ~ +75°C KA9259HDTF 28-SSOPH-375 -25°C ~ +75°C Rev. 1.0.3 ©2003 Fairchild Semiconductor Corporation 2 1 2 3 4 5 6 7 DO1.1 DO1.2 DI1.1 DI1.2 REB REGO MUTE GND3 DO4.2 DO4.1 DI4.2 DI4.1 VREF VCC2 28 27 26 25 24 23 22 LDCTL DI3 DO3.2 DO3.1 DO5.2 DO5.1 20 19 18 17 16 15 8 9 10 11 12 13 14 DI2 DO2.1 DO2.2 GND2 DI5.2 FIN 21 DI5.1 KA9259D VCC1 FIN GND1 KA9259D(KA9259HD) Pin Assignments KA9259D(KA9259HD) Pin Definitions Pin Number Pin Name I/O Pin Function Description 1 DO1.1 O Channel 1 output 1 2 DO1.2 O Channel 1 output 2 3 DI1.1 I Channel 1 input 1 4 DI1.2 I Channel 1 input 2 (Adjustable) 5 REB O External transistor base drive output 6 REO O Regulator output 7 MUTE I Mute signal input 8 GND1 - Ground 1 9 DI5.1 I Channel 5 input 1 (Loading Motor) 10 DI2 I Channel 2 input 11 DO2.1 O Channel 2 output 1 12 DO2.2 O Channel 2 output 2 13 GND2 - Ground 2 14 DI5.2 I Channel 5 input 2 (Loading Motor) 15 DO5.1 O Channel 5 output 1 (Loading Motor) 16 DO5.2 O Channel 5 output 2 (Loading Motor) 17 DO3.1 O Channel 3 output 1 18 DO3.2 O Channel 3 output 2 19 DI3 I Channel 3 input 20 LD CTL I Channel 5 (Loading Motor) speed control input 21 VCC1 - Power supply voltage 1 22 VCC2 - Power supply voltage 2 23 VREF I Bias voltage input 24 DI4.1 I Channel 4 input 1 (Adjustable) 25 DI4.2 I Channel 4 input 2 26 DO4.1 O Channel 3 output 1 27 DO4.2 O Channel 3 output 2 28 GND3 - Ground 3 3 KA9259D(KA9259HD) 22 FIN DO5.1 VCC2 23 DO5.2 VREF 24 DO3.1 DI4.1 25 DO3.2 DI4.2 26 DI3 DO4.1 27 LDCTL DO4.2 28 VCC1 GND3 Internal Block Diagram 21 20 19 18 17 16 15 10K 10K 10K 4-CH BTL Driver Output 2.5V 10K 10K 10K 10K DI1.1 DI1.2 REB REGO MUTE FIN 8 9 10 11 12 13 14 DI5.2 7 GND2 6 DO2.2 5 DO2.1 4 DI2 3 DI5.1 2 GND1 1 DO1.2 10K DO1.1 10K 4 10K TSD KA9259D(KA9259HD) Equivalent Circuits Driver Input (Except For Loading Motor Driver) Driver Output 10k 2.5V 1 2 11 12 15 16 17 18 27 26 10k 20k 0.58k 10 3 4 25 19 24 VREF1 Loading Motor Driver Input Loading Motor Speed Control Input 14 9 50k 50k 50k 50k 50k 50k 50k 50k 50k 50k 50k 20 50k 50k 50k Mute Input Bias Input 50k 50k 23 7 50k 5 KA9259D(KA9259HD) Absolute Maximum Ratings (Ta = 25°C) Parameter Symbol Value Unit Maximum Supply Voltage VCCMAX 15 V Power Dissipation PD 1.7 note W Operating Temperature TOPR -25 ~ +75 °C Storage Temperature TSTG -55 ~ +150 °C Maximum Current Output IOMAX 1 A Note: 1. When mounted on 76mm × 114mm × 1.57mm PCB (Phenolic resin material). 2. Power dissipation reduces 13.6mW / °C for using above Ta=25°C 3. Do not exceed Pd and SOA. Power Dissipation Curve Pd (mW) 3,000 2,000 1,000 0 0 25 50 75 100 125 150 175 Ambient temperature, Ta [°C] Recommended Operating Condition (Ta = 25°C) Parameter Operating Supply Voltage 6 Symbol Value Unit VCC 6 ~ 13.2 V KA9259D(KA9259HD) Electrical Characteristics (Ta = 25°C, VCC = 8V, RL= 8Ω, f =1kHz, unless otherwise specified) Parameter Symbol Conditions Min. Typ. Max. Unit 2.5 6 10 mA - 2.5 5 mA Quiescent Circuit Current ICCQ Under no-load Mute-on Current IMUTE Pin 7=GND Mute-on Voltage VMON - - - 0.5 V Mute-off Voltage VMOFF - 2 - - V REGULATOR PART Output Voltage VREG IL=100mA 4.7 5.0 5.3 V Load Regulation ∆VRL3 IL=0→200mA -50 0 50 mV Line Regulation ∆VCC VCC=6→13V, IL=100mA -20 0 80 mV BTL DRIVER PART (CH1, CH2, CH3 and CH4) Input Offset Voltage Output Offset Voltage 1 Maximum Source Current 1 VIO - -15 - 15 mV VOO1 - -40 - 40 mV 0.25 0.4 - A ISOURCE1 RL=8Ω→VCC Maximum Sink Current 1 ISINK1 RL=8Ω→GND 0.25 0.4 - A Maximum Output Voltage 3 VOM3 VIN=0.7V, VCC=13V 2.5 3.3 4.6 V Maximum Output Voltage 4 VOM4 VIN=7V, VCC=13V, VIN=8V - -5.8 -5.0 V Closed-Loop Voltage Gain AVF VIN=8V, VCC=13V 5 6.5 8 dB RR VIN=0.1VRMS, f=120Hz 40 60 - dB SR 120Hz, VIN=1VRMS, Square wave 1 2 - V/µs Ripple Rejection Ratio (Note1) Slew Rate (Note1) LOADING MOTOR DRIVER PART (UNLESS OTHERWISE SPECIFIED, VCTL=OPENED) Output Voltage 1 VO1 VPIN9=5V, VPIN14=0V, RL=45Ω 2.5 3.1 3.8 V Output Voltage 2 VO2 VPIN9=0V, VPIN14=5V, RL=45Ω 2.5 3.1 3.8 V Output Voltage Regulation 1 (CTL) VOCTL1 VCTL=3.5→4.5V, VPIN9=5V VPIN14=0V, RL=45Ω 0.5 1.0 1.5 V Output Voltage Regulation 2 (CTL) VOCTL2 VCTL=3.5→4.5V, VPIN9=0V VPIN14=5V, RL=45Ω 0.5 1.0 1.5 V Load Regulation 1 ∆VRL1 IL=100→400mA, VPIN9=5V, VPIN14=0V - 300 700 mV Load Regulation 2 ∆VRL2 IL=100→400mA, VPIN9=0V, VPIN14=5V - 300 700 mV Output Offset Voltage 2 VOO2 VPIN9=5V, VPIN14=5V -40 - 40 mV Output Offset Voltage 3 VOO3 VPIN9=0V, VPIN14=0V -40 - 40 mV Note : 1. Guaranteed design value 7 KA9259D(KA9259HD) Application Information 1. Mute Function VCC Pin #7 Mute circuit High Mute-off Low Mute-on Open Mute-on 4-Channels BTL driver Bias Circuit Block 7 • When the mute (pin 7) is high level, the bias circuit of BTL driver is activated. On the other hand, when the mute (pin7) is open or low level, the bias circuit of BTL driver is disabled. So that the 4-channels BTL driver output circuit will be muted. 2. TSD (Thermal Shutdown) Function VREFBG 4-Channels BTL driver & Loading motor driver Bias Circuit Block R11 Q11 R12 • The VREFBG is the output voltage of the band-gap-referenced biasing circuit and acts as the input voltage of the TSD circuit. • The base-emitter voltage of the transistor, Q11 is designed to turn-on at below voltage. VBE = VREFBG × R12 = 400[mV ] R11 + R12 • If the chip temperature rises above 175°C, then the TSD circuit is activated and the output circuit is muted. The TSD circuit has the hysteresis temperature of 25°C. 3. Voltage Regulator 21 VREFBG 5 2.5V VCC PNP 6 Vout R2 C1 KA9259D 8 R3 KA9259D(KA9259HD) • The VREFBG is the output voltage of the band-gap-referenced biasing circuit and is the reference voltage of the regulator. • The external circuit is composed of the transistor(PNP), KSB772 and a capacitor(C1), 100µF, and the capacitor is used as a ripple eliminator and should have a good temperature characteristics. • The output voltage, VOUT is decided as follows. R2 )VREFBG = 2 × 2.5 = 5[V ] R3 Where, R 2 = R3 VOUT = (1 + 4. Loading Motor Driver 4.1 Truth table and Operation INPUT OUTPUT PIN9(DI5.1) PIN14(DI5.2) PIN15(DO5.1) PIN16 (DO5.2) State L L L L Brake H L H L Forward L H L H Reverse H H L L Brake ∆V DI5.1 DI5.2 21 Buffer Q1 9 Input Control Logic Speed Control Circuit Level Shift Q2 15 ∆V Buffer M 14 VCC 16 R Q3 Q4 20 D Loading Motor Driver 13 • The input voltages of (5V and 0V) or (0V and 5V) pairs are applied to the input pin #9 and #14 respectively. • When the input voltages are applied to the input pin #9 and #14, then the output of the comparator is decided depends on the input voltage status. • As shown in the above diagram, the difference voltage, ∆V, is applied to the both terminals of the motor. The direction of the motor is decided by the voltage difference, +∆V and −∆V. • The output characteristics is as follows, - If pin # 9=5V and #14=0V, then pin # 15=+∆V and #16= −∆V, hence the motor turn in forward direction. - If pin # 9=0V and #14=5V, then pin # 15= −∆V and #16=+∆V, hence the motor turn in reverse direction. - If pin # 9=5V and #14=5V, then ∆V=0V, hence the motor stop. - If pin # 9=0V and #14=0V, then ∆V=0V, hence the motor stop. 4.2 Loading Motor Speed Control • If the torque of the loading motor is too low when it is used with the pin #20 open, then it should used as the above diagram. • The desired torque could be obtained by selecting the appropriate resistor R as shown in the left diagram. • If it is necessary, the zener diode can be used as in the right diagram. • The maximum torque is obtained when the applied voltage at pin #20 is about 6.8V (at VCC=8V). 9 KA9259D(KA9259HD) 6. BTL Driver (CH1, CH2, CH3 and CH4) 23 ∆I VREF 22 Buffer Q2 Q1 Level Shift 3 10K 2 ∆I 10K Buffer M 4 1 Q3 Q4 BTL Driver 28 • The voltage, VREF, is the reference voltage given by the bias voltage of the pin #23. • The input signal through the pin #3 is amplified by 10K/10K times and then fed to the level shift. • The level shift produces the current due to the difference between the input signal and the arbitrary reference signal. The current produced as +∆I and −∆I is fed into the driver buffer. • Driver Buffer operates the power Transistor of the output stage according to the state of the input signal. • The output stage is the BTL Driver and the motor is rotating in forward direction by operating transostor Q1 and Q4. On the other hand, if transistor Q2 and Q3 is operating, the motor is rotating in reverse direction. • When the input voltage through the pin #3 is below the VREF, then the direction of the motor in forward direction. • When the input voltage through the pin #3 is above the VREF, then the direction of the motor in reverse direction. • If it is desired to change the gain, then the pin #4 can be used. • When the bias voltage of the pin #23 is below 1.4V, then the output circuit is muted. Hence for the normal operation, the bias voltage should be used in 1.6V~6.5V. 7. Connect a by-pass capacitor, 0.1µF between the supply voltage source. 22 21 1. Radiation FIN is connecting to the internal GND of the package. 2. Connect the FIN to the external GND. 10 VCC1 0.1uF KA9259D FIN VCC2 FIN KA9259D(KA9259HD) Typical Perfomance Charateristics • Test contrions: VREF=2.5[V], Mute : OFF RLOAD=8[Ω] Figure 1. VCC vs. AVF Figure 2. VCC vs. ICC RLOAD=8[Ω] At mute on Figure 3. VCC vs. Imute Figure 4. VCC vs. ISINK VIN=7[V] ILOAD=100[mA] Figure 5. VCC vs. VREG RLOAD=8[Ω] Figure 6. VCC vs. VOM 11 KA9259D(KA9259HD) Test Circuits SW13 3 2 8Ω SW12 1 VCC 8Ω 3 SW14 2 8Ω 3 SW20 8Ω SW19 1 TRACKING 8Ω 3 SW21 3 2 8Ω 1 SLED CTL SW9 ~ + + 2 1 1 SW18 8Ω 1 10µF 2 + 3 2 100µF Ripple ~ ~ VCC SW10 VCC VCC 2 1 45Ω 2 + 10µF 3 20Ω SW17 3 1 SW16 SW15 VCC SW11 3 8Ω 1 2 IL 2.5V VCC VCC 28 27 26 25 24 23 GND3 DO4.2 DO4.1 DI4.2 DI4.1 22 21 VREF VCC2 20 19 18 17 16 15 VCC1 LD ctl DI3 DO3.2 DO3.1 DO5.2 DO5.1 GND DO2.1 DO2.2 GND2 DI5.2 KA9259D DO1.1 DO1.2 DI1.1 DI1.2 REB 1 2 3 4 1 MUTE 6 7 SW4 1 9 10 11 12 13 SW1 3 Mute 3 KSB772 1 + 2 IL ~ SW3 SW2 100µF Focus ~ Spindle 1 2 8Ω + 2 Loading forwaed + VCC SW7 3 SW5 8Ω 14 VCC 8Ω 1 DI5.1 DI2 8 VCC VCC 2 REO 5 3 VCC SW6 SW8 1 2 2 3 12 Loading reverse 8Ω 8Ω 8Ω 3 KA9259D(KA9259HD) Application Circuits 28 27 26 Focus Actuator TEACKING FOCUS SPINDLE 3 Servo Pre-amp 2 BIAS 1 SLED 25 4 VCC 24 5 KSB772 23 6 22 FIN FIN 21 8 VCC 20 19 11 18 REV 10 FWD 9 Controller KA9259D 7 MUTE Tracking Actuator LD CNTL M M 12 17 13 16 Spindle Motor M Sled Motor 15 14 Loading Motor 13 KA9259D(KA9259HD) Mechanical Dimensions Package Demensions in Millimeters 28-SSOPH-375 14 KA9259D(KA9259HD) 15 KA9259D(KA9259HD) DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com 6/11/03 0.0m 001 Stock#DSxxxxxxxx 2003 Fairchild Semiconductor Corporation