www.fairchildsemi.com KA9259D(KA9259ED) 5-Channel Motor Drive IC Features Description • • • • • • The KA9259D is a monolithic integrated circuit, and suitable for 5-CH motor driver which drives focus actuator, tracking actuator, sled motor, spindle motor and loading motor of CD system. 1-Phase, Full-Wave, Linear DC Motor Driver Built-in TSD (Thermal Shutdown) Circuit Built-in 5V Regulator (With An External PNP TR) Built-in Mute Circuit Built-in Loading Motor Speed Control Circuit Wide Operating Supply Voltage Range: 6V~13.2V 28-SSOPH-375 Typical Applications • • • • Compact Disk Player (CDP) Video Compact Disk Player (VCD) Automotive Compact Disk Player (CDP) Other Compact Disk Media Ordering Information Device Package Operating Temp. KA9259ED 28-SSOPH-375 -25°C ~ +75°C KA9259EDTF 28-SSOPH-375 -25°C ~ +75°C Rev. 1.0.2 ©2002 Fairchild Semiconductor Corporation 2 1 2 3 4 5 6 7 DO1.1 DO1.2 DI1.1 DI1.2 REB REO MUTE GND3 DO4.2 DO4.2 DI4.2 DI4.1 VREF VCC2 28 27 26 25 24 23 22 LD CTL DI3 DO3.2 DO3.1 DO5.2 DO5.1 20 19 18 17 16 15 8 9 10 11 12 13 14 DI2 DO2.1 DO2.2 GND2 DI5.2 FIN (GND) 21 DI5.1 KA9259D VCC1 FIN (GND) GND1 KA9259D(KA9259ED) Pin Assignments KA9259D(KA9259ED) Pin Definitions Pin Number Pin Name I/O Pin Function Description 1 DO1.1 O Focus Output 1(-) 2 DO1.2 O Focus Output 2(+) 3 DI1.1 I Focus Input 1 4 DI1.2 I Focus Input 2 (Adjustable) 5 REB O Regulator Base 6 REO O Regulator Output, 5V 7 MUTE I Mute 8 GND1 - Ground 1 9 DI5.1 I Loading Input 1 10 DI2 I Spindle Input 2 11 DO2.1 O Spindle Output (+) 12 DO2.2 O Spindle Output (-) 13 GND2 - Ground 2 14 DI5.2 I Loading Input 2 15 DO5.1 O Loading Output 1(+) 16 DO5.2 O Loading Output 2(-) 17 DO3.1 O Sled Output (-) 18 DO3.2 O Sled Output (+) 19 DI3 I Sled Input 20 LD CTL I Loading Motor Speed Control 21 VCC1 - Supply Voltage 1 22 VCC2 - Supply Voltage 2 23 VREF I 2.5V Bias 24 DI4.1 I Tracking Input 1 (Adjustable) 25 DI4.2 I Tracking Input 2 26 DO4.1 O Tracking Output 1(+) 27 DO4.2 O Tracking Output 2(-) 28 GND3 - Ground 3 3 KA9259D(KA9259ED) 22 DO5.1 VCC2 23 DO5.2 VREF 24 DO3.1 DI4.1 25 DO3.2 DI4.2 26 DI3 DO4.1 27 LD CTL DO4.2 28 FIN (GND) VCC1 GND3 Internal Block Diagram 21 20 19 18 17 16 15 10k + + + 10k 10k − − + Level shift Level shift TSD − − + + + Level shift − − 10k − Regulator 10k 10k Mute + − + 10k 10k 50k Level shift − − + 2.5V 50k + COMP − Level shift + − 10k 4 DO1.2 DI1.1 DI1.2 REB REO MUTE FIN (GND) 8 9 10 11 12 13 14 DI5.2 7 GND2 6 DO2.2 5 DO2.1 4 DI2 3 DI5.1 2 GND1 1 DO1.1 10k KA9259D(KA9259ED) Equivalent Circuits Driver Input (Except For Loading Motor Driver) Driver Output 10k 2.5V 1 2 11 12 15 16 17 18 27 26 10k 20k 0.58k 10 3 4 25 19 24 VREF1 Loading Motor Driver Input Loading Motor Speed Control Input 14 9 50k 50k 50k 50k 50k 50k 50k 50k 50k 50k 50k 20 50k 50k 50k Mute Input Bias Input 50k 50k 23 7 50k 5 KA9259D(KA9259ED) Absolute Maximum Ratings (Ta = 25°C) Parameter Symbol Value Unit Maximum Supply Voltage VCC MAX 18 V Power Dissipation 1.7 PD note W Operating Temperature TOPR -25 ~ +75 °C Storage Temperature TSTG -55 ~ +150 °C Maximum Current Output IOMAX 1 A Note: 1. When mounted on 76mm × 114mm × 1.57mm PCB (Phenolic resin material). 2. Power dissipation reduces 13.6mW / °C for using above Ta=25°C 3. Do not exceed Pd and SOA. Power Dissipation Curve Pd (mW) 3,000 2,000 1,000 0 0 25 50 75 100 125 150 175 Ambient temperature, Ta [°C] Recommended Operating Condition (Ta = 25°C) Parameter Operating Supply Voltage 6 Symbol Value Unit VCC 6 ~ 13.2 V KA9259D(KA9259ED) Electrical Characteristics (Ta = 25°C, VCC = 8V, RL= 8Ω, f =1kHz, unless otherwise specified) Parameter Symbol Conditions Quiescent Circuit Current ICCQ Under no-load Mute-on Current IMUTE Pin 7=GND Min. Typ. Max. Unit 2.5 6 10 mA - 2.5 5 mA Mute-on Voltage VMON - - - 0.5 V Mute-off Voltage VMOFF - 2 - - V REGULATOR PART Output Voltage VREG IL=100mA 4.7 5.0 5.3 V Load Regulation ∆VRL3 IL=0→200mA -50 0 50 mV Line Regulation ∆VCC VCC=6→13V, IL=100mA -20 0 80 mV DRIVER PART (EXCEPT FOR LOADING MOTOR DRIVER) Input Offset Voltage Output Offset Voltage 1 VIO - -15 - 15 mV VOO1 - -40 - 40 mV 0.25 0.4 - A Maximum Sink Current 1 ISINK1 RL=8Ω→GND 0.25 0.4 - A Maximum Output Voltage 3 VOM3 VIN=0.7V, VCC=13V 2.5 3.3 4.6 V Maximum Output Voltage 4 VOM4 VIN=7V, VCC=13V, VIN=8V - -5.8 -5.0 V Closed-Loop Voltage Gain AVF VIN=8V, VCC=13V 5 6.5 8 dB *Ripple Rejection Ratio RR VIN=0.1VRMS, f=120Hz 40 60 - dB *Slew Rate SR 120Hz, VIN=1VRMS, Square wave 1 2 - V/µs Maximum Source Current 1 ISOURCE1 RL=8Ω→VCC LOADING MOTOR DRIVER PART (UNLESS OTHERWISE SPECIFIED, VCTL=OPENED) Output Voltage 1 VO1 VPIN9=5V, VPIN14=0V, RL=45Ω 2.5 3.1 3.8 V Output Voltage 2 VO2 VPIN9=0V, VPIN14=5V, RL=45Ω 2.5 3.1 3.8 V Output Voltage Regulation 1 (CTL) VOCTL1 VCTL=3.5→4.5V, VPIN9=5V VPIN14=0V, RL=45Ω 0.5 1.0 1.5 V Output Voltage Regulation 2 (CTL) VOCTL2 VCTL=3.5→4.5V, VPIN9=0V VPIN14=5V, RL=45Ω 0.5 1.0 1.5 V Load Regulation 1 ∆VRL1 IL=100→400mA, VPIN9=5V, VPIN14=0V - 300 700 mV Load Regulation 2 ∆VRL2 IL=100→400mA, VPIN9=0V, VPIN14=5V - 300 700 mV Output Offset Voltage 2 VOO2 VPIN9=5V, VPIN14=5V -40 - 40 mV Output Offset Voltage 3 VOO3 VPIN9=0V, VPIN14=0V -40 - 40 mV * Guaranteed design value 7 KA9259D(KA9259ED) Application Information 1. Mute Output driver bias Pin #7 Mute circuit High Turn-off Low Turn-on 7 • When the mute pin #7 is open or the voltage of the mute pin #7 is below 0.5V, the mute circuit is activated so that the output circuit will be muted. • When the voltage of the mute pin is above 2V, the mute circuit is stopped and the output circuit is operated normally. • If the chip temperature rises above 175°C, then the TSD (Thermal shutdown) circuit is activated and the output circuit is muted. 2. Tsd (Thermal Shutdown) VREF BG Output driver bias R11 Q11 R12 • The VREF BG is the output voltage of the band-gap-referenced biasing circuit and acts as the input voltage of the TSD circuit. • The base-emitter voltage of the TR, Q11 is designed to turn-on at below voltage. VBE = VREF BG × R12 / (R11+R12) = 400mV • When the chip temperature rises up to 175°C, then the turn-on voltage of the Q11 would drop down to 400mV. Hence, the Q11 would turn on so the output circuit will be muted. 3. Regulator 5 I VREF BG D1 KSB772 − 6 + R2 VOUT (5V) + R1 D2 8 R3 CE 100µF KA9259D(KA9259ED) • The VREF BG is the output voltage of the band-gap-referenced biasing circuit and is the reference voltage of the regulator. • The external circuit is composed of the transistor, KSB772 and a capacitor, 100µF, and the capacitor is used as a ripple eliminator and should have a good temperature characteristics. • The output voltage, VOUT is decided as follows. VOUT = VREF BG × 2 = 2.5 × 2 = 5V (R2 = R3) R2 = R3 4. Loading Motor Driver 20 I +∆V + + 14 − − R COMP 9 Buffer Q1 −∆V +∆V 15 I −∆V Q2 M VREF1 + 16 Q3 Buffer Q4 − R VREF1 • The input voltages of (5V and 0V) or (0V and 5V) pairs are applied to the input pin #9 and #14 respectively. • When the input voltages are applied to the input pin #9 and #14, then the output of the comparator is decided depends on the input voltage status. • As shown in the above diagram, the difference ∆V, [VREF1 + (I × R)] - [VREF1 -(I × R)], is applied to the both terminals of the motor. The direction of the motor is decided by the voltage difference, +∆V and −∆V. • The output characteristics is as follows, - If pin # 9=5V and #14=0V, then pin # 15=+∆V and #16= −∆V, hence the motor turn in forward direction. - If pin # 9=0V and #14=5V, then pin # 15= −∆V and #16=+∆V, hence the motor turn in reverse direction. - If pin # 9=5V and #14=5V, then ∆V=0V, hence the motor stop. - If pin # 9=0V and #14=0V, then ∆V=0V, hence the motor stop. • When the rotation speed control of the loading motor is desired, refer to the follows. 5. Loading Motor Speed Control VCC VCC (8V) 50k 50k R 20 R 20 4V 4V 50k • • • • VCC VCC (8V) 50k D If the torque of the loading motor is too low when it is used with the pin #20 open, then it should used as the above diagram. The desired torque could be obtained by selecting the appropriate resistor R as shown in the left diagram. If it is necessary, the zener diode can be used as in the right diagram. The maximum torque is obtained when the applied voltage at pin #20 is about 6.8V (at VCC=8V). 9 KA9259D(KA9259ED) 6. Driver (Except For Loading Motor Driver) VREF (2.5V) + − 3 −∆I AMP Level shift + Buffer − Q1 10k 24 10k +∆I 100k +∆V Q2 M 19 25 4 −∆V 10 + Q3 Buffer − 1 2 11 12 17 18 27 26 Q4 • The voltage, VREF, is the reference voltage given by the bias voltage of the pin #23. • The input signal through the pin #3 is amplified by 10k/10k times and then fed to the level shift. • The level shift produces the current due to the difference between the input signal and the arbitrary reference signal. The current produced as +∆I and −∆I is fed into the driver buffer. • Driver Buffer operates the power Transistor of the output stage according to the state of the input signal. • The output stage is the BTL Driver and the motor is rotating in forward direction by operating TR Q1 and TR Q4. On the other hand, if TR Q2 and TR Q3 is operating, the motor is rotating in reverse direction. • When the input voltage through the pin #3 is below the VREF, then the direction of the motor in forward direction. • When the input voltage through the pin #3 is above the VREF, then the direction of the motor in reverse direction. • If it is desired to change the gain, then the pin #4 or #24 can be used. When the bias voltage of the pin #23 is below 1.4V, then the output circuit is muted. Hence for the normal operation, the bias voltage should be used in 1.6V~6.5V. 7. Connect a by-pass capacitor, 0.1µf between the supply voltage source. VCC2 22 VCC1 21 104 1. Radiation fin is connecting to the internal GND of the package. 2. Connect the fin to the external GND. 10 KA9259D(KA9259ED) Typical Perfomance Charateristics 7 14 6 12 5 Icc[mA] 16 Imute [mA] 10 8 Imute[mA] 6 Vcc=vari pin23=2.5 4 2 4 3 2 Vcc=vari 1 0 0 4 6 8 10 Vcc[v] 12 14 16 18 4 20 6 8 10 12 14 16 18 20 Vcc[V] Figure 2. VCC vs. Imute Figure 1. VCC vs. ICC 1000 6.0 900 5.5 800 Isink[mA] Vreg[V] 5.0 4.5 Vcc=vari pin23=2.5 RL=8Ω 4.0 3.5 700 600 Vcc=vari pin23=2.5 RL=8Ω 500 400 300 3.0 3 5 7 Vcc[V] 9 11 13 4 15 6 8 Vcc[V] 10 12 14 16 Figure 4. VCC vs. ISink Figure 3. VCC vs. Vreg 4.5 7.0 4.0 6.5 3.5 Vom[mA] Avf[mA] 7.5 3.0 6.0 Vcc=vari pin23=2.5 5.5 Vcc=vari 2.5 pin23=2.5 RL=8Ω 2.0 5.0 4 6 8 Vcc[V] 10 Figure 5. VCC vs. Avf 12 14 16 4 6 8 Vcc[V] 10 12 14 16 Figure 6. VCC vs. Vom 11 KA9259D(KA9259ED) Test Circuits SW13 3 2 8Ω 1 SW12 VCC 8Ω 3 SW14 2 8Ω 3 SW20 1 SW10 3 8Ω 1 VCC VCC 2 8Ω SW19 1 ~ VCC SLED CTL 100µF Ripple ~ SW9 ~ VCC + 8Ω 3 2 TRACKING SW21 3 2 + 2 1 1 SW18 8Ω 1 10µF 2 + 45Ω 2 + 10µF 3 20Ω SW17 3 1 SW16 SW15 SW11 3 8Ω 1 2 IL 2.5V VCC VCC 28 27 26 25 24 23 22 21 GND3 DO4.2 DO4.1 DI4.2 DI4.1 VREF VCC2 20 19 18 17 16 15 VCC1 LD ctl DI3 DO3.2 DO3.1 DO5.2 DO5.1 GND DO2.1 DO2.2 GND2 DI5.2 KA9259D DO1.1 DO1.2 DI1.1 DI1.2 REB 1 2 3 4 6 MUTE 7 9 10 11 12 13 14 VCC SW4 1 SW1 2 Mute 3 KSB772 1 8Ω 3 + 2 8Ω VCC SW2 Focus Spindle 3 Loading reverse 8Ω VCC ~ 100µF 1 2 8Ω + 2 Loading forwaed IL ~ SW3 SW7 3 SW5 + 1 DI5.1 DI2 8 VCC VCC 1 REO 5 SW6 SW8 1 2 2 3 12 8Ω 8Ω 3 KA9259D(KA9259ED) Application Circuits SERVO PRE-AMP FOUCS TRACKING BIAS CONTROLLER SLED SPINDLE TRACKING ACTUATOR CONTROL FORWARD VCC REVERSE SLED MOTOR LOADING MOTOR M M 102 28 27 26 25 GND3 DO4.2 DO4.1 DI4.2 24 23 22 21 DI4.1 VREF VCC2 20 19 18 17 16 15 VCC1 LD ctl DI3 DO3.2 DO3.1 DO5.2 DO5.1 GND DI5.1 DI2 8 9 10 KA9259D DO1.1 DO1.2 DI1.1 DI1.2 1 2 3 4 REB REO 5 6 MUTE 7 DO2.1 DO2.2 GND2 DI5.2 11 12 13 14 VCC KSB772 FOCUS ACTUATOR 100µF 5V out + M MUTE Low: ON High: OFF SPINDLE MOTOR 13 KA9259D(KA9259ED) Mechanical Dimensions Package 28-SSOPH-375 MIN 0.05 0.002 2.20 ±0.20 0.087 ±0.008 #28 #14 #15 10.00 ±0.30 0.394 ±0.012 14 0.40 ±0.10 0.016 ±0.004 0.80 0.031 MAX0.10 MAX0.004 0~ 8° +0.10 0.25 -0.05 +0.004 0.010 -0.002 0.80 ±0.20 0.031 ±0.008 2.50 MAX 0.098 7.50 ±0.20 0.295 ±0.008 9.53 0.375 18.40 ±0.20 0.724 ±0.008 18.80 MAX 0.740 ( 1.20 ) 0.047 #1 KA9259D(KA9259ED) 15 KA9259D(KA9259ED) DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com 9/13/02 0.0m 001 Stock#DSxxxxxxxx 2002 Fairchild Semiconductor Corporation