Revised June 2005 74LVT16245 • 74LVTH16245 Low Voltage 16-Bit Transceiver with 3-STATE Outputs General Description Features The LVT16245 and LVTH16245 contain sixteen non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. Each byte has separate control inputs which can be shorted together for full 16-bit operation. The T/R inputs determine the direction of data flow through the device. The OE inputs disable both the A and B ports by placing them in a high impedance state. ■ Input and output interface capability to systems at 5V VCC The LVTH16245 data inputs include bushold, eliminating the need for external pull-up resistors to hold unused inputs. These non-inverting transceivers are designed for low-voltage (3.3V) VCC applications, but with the capability to provide a TTL interface to a 5V environment. The LVT16245 and LVTH16245 are fabricated with an advanced BiCMOS technology to achieve high speed operation similar to 5V ABT while maintaining low power dissipation. ■ Bushold data inputs eliminate the need for external pull-up resistors to hold unused inputs (74LVTH16245), also available without bushold feature (74LVT16245). ■ Live insertion/extraction permitted ■ Power Up/Down high impedance provides glitch-free bus loading ■ Outputs source/sink 32 mA/64 mA ■ Functionally compatible with the 74 series 16245 ■ Latch-up performance exceeds 500 mA ■ ESD performance: Human-body model !2000V Machine model !200V Charged-device !1000V ■ Also packaged in plastic Fine-Pitch Ball Grid Array (FBGA) (Preliminary) Ordering Code: Order Number 74LVT16245GX (Note 1) Package Number BGA54A (Preliminary) Package Description 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide [Tape and Reel] 74LVT16245MEA (Note 2) MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide 74LVT16245MTD (Note 2) MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide 74LVTH16245GX (Note 1) BGA54A (Preliminary) 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide [Tape and Reel] 74LVTH16245MEA (Note 2) MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide 74LVTH16245MTD (Note 2) MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Note 1: BGA package available in Tape and Reel only. Note 2: Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbol © 2005 Fairchild Semiconductor Corporation DS500152 www.fairchildsemi.com 74LVT16245 • 74LVTH16245 Low Voltage 16-Bit Transceiver with 3-STATE Outputs January 1999 74LVT16245 • 74LVTH16245 Connection Diagrams Pin Descriptions Pin Assignment for SSOP and TSSOP Pin Names Description OEn Output Enable Input (Active LOW) T/Rn Transmit/Receive Input A0–A15 Side A Inputs/3-STATE Outputs B0–B15 Side B Inputs/3-STATE Outputs NC No Connect FBGA Pin Assignments 1 2 3 4 5 6 A B0 NC T/R1 OE1 NC A0 B B2 B1 NC NC A1 A2 C B4 B3 VCC VCC A3 A4 D B6 B5 GND GND A5 A6 E B8 B7 GND GND A7 A8 F B10 B9 GND GND A9 A10 G B12 B11 VCC VCC A11 A12 H B14 B13 NC NC A13 A14 J B15 NC T/R2 OE2 NC A15 Truth Tables Inputs Pin Assignment for FBGA OE1 T/R1 Outputs L L Bus B0–B7 Data to Bus A0–A7 L H Bus A0–A7 Data to Bus B0–B7 H X HIGH–Z State on A0–A7,B0–B7 Inputs OE2 2 Outputs L L Bus B8–B15 Data to Bus A8–A15 L H Bus A8–A15 Data to Bus B8–B15 H X HIGH–Z State on A8–A15,B8–B15 H HIGH Voltage Level L LOW Voltage Level X Immaterial Z High Impedance (Top Thru View) www.fairchildsemi.com T/R2 The LVT16245 and LVTH16245 contain sixteen non-inverting bidirectional buffers with 3-STATE outputs. The device is byte controlled with each byte functioning identically, but independent of the other. The control pins can be shorted together to obtain full 16-bit operation. Logic Diagrams Note: Please note that these diagrams are provided only for the understanding of logic operations and should not be used to estimate propagation delays. 3 www.fairchildsemi.com 74LVT16245 • 74LVTH16245 Functional Description 74LVT16245 • 74LVTH16245 Absolute Maximum Ratings(Note 3) Symbol Parameter VCC Supply Voltage VI DC Input Voltage VO Output Voltage IIK DC Input Diode Current IOK DC Output Diode Current IO DC Output Current Value Conditions 0.5 to 4.6 0.5 to 7.0 0.5 to 7.0 0.5 to 7.0 50 50 ICC DC Supply Current per Supply Pin IGND DC Ground Current per Ground Pin TSTG Storage Temperature Range Units V V Output in 3-STATE V Output in HIGH or LOW State (Note 4) VI GND mA VO GND mA 64 Output at HIGH State, VO ! VCC 128 Output at LOW State, VO ! VCC mA r64 r128 65 to 150 mA mA qC Recommended Operating Conditions Symbol Parameter VCC Supply Voltage VI Input Voltage Min Max 2.7 3.6 Units V 0 5.5 V IOH HIGH-Level Output Current 32 mA IOL LOW-Level Output Current 64 mA TA Free-Air Operating Temperature 't/'V Input Edge Rate, VIN 0.8V–2.0V, VCC 3.0V 40 85 qC 0 10 ns/V Note 3: Absolute Maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum rated conditions is not implied. Note 4: IO Absolute Maximum Ratings must be observed. DC Electrical Characteristics Symbol VIK Input Clamp Diode Voltage TA VCC Parameter (V) 40qC to 85qC Min VIH Input HIGH Voltage 2.7–3.6 VIL Input LOW Voltage 2.7–3.6 VOH Output HIGH Voltage 2.7–3.6 VCC 0.2 2.7 2.4 3.0 2.0 VOL II(HOLD) Output LOW Voltage Bushold Input Over-Drive (Note 5) Current to Change State II Input Current Data Pins Power Off Leakage Current IPU/PD Power Up/Down 3-STATE Output Current Units II V VO d 0.1V or V VO t VCC 0.1V V 2.7 0.5 3.0 0.4 3.0 3.0 Conditions 18 mA V 0.2 IOH 100 PA IOH 8 mA IOH 32 mA IOL 100 PA IOL 24 mA IOL 16 mA 0.5 IOL 32 mA 0.55 IOL 75 V PA 75 500 3.0 Control Pins IOFF 0.8 3.0 (Note 5) II(OD) 2.0 2.7 Bushold Input Minimum Drive Max 1.2 2.7 PA 500 64 mA VI 0.8V VI 2.0V (Note 6) (Note 7) 3.6 10 VI 5.5V 3.6 r1 VI 0V or VCC VI 0V VI VCC 5 3.6 PA 1 0 r100 PA 0–1.5 r100 PA 0V d VI or VO d 5.5V VO VI 0.5V to 3.0V GND or VCC IOZL 3-STATE Output Leakage Current 3.6 5 PA VO 0.5V IOZL 3-STATE Output Leakage Current 3.6 5 PA VO 0.0V (Note 5) www.fairchildsemi.com 4 Symbol 74LVT16245 • 74LVTH16245 DC Electrical Characteristics (Continued) VCC Parameter TA (V) 40qC to 85qC Min Units Conditions Max IOZH 3-STATE Output Leakage Current 3.6 5 PA VO 3.0V IOZH 3-STATE Output Leakage Current 3.6 5 PA VO 3.6V (Note 5) IOZH 3-STATE Output Leakage Current 3.6 10 PA VCC VO d 5.5V ICCH Power Supply Current 3.6 0.19 mA Outputs HIGH ICCL Power Supply Current 3.6 5.0 mA Outputs LOW ICCZ Power Supply Current 3.6 0.19 mA Outputs Disabled ICCZ Power Supply Current 3.6 0.19 mA VCC d VO d 5.5V, Outputs Disabled 'ICC Increase in Power Supply Current 3.6 0.2 One Input at VCC 0.6V mA Other Inputs at VCC or GND (Note 8) Note 5: Applies to bushold versions only (74LVTH16245). Note 6: An external driver must source at least the specified current to switch from LOW-to-HIGH. Note 7: An external driver must sink at least the specified current to switch from HIGH-to-LOW. Note 8: This is the increase in supply current for each input that is at the specified voltage level rather than VCC or GND. Dynamic Switching Characteristics Symbol (Note 9) VCC Parameter (V) 25qC TA Min Typ Conditions Units Max CL 500: 50 pF, RL VOLP Quiet Output Maximum Dynamic VOL 3.3 0.8 V (Note 10) VOLV Quiet Output Minimum Dynamic VOL 3.3 0.8 V (Note 10) Note 9: Characterized in SSOP package. Guaranteed parameter, but not tested. Note 10: Max number of outputs defined as (n). n1 data inputs are driven 0V to 3V. Output under test held LOW. AC Electrical Characteristics TA Symbol tPLH CL Parameter 3.3V r 0.3V Min Max Min Max 1.5 3.5 1.5 3.9 1.3 3.5 1.3 3.9 1.5 4.5 1.5 5.3 1.6 5.3 1.6 6.9 2.3 5.4 2.3 6.1 2.2 5.1 2.2 5.4 Propagation Delay Data to Output Output Enable Time tPZL tPHZ Output Disable Time tPLZ tOSHL Output to Output Skew tOSLH (Note 11) 500: VCC tPHL tPZH 40qC to 85qC 50 pF, RL VCC 1.0 2.7V Units ns ns ns 1.0 ns Note 11: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH). Parameter guaranteed by design. Capacitance Symbol (Note 12) Parameter Conditions CIN Input Capacitance VCC 0V, VI CI/O Input/Output Capacitance VCC 3.0V, VO Note 12: Capacitance is measured at frequency f 0V or VCC 0V or VCC Typical Units 4 pF 8 pF 1 MHz, per MIL-STD-883, Method 3012. 5 www.fairchildsemi.com 74LVT16245 • 74LVTH16245 Physical Dimensions inches (millimeters) unless otherwise noted 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide Package Number BGA54A Preliminary www.fairchildsemi.com 6 74LVT16245 • 74LVTH16245 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide Package Number MS48A 7 www.fairchildsemi.com 74LVT16245 • 74LVTH16245 Low Voltage 16-Bit Transceiver with 3-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Package Number MTD48 Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com www.fairchildsemi.com 8