TA1343N TOSHIBA Bipolar Linear IC Silicon Monolithic TA1343N TV Sound Processor TA1343N is a sound processor controlled by I2C bus. It incorporates the following: 2-channel input, 3-channel output signal processing circuit, phase shift circuit for surround, and LPF for woofer channel. ALS (Automatic Level Suppresser) circuit which prevents distort the signal in large signal condition for woofer channel is also incorporated Features · Sound processing circuit · 2 ch inputs (Lch, Rch) Weight: 1.22 g (typ.) · 3 ch outputs (Lch, Rch, Wch) · Input matrix switch · Volume control · Bass, treble, and balance adjustment · Woofer level and surround effect level adjustment · ALS (automatic level suppresser) circuit · Built-in LPF for bass boost · Surround circuit · Phase shift surround system · 2 modes stereo surround · Pseudo stereo mode 1 2002-02-12 TA1343N 20 19 Level Control DAC 16 ALS SW Woofer Level Control Bias Reg. Input matrix 2 8 Rch Input 7 GND 6 Lch Input 5 B1 4 B2 B3 B4 O.C. 3 Rch Output + 9 Bias Filter - Bass& Treble Control 0dB /-5dB Bass boost SW - Phase sifter 2 13 + Bass& Treble Control 0dB /-5dB L-R Level Control f 1 14 + L.P.F 4f 15 Treble HPF (L) Bass LPF (L) Lch Output Woofer LPF1 17 AGC Det + L.P.F 18 10 11 12 Wch Output 2 I C bus interfaxe Woofer LPF2 Woofer LPF3 VCC (9 V) 21 Volume&Balance Control 22 Treble HPF (R) 23 Bass LPF (R) 24 Volume Filter Woofer Filter SCL SDA Block Diagram 2002-02-12 TA1343N Terminal Function Pin No. Name Function Interface Circuit DC offset canceling filter for bass boost. 1 Offset canceling filter 1 Connect a capacitor (10 mF) between this terminal and GND. 1 k9 20 30 kW 100 W 7 20 f4 3 f3 4 f2 5 f1 Terminals for capacitors of the phase shift blocks. 2 3 4 5 Value of phase shift each block is -1 f deg. = -2tan (2 p fCR) C is capacitance of external capacitor R is resistance of internal resister (10 k W (typ.)). 100 W 10 k9 2 7 20 24 kW 8 Rch Input 6 8 24 kW 4.5 V Audio input terminals. 56 k9 Lch Input 56 k9 6 7 7 GND GND terminals. 20 Filter for noise rejection of the bias. 9 Bias Filter Connect a capacitor (4.7 mF) between this terminal and GND. 9 7 3 2002-02-12 TA1343N Pin No. Name Function Interface Circuit 20 15 Bass LPF (L) LPFs for bass control circuits. Connect capacitors (0.027 mF) between each terminals and GND. 100 W 10 15 22 kW 4.5 V Bass LPF (R) 22 k9 10 7 20 14 Treble HPF (L) HPFs for treble control circuits. Connect capacitors (8200 pF) between each terminals and GND. 11 14 11 kW 22 kW 22 k9 Treble HPF (R) 7 Wch Output 13 Rch Output 16 Lch Output 12 13 16 Audio output terminal. 100 W 1 mA 12 100 9 20 4.5 V 11 7 20 LPFs for bass boost circuit. 17 Woofer LPF 1 18 Woofer LPF 2 19 Woofer LPF 3 Connect a capacitor (0.033 mF) between terminal 17 and GND. Connect a capacitor (0.047 mF) between terminal 18 and GND. 17 18 19 2 kW Connect a capacitor (0.022 mF) between terminal 19 and GND. 7 VCC terminal. 20 VCC Recommended operation voltage is 9 V ±10%. 4 2002-02-12 TA1343N Pin No. Name Function Interface Circuit 20 I2C Bus Control Smoothing filter for volume control. 21 Volume Filter 21 Connect a capacitor (0.01 mF) between this terminal and GND. 7 20 I2C Bus Control Smoothing filter for bass boost level control. 22 Woofer Filter Connect a capacitor (3.3 mF) between this terminal and GND. 22 This filter is also for ALS circuit. 7 20 SCL SCL terminal. 23 2.3 V 23 7 20 SDA SDA terminal. 24 2.3 V 24 7 5 2002-02-12 TA1343N 2 I C Bus Control Data Table Slave Address: 80 (h) Address Map Sub MSB (b7) Address b6 b5 b4 b3 b2 b1 LSB (b0) Default Data 00 Bass level (effective data range: 0E (h) to 72 (h)) 40 (h) (Bass: Center) 01 Treble level (effective data range: 0E (h) to 72 (h)) 40 (h) (Treble: Center) 02 Volume (effective data range: 00 (h) to 72 (h)) 00 (h) (Volume: min) ALS SW “0”: OFF “1”: ON 03 04 ALS start point “00”: 220 mV “01”: 380 mV “10”: 525 mV “11”: 770 mV Woofer level 05 Input attenuati on “0”: 0dB “1”: -5dB Input matrix “00”: Normal “01”: Rch “10”: Lch “11”: Reverse (effective data range: 00 (h) to 72 (h)) 00 (h) (Woofer level: min) Balance (effective data range: 00 (h) to 7F (h)) 06 Surround mode 2 “0”: Ste. “1”: Mono. 07 Bass boost SW “0”: OFF “1”: ON 40 (h) (Balance: Center) Surround effect level (effective data range 1 (h) to 7 (h)) 0 (h): OFF Surround mode 1 “0”: f “1”: 4 f Woofer LPF fo “00”: 100 Hz “01”: 125 Hz “10”: 170 Hz “11”: 210 Hz Woofer LPF defeat “0”: OFF “1”: ON Muting 2 “0”: OFF “1”: ON 00 (h) (ALS SW: OFF ALS start point: 220 mV Input attenuation: 0dB Input matrix: Normal) Muting 1 “0”: OFF “1”: ON C0 (h) (Surround mode 1: 4 f Surround mode 2: Mono. Surround effect level: OFF) 10 (h) Bass boost SW: OFF Woofer LPF fo: 125 Hz Muting 1: OFF Muting 2: OFF The bits shown gray area must be “0”. 6 2002-02-12 TA1343N Block Diagram 10 kW Surround mode 2 Input matrix Lch Input Phase Sifter 6 + Surround mode 1 + 4f - f - 8 Level Control DAC Woofer Level Control L.P.F B4 2 B3 3 Bass Treble Control 0dB /-5dB Volume&Balance Control Muting 2 4 B2 B1 5 Bass Treble Control 0dB /-5dB AGC Det 16 Lch Output + 13 Rch Output 12 Wch Output Bass boost SW 15 14 21 Muting 1 Volume Filter Treble HPF (R) 11 Treble HPF (L) 10 + Level Control DAC Bass LPF (L) ALS SW Bass LPF (R) 22 Woofer Filter 1 O.C. Woofer LPF3 Woofer LPF2 17 18 19 Woofer LPF1 Rch Input L-R Level Control LPF The on/off status of each switches drawn on this scheme shows 2 the default setting of I C bus control. 7 2002-02-12 TA1343N Explanation of the Functions. (note: (h) means hexadecimal data, (b) means binary data) · Bass level control (sub address 00 (h)) Bass level control. Crossover frequency is 1 kHz. Effective control data range is 0E (h) to 72 (h) (100 steps). Set this data to 0E (h), bass level goes to minimum level, and set this data to 72 (h), bass level goes to maximum level. Set this data to 40 (h), bass level goes to center level. Switch on default data is 40 (h). Control range is ±12dB (typ.). · Treble level control (sub address 01 (h)) Treble level control. Crossover frequency is 1 kHz. Effective control data range is 0E (h) to 72 (h) (100 steps). Set this data to 0E (h), treble level goes to minimum level, and set this data to 72 (h), treble level goes to maximum level. Set this data to 40 (h), treble level goes to center level. Switch on default data is 40 (h). Control range is ±12dB (typ.). · Volume control (sub address 02 (h)) Volume control of only Lch and Rch output. Effective control data range is 00 (h) to 72 (h). Switch on default data is 00 (h). · Woofer level control (sub address 04 (h)) Volume control of only Wch output. Effective control data range is 00 (h) to 72 (h). Switch on default data is 00 (h). · Balance control (sub address 05 (h)) Balance control. Set this data to 40 (h), balance goes to center. Effective control data range is 00 (h) to 7F (h). Switch on default data is 40 (h). · Surround effect level control (sub address 06 (h)/b2 to b0) Surround effect level control. Effective control data range is 1 (h) to 7 (h). Set this data to 0 (h), surround function is off. Recommend setting surround 2 data to 1 (b) when surround effect level set to “0”. Set mute on when surround effect level is changed. Switch on default data is 0 (h). · Input matrix switch (sub address 03 (h)/b1 to b0) Output signal selection control. Set these bits to 00 (b), output mode goes to normal mode (input signal of terminal 6 is outputted to terminal 16, and input signal of terminal 8 is outputted to terminal 13). Set these bits to 01 (b) output mode goes to Rch mode (input signal of terminal 8 is outputted to terminal 13 and terminal 16). Set these bits to 10 (b) output mode goes to Lch mode (input signal of terminal 6 is outputted to terminal 13 and terminal 16). Set these bits to 11 (b), output mode goes to reverse mode (input signal of terminal 6 is outputted to terminal 13, and input signal of terminal 8 is outputted to terminal 16). Switch on default data is 00 (b). · Input attenuation (sub address 03 (h)/b2) When this function is active, input signals are -5dB attenuated at input stage of Lch and Rch. Wch signal isn’t attenuated. So, Wch output signal level is up to 5dB from Lch and Rch outputs relatively. Set the bit to 0 (b), attenuation is inactive, set the bit to 1 (b), attenuation is active. Switch on default data is 0 (b). 8 2002-02-12 TA1343N · ALS switch (sub address 03 (h)/b6), ALS start point (sub address 03 (h)/b5 to b4) Gain of Wch is large. So output signals of Wch is distort easily when the input signals are large. ALS (Automatic Level Suppresser) suppresses Wch signal level under ALS start point, and reduces the distortion in large signals input condition. Set the bit of sub address 03 (h)/b6 to 0 (b), ALS is inactive. Set the bit 1 to (b), ALS is active. Switch on default data is 0 (b). The bits of 03 (h)/b5 to b4 set ALS start point. Set the bits to 00 (b), ALS start point is 220 mVrms. Set the bits to 01 (b), ALS start point is 380 mVrms. Set the bits to 10 (b), ALS start point is 525 mVrms. And set the bits to 11 (b), ALS start point is 770 mVrms. Switch on default data is 00 (b). · Surround mode 1 (sub address 06 (h)/b6), Surround mode 2 (sub address 06 (h)/b7) Surround mode 1 is selection of phase shift value of the surround circuit. Set the bit to 0 (b), L-R signal is shifted by 1 phase shift stage. Set the bit to 1 (b), L-R signal is shifted by 4 phase shift stages. Surround mode 2 is selected by condition of the input signal. When input signal is stereo, surround mode 2 must be set to 0 (b). When input signal is monaural, surround mode 2 must be set to 1 (b) (pseudo stereo mode). Recommend setting surround 1 to 1 (b) when pseudo stereo mode is selected. · Mute 1 (sub address 07 (h)/b0), Mute 2 (sub address 07 (h)/b1) When Mute 1 is active, all outputs are muted. Set the bit to 0 (b), mute 1 is inactive. Set the bit to 1 (b), Mute 1 is active. Switch on default data is 0 (b). When Mute 2 is active, only Wch output is muted. Set the bit to 0 (b), Mute 2 is inactive. Set the bit to 1 (b), Mute 2 is active. Switch on default data is 0 (b). · Woofer LPF fo (sub address 07 (h)/b5 to b4) These bits set cut off frequency (fo) of the low pass filter for Wch. Set the bits to 00 (b), fo is 100 Hz (-3dB point). Set the bits to 01 (b), fo is 125 Hz. Set the bits to 10 (b), fo is 170 Hz. Set the bits to 11 (b), fo is 210 Hz. Switch on default data is 01 (h). · Woofer LPF defeat (sub address 07 (h)/b3) Set the bit to 1 (b), Woofer LPF is defeated. This function is for device test. So, this bit must be set to 0 (b). Switch on default data is 0 (b). · Bass boost switch (sub address 07 (h)/b7) Bass boost function is adding Wch signal to main channel signals. It can boost low frequency signal without woofer output. Set the bit 0 (b), Bass boost is inactive. Set the bit 1 (b), bass boost is active. Switch on default data is 0 (b). Purchase of TOSHIBA I2C components conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as define by Philips. 9 2002-02-12 TA1343N Maximum Ratings (Ta = 25°C) Characteristics Symbol Rating Unit VCC 12 V Power dissipation PD 1400 Operating temperature Topr -20 to 75 °C Supply voltage (Note 1) mW Tstg -55 to 150 °C Maximum input voltage VMAX VCC + 0.3 V Minimum input voltage VMIN VCC - 0.3 V Storage temperature Note 1: When using the device at Ta = 25°C, decrease the power dissipation by 11.2 mW for each increase of 1°C Recommended Supply Voltage Pin No. Pin Name Min Typ. Max Unit 20 VCC 8.1 9.0 9.9 V Electrical Characteristics DC Characteristics (VCC = 9 V, Ta = 25°C) Characteristics Pin No. Power dissipation 20 VCC 1 Pin voltage Pin Name Symbol Test Circuit Min Typ. Max Unit ICC 39 50 63 mA Offset canceling filter V1 4.0 4.5 5.0 2 f4 V2 4.0 4.5 5.0 3 f3 V3 4.0 4.5 5.0 4 f2 V4 4.0 4.5 5.0 5 f1 V5 4.0 4.5 5.0 6 Lch Input V6 4.0 4.5 5.0 8 Rch Input V8 4.0 4.5 5.0 9 Bias Filter V9 5.2 5.7 6.2 10 Bass LPF (R) V10 4.0 4.5 5.0 11 Treble LPF (R) V11 4.0 4.5 5.0 12 Wch Output V12 4.0 4.5 5.0 13 Rch Output V13 4.0 4.5 5.0 14 Treble LPF (L) V14 4.0 4.5 5.0 15 Bass LPF (L) V15 4.0 4.5 5.0 16 Lch Output V16 4.0 4.5 5.0 17 Woofer LPF1 V17 4.6 5.1 5.6 18 Woofer LPF2 V18 4.6 5.1 5.6 19 Woofer LPF3 V19 4.6 5.1 5.6 21 Volume Filter V21 ¾ 0.0 ¾ 22 Woofer Filter V22 0.5 1.5 2.0 1 10 Test Condition In power on default V 2002-02-12 TA1343N AC Characteristics (VCC = 9 V, Ta = 25°C) Characteristics Gain THD S/N Residual noise Symbol Test Circuit Go L ¾ Go R ¾ GoAtt L ¾ GoAtt R ¾ GoBst L ¾ GoBst R ¾ Go W ¾ THD L ¾ THD R ¾ THD W ¾ SN L ¾ SN R ¾ SN W ¾ vNO L ¾ vNO R ¾ vNO W ¾ Go100 L ¾ Go100 R ¾ Go10k L ¾ Go10k R ¾ Go10k S LPF frequency response Surround sound gain Surround sound phase Balance center Balance minimum Bass maximum Bass minimum Treble maximum Treble minimum Volume center (Note 1) (Note 2) Min Typ. Max 0.0 2.0 4.0 -7.0 -5.0 -3.0 11.0 13.0 15.0 16.0 19.0 22.0 ¾ Unit dB 0.03 1.0 % ¾ dB 0.25 70 74 (Note 3) 68 72 (Note 4) ¾ 20 50 µVrms (Note 5) -2.0 0.0 2.0 dB -2.0 0.0 2.0 ¾ -13.0 -11.0 -8.0 GLPF100 ¾ 4.0 6.0 8.0 GLPF125 ¾ 5.5 7.5 9.5 GLPF170 ¾ 4.0 6.0 8.0 GLPF210 ¾ 1.0 8.0 15.0 GS ¾ (Note 8) 1.5 3.5 5.5 dB Ph 4 f ¾ (Note 9) -65 -110 -65 deg. (Note 10) -2.0 0.0 2.0 dB (Note 11) ¾ -70 -60 dB (Note 12) 9 12 14 dB (Note 13) -14 -12 -9 dB (Note 14) 9 12 14 dB (Note 15) -14 -12 -9 dB (Note 16) -17 -15 -12 dB Frequency response (100 Hz) Frequency response (10 kHz) Test Condition DGLR ¾ GBLMIN L ¾ GBLMIN R ¾ GBSMAX L ¾ GBSMAX R ¾ GBSMIN L ¾ GBSMIN R ¾ GTRMAX L ¾ GTRMAX R ¾ GTRMIN L ¾ GTRMIN R ¾ GVLCNT L ¾ GVLCNT R ¾ GVLCNT W ¾ (Note 6) dB (Note 7) 11 dB 2002-02-12 TA1343N Characteristics Volume minimum Symbol Test Circuit GVLMIN L ¾ GVLMIN R ¾ GVLMIN W ¾ GWLCNT ¾ ALS start point 0 vALS0 ¾ ALS start point 1 vALS1 ¾ ALS start point 2 vALS2 ¾ ALS start point 3 vALS3 ¾ CTL-R ¾ CTR-L ¾ RR1 L ¾ RR1 R ¾ RR1 W ¾ RR2 L ¾ RR2 R ¾ RR2 W Woofer level center Cross talk Ripple rejection (volume minimum) Output dynamic range (Note 17) ¾ -77 -65 dB (Note 18) -9.5 -7.5 -5.5 dB 185 220 255 mVrms 325 380 430 mVrms 460 525 585 mVrms 655 770 880 mVrms (Note 20) ¾ -82 -72 dB (Note 21) ¾ -30 dB (Note 19) -48 -53 ¾ -32 -25 vDOUT L ¾ 6.0 6.7 vDOUT R ¾ 5.5 6.3 vDOUT W ¾ 6.0 6.7 5.5 7.5 ¾ vDIN W ¾ DVM L ¾ DVM R ¾ DVM W ¾ DC offset DVS L ¾ (surround switch) DVS R ¾ GMUT L ¾ GMUT R ¾ GMUT W ¾ Mute residual level Unit ¾ ¾ (muting) Max -30 vDIN L DC offset Typ. -42 vDIN R Input dynamic range Min ¾ Ripple rejection (volume maximum) Test Condition (Note 22) (Note 23) (Note 24) ¾ ¾ dB Vp-p Vp-p 3.0 4.5 ¾ (Note 25) ¾ ¾ ±380 mV (Note 26) ¾ ¾ ±50 mV (Note 27) ¾ -90 -70 dB 12 2002-02-12 TA1343N Test Condition Test Condition Note 1 2 Bus Data (hexadecimal) Input Point Meas. Point 00 01 02 03 04 05 06 07 TP6 TP12 40 40 72 00 72 40 C0 10 TP8 TP13 / / TP16 04 90 TP6 TP12 TP8 TP13 SW1 40 40 72 00 72 40 C0 10 (a) (a) TP16 3 TP6 TP12 TP8 TP13 40 40 72 00 72 40 C0 10 (a) TP16 4 ¾ TP12 40 40 00 00 00 40 C0 TP13 TP16 13 10 (a) · Set data of sub address 03 (h) to 00 (h) and set data of sub address 07 (h) to 10 (h). · Input signal (1 kHz, 500 mVrms, sine wave) to TP6 and TP8. · Measure amplitude of T13 and TP16 (v131 mVrms, v161 mVrms). · Go RdB = 20log (v131/500) Go LdB = 20log (v161/500) · Set data of sub address 03 (h) to 04 (h). · Measure amplitude of T13 and TP16 (v132 mVrms, v162 mVrms). · GoAtt RdB = 20log (v132/v131) GoAtt LdB = 20log (v162/v161) · Set data of sub address 03 (h) to 00 (h) and set data of sub address 07 (h) to 10 (h). · Input signal (80 Hz, 100 mVrms, sine wave) to TP6 and TP8. · Measure amplitude of T13 and TP16 (v133 mVrms, v163 mVrms). · Set data sub address 07 (h) to 90 (h). · Measure amplitude of T13 and TP16 (v134 mVrms, v164 mVrms). · GoBst RdB = 20log (v134/v133) GoBst LdB = 20log (v164/v163) · Measure amplitude of TP12 (v12 mVrms). · Go WdB = 20log (v12/100) · Input signal (1 kHz, 500 mVrms, sine wave) to TP6 and TP8. · Measure THD of TP13 and TP 16 (THD R%, THD L%). · Input signal (80 Hz, 100 mVrms, sine wave) to TP6 and TP8. · Measure THD of TP12 (THD W%) · Input signal (1 kHz, 500 mVrms, sine wave) to TP6 and TP8. · Measure amplitude of T13 and TP16 (v13s mVrms, v16s mVrms). · Connect TP6 and TP8 to GND. · Measure amplitude of T13 and TP16 (v13n mVrms, v16n mVrms). · SN RdB = 20log (v13s/v13n) SN LdB = 20log (v16s/v16n) · Input signal (80 Hz, 100 mVrms, sine wave) to TP6 and TP8. · Measure amplitude of T12 (v12s mVrms). · Connect TP6 and TP8 to GND. · Measure amplitude of T12 (v12n mVrms). · SN WdB = 20log (v12s/v12n) · Connect TP6 and TP8 to GND. · Measure amplitude of TP12, TP13 and TP16 (vNO W mVrms, vNO R mVrms, vNO L mVrms). 2002-02-12 TA1343N Test Condition Note 5 6 Bus Data (hexadecimal) Input Point Meas. Point 00 01 02 03 04 05 06 07 TP6 TP13 40 40 72 00 00 40 C0 10 TP8 TP16 TP6 TP13 TP8 TP16 SW1 40 40 72 00 00 40 C0 10 (a) (a) / C7 7 TP6 TP12 40 40 72 00 00 40 C0 TP8 00 / 10 / 20 / 30 / 14 14 (a) · Input signal (1 kHz, 500 mVrms, sine wave) to TP6 and TP8. · Measure amplitude of T13 and TP16 (v130 mVrms, v160 mVrms). · Input signal (100 Hz, 500 mVrms, sine wave) to TP6 and TP8. · Measure amplitude of T13 and TP16 (v13 mVrms, v16 mVrms). · G100 RdB = 20log (v13/v130) G100 LdB = 20log (v16/v160) · Set data of sub address 06 (h) to 00 (h). · Input signal (1 kHz, 500 mVrms, sine wave) to TP6 and TP8. · Measure amplitude of T13 and TP16 (v130 mVrms, v160 mVrms). · Input signal (10 kHz, 500 mVrms, sine wave) to TP6 and TP8. · Measure amplitude of T13 and TP16 (v131 mVrms, v161 mVrms). · G10k RdB = 20log (v131/v130) G10k LdB = 20log (v161/v160) · Set data of sub address 06 (h) to C7 (h). · Connect TP6 to GND. · Input signal (1 kHz, 500 mVrms, sine wave) to TP8. · Measure amplitude of T16 (v162 mVrms). · Input signal (10 kHz, 500 mVrms, sine wave) to TP8. · Measure amplitude of T16 (v163 mVrms). · G10k SdB = 20log (v163/v162) · Input signal (300 Hz, 100 mVrms, sine wave) to TP6 and TP8. · Set data of sub address 07 (h) to 00 (h). · Measure amplitude of TP12 (v120 mVrms). · Set data of sub address 07 (h) to 10 (h). · Measure amplitude of TP12 (v121 mVrms). · Set data of sub address 07 (h) to 20 (h). · Measure amplitude of TP12 (v122 mVrms). · Set data of sub address 07 (h) to 30 (h). · Measure amplitude of TP12 (v123 mVrms). · Set data of sub address 07 (h) to 14 (h). · Measure amplitude of TP12 (v12X mVrms). · GLPF100dB = 20log (v120/v121) GLPF125dB = 20log (v121/v122) GLPF170dB = 20log (v122/v123) GLPF210dB = 20log (v123/v12X) 2002-02-12 TA1343N Test Condition Note 8 Bus Data (hexadecimal) Input Point Meas. Point 00 01 02 03 04 05 06 07 TP6 TP16 40 40 72 00 00 40 C0 10 SW1 TP8 (a) / C7 9 10 11 TP8 TP16 TP6 TP13 TP8 TP16 TP6 TP13 TP8 TP16 40 40 40 40 40 40 72 72 72 00 00 00 00 00 00 40 40 0E C7 C0 C0 10 10 10 (a) (a) (a) / 72 12 TP6 TP13 40 TP8 TP16 / 40 72 00 00 40 C0 10 (a) 72 13 TP6 TP13 TP8 TP16 40 40 72 00 00 40 C0 / 0E 15 10 (a) · Set data of sub address 06 (h) to C0 (h). · Connect TP8 to GND and input signal (1 kHz, 500 mVrms, sine wave) to TP6. · Measure amplitude of TP16 (v160 mVrms). · Set data of sub address 06 (h) to C7 (h). · Connect TP6 to GND and input signal (1 kHz, 500 mVrms, sine wave) to TP8. · Measure amplitude of TP16 (v161 mVrms). · G SdB = 20log (v161/v160) · Connect TP6 to GND. · Input signal (400 Hz, 500 mVrms, sine wave) to TP8. · Measure phase between TP8 and TP16 (Ph 4 f deg.). · Input signal (1 kHz, 500 mVrms, sine wave) to TP6 and TP8. · Measure amplitude of TP13 and TP16 (v13 mVrms, v16 mVrms). · DGLRdB = 20log (v16/V13) · Input signal (1 kHz, 500 mVrms, sine wave) to TP6 and TP8. · Set data of sub address 05 (h) to 0E (h). · Measure amplitude of TP13 and TP16 (v13R mVrms, v16R mVrms). · Set data of sub address 05 (h) to 72 (h). · Measure amplitude of TP13 and TP16 (v13L mVrms, v16L mVrms). · GBLMIN R = 20log (v13R/v16R) GBLMIN L = 20log (v16L/v13L) · Input signal (100 Hz, 250 mVrms, sine wave) to TP6 and TP8. · Set data of sub address 00 (h) to 40 (h). · Measure amplitude of TP13 and TP16 (v130 mVrms, v160 mVrms). · Set data of sub address 00 (h) to 72 (h). · Measure amplitude of TP13 and TP16 (v13B mVrms, v16B mVrms). · GBSMAX R = 20log (v13B/v130) GBSMAX L = 20log (v16B/v130) · Input signal (100 Hz, 250 mVrms, sine wave) to TP6 and TP8. · Set data of sub address 00 (h) to 40 (h). · Measure amplitude of TP13 and TP16 (v130 mVrms, v160 mVrms). · Set data of sub address 00 (h) to 0E (h). · Measure amplitude of TP13 and TP16 (v13B mVrms, v16B mVrms). · GBSMIN R = 20log (v13B/v130) GBSMIN L = 20log (v16B/v130) 2002-02-12 TA1343N Test Condition Note 14 Bus Data (hexadecimal) Input Point Meas. Point 00 01 02 03 04 05 06 07 TP6 TP13 40 40 72 00 00 40 C0 10 TP8 TP16 SW1 (a) / 72 15 TP6 TP13 TP8 TP16 40 40 72 00 00 40 C0 10 (a) / 0E 16 TP6 TP12 TP8 TP13 / TP16 40 40 40 72 00 72 40 C0 16 10 (a) · Input signal (10 kHz, 250 mVrms, sine wave) to TP6 and TP8. · Set data of sub address 01 (h) to 40 (h). · Measure amplitude of TP13 and TP16 (v130 mVrms, v160 mVrms). · Set data of sub address 01 (h) to 72 (h). · Measure amplitude of TP13 and TP16 (v13T mVrms, v16T mVrms). · GTRMAX R = 20log (v13T/v130) GTRMAX L = 20log (v16T/v130) · Input signal (10 kHz, 250 mVrms, sine wave) to TP6 and TP8. · Set data of sub address 01 (h) to 40 (h). · Measure amplitude of TP13 and TP16 (v130 mVrms, v160 mVrms). · Set data of sub address 01 (h) to 0E (h). · Measure amplitude of TP13 and TP16 (v13T mVrms, v16T mVrms). · GTRMIN R = 20log (v13T/v130) GTRMIN L = 20log (v16T/v130) · Input signal (1 kHz, 500 mVrms, sine wave) to TP6 and TP8. · Set data of sub address 02 (h) to 72 (h). · Measure amplitude of TP13 and TP16 (v130 mVrms, v160 mVrms). · Set data of sub address 02 (h) to 40 (h). · Measure amplitude of TP13 and TP16 (v13C mVrms, v16C mVrms). · GVRCNT R = 20log (v13C/v130) GVRCNT L = 20log (v16C/v130) · Input signal (80 Hz, 100 mVrms, sine wave) to TP6 and TP8. · Set data of sub address 02 (h) to 72 (h). · Measure amplitude of TP12 (v120 mVrms). · Set data of sub address 02 (h) to 40 (h). · Measure amplitude of TP12 (v12C mVrms). · GVRCNT W = 20log (v12C/v120) 2002-02-12 TA1343N Test Condition Note 17 18 Bus Data (hexadecimal) Input Point Meas. Point 00 01 02 03 04 05 06 07 TP6 TP12 40 40 72 00 72 40 C0 10 TP8 TP13 / TP16 0E TP6 TP12 SW1 40 40 72 00 TP8 72 40 C0 10 (a) (a) / 40 19 TP6 TP12 40 40 72 TP8 40 72 40 C0 10 (a) / 50 / 60 / 70 20 TP6 TP13 TP8 TP16 40 40 72 00 00 40 C0 17 10 (a) · Input signal (1 kHz, 500 mVrms, sine wave) to TP6 and TP8. · Set data of sub address 02 (h) to 72 (h). · Measure amplitude of TP13 and TP16 (v130 mVrms, v160 mVrms). · Set data of sub address 02 (h) to 0E (h). · Measure amplitude of TP13 and TP16 (v13MIN mVrms, v16MIN mVrms). · GVRMIN R = 20log (v13MIN/v130) GVRMIN L = 20log (v16MIN/v130) · Input signal (80 Hz, 100 mVrms, sine wave) to TP6 and TP8. · Set data of sub address 02 (h) to 72 (h). · Measure amplitude of TP12 (v120 mVrms). · Set data of sub address 02 (h) to 0E (h). · Measure amplitude of TP12 (v12MIN mVrms). · GVRMIN W = 20log (v12MIN/v120) · Input signal (80 Hz, 100 mVrms, sine wave) to TP6 and TP8. · Set data of sub address 04 (h) to 72 (h). · Measure amplitude of TP12 (v120 mVrms). · Set data of sub address 04 (h) to 40 (h). · Measure amplitude of TP12 (v12C mVrms). · GWLCNT = 20log (v12C/v120) · Input signal (80 Hz, 500 mVrms, sine wave) to TP6 and TP8. · Set data of sub address 03 (h) to 40 (h). · Measure amplitude of TP12 (vALS0 mVrms) · Set data of sub address 03 (h) to 50 (h). · Measure amplitude of TP12 (vALS1 mVrms) · Set data of sub address 03 (h) to 60 (h). · Measure amplitude of TP12 (vALS2 mVrms) · Set data of sub address 03 (h) to 70 (h). · Measure amplitude of TP12 (vALS3 mVrms) · Connect TP8 to GND. · Input signal (1 kHz, 500 mVrms, sine wave) to TP6. · Measure 1 kHz spectrum of TP16 (v161dBmV). · Measure 1 kHz spectrum of TP13 (v131dBmV). · CTL-R = 20log (v131 - v161) · Connect TP6 to GND. · Input signal (1 kHz, 500 mVrms, sine wave) to TP8. · Measure 1 kHz spectrum of TP13 (v132dBmV). · Measure 1 kHz spectrum of TP16 (v162dBmV). · CTR-L = 20log (v162 - v132) 2002-02-12 TA1343N Test Condition Note 21 Bus Data (hexadecimal) Input Point Meas. Point 00 01 02 03 04 05 06 07 TP6 TP12 40 40 00 00 00 40 C0 10 TP8 TP13 SW1 (b) TP16 22 TP6 TP12 TP8 TP13 40 40 72 00 72 40 C0 10 (b) TP16 23 TP6 TP12 TP8 TP13 72 72 72 00 72 40 C0 10 (a) TP16 24 TP6 TP12 TP8 TP13 40 40 40 00 40 40 C0 10 (a) · Connect TP6 and TP8 to GND. · Apply 9.0 V DC and sine wave (60Hz, 500 mVrms) to VCC terminal. · Measure amplitude of TP12, TP13 and TP16 (v12 mVrms, v13 mVrms, v16 mVrms). · RR1 WdB = 20log (v12/500) RR1 RdB = 20log (v13/500) RR1 LdB = 20log (v16/500) · Connect TP6 and TP8 to GND. · Apply 9.0 V DC and sine wave (60Hz, 500 mVrms) to VCC terminal. · Measure amplitude of TP12, TP13 and TP16 (v12 mVrms, v13 mVrms, v16 mVrms). · RR2 WdB = 20log (v12/500) RR2 RdB = 20log (v13/500) RR2 LdB = 20log (v16/500) · Input signal (100 Hz, sine wave) to TP6 and TP8. · Increase amplitude of the input signal, and measure THD of TP13 and TP16. Measure amplitude of TP13 and TP16 when THD of the outputs are 1% (vDOUT R1 Vp-p, vDOUT L1 Vp-p). · Input signal (10 kHz, sine wave) to TP6 and TP8. · Increase amplitude of the input signal, and measure THD of TP13 and TP16. Measure amplitude of TP13 and TP16 when THD of the outputs are 1% (vDOUT R2 Vp-p, vDOUT L2 Vp-p). · Smaller value vDOUT R1 or vDOUT R2 is vDOUT R. Smaller value vDOUT L1 or vDOUT L2 is vDOUT L. · Input signal (80 Hz, sine wave) to TP6 and TP8. · Increase amplitude of the input signal, and measure THD of TP 12. Measure amplitude of TP12 when THD of the output is 1% (vDOUT W Vp-p). · Input signal (1 kHz, sine wave) to TP6 and TP8. · Increase amplitude of the input signal, and measure THD of TP13 and TP16. Measure amplitude of TP6 and TP8 when THD of the outputs are 1% (vDIN R Vp-p, vDIN L Vp-p). · Input signal (80 Hz, sine wave) to TP6 and TP8. · Increase amplitude of the input signal, and measure THD of TP 12. Measure amplitude of TP6 and TP8 when THD of the outputs are 1% (vDIN W Vp-p) · Connect TP6 and TP8 to GND. · Set data of sub address 07(h) to 10 (h), 11 (h), 12 (h). Measure DC offset of TP12, TP13 and TP16 (DVM W mV, DVM R mV, DVM L mV). TP16 25 TP6 TP12 TP8 TP13 / TP16 11 40 40 72 00 72 40 C0 10 / (a) 12 18 2002-02-12 TA1343N Test Condition Note 26 Bus Data (hexadecimal) Input Point Meas. Point 00 01 02 03 04 05 06 07 TP6 TP13 40 40 72 00 72 40 07 10 TP8 TP16 SW1 (a) / · Connect TP6 and TP8 to GND. · Change data of sub address 06 (h) to 07 (h), 47 (h), 87 (h), and C7 (h). Measure DC offset of TP13 and TP16 (DVS R mV, DVS L mV). · Input signal (1 kHz, 500 mVrms, sine wave) to TP6 and TP8. · Set data of sub address 07 (h) to 10 (h). · Measure amplitude of TP13 and TP16 (v130 mVrms, v160 mVrms). · Set data of sub address 07 (h) to 11 (h). · Measure amplitude of TP13 and TP16 (v13MUT mVrms, v16MUT mVrms). · GMUT RdB = 20log (v13MUT/v130) GMUT LdB = 20log (v16MUT/v160) · Input signal (80 Hz, 100 mVrms, sine wave) to TP6 and TP8. · Set data of sub address 07 (h) to 10 (h). · Measure amplitude of TP12 (v120 mVrms) · Set data of sub address 07 (h) to 12 (h). · Measure amplitude of TP12 (v12MUT mVrms). · GMUT WdB = 20log (v12MUT/v120) 47 / 87 / C7 27 TP6 TP13 TP8 TP16 40 40 72 00 72 40 C0 10 / 11 / 12 19 (a) 2002-02-12 TA1343N Volume control characteristic (L, Rch) Volume control characteristic (Wch) 10 30 0 20 -10 10 0 -10 (dB) -30 -40 -50 Gain Gain (dB) -20 -60 -20 -30 -40 -50 -70 -60 -80 -70 -90 -80 -100 0 16 32 48 64 80 96 112 -90 0 128 16 32 48 Wch level control characteristic 96 112 128 112 128 Balance control characteristic 30 10 0 -10 0 -20 (dB) 20 10 -10 -20 Relative gain (dB) 80 Bus data Bus data Gain 64 -30 -40 -50 -60 -30 -40 -50 -60 -70 -70 -80 -80 -90 -90 0 -100 0 16 32 48 64 80 96 112 128 Bus data Lch Rch 16 32 48 64 80 96 Bus data Suround gain control characteristic 10 0 Suround gain (dB) -10 -20 -30 -40 -50 -60 -70 -80 -90 0 1 2 3 4 5 6 7 Bus data 20 2002-02-12 TA1343N Tone control characteristics 16 12 Data = 72 (h) 8 Data = 5E (h) 4 Data = 54 (h) Data = 4A (h) Relative gain (dB) Data = 68 (h) 0 Data = 40 (h) -4 Data = 36 (h) Data = 2C (h) Data = 22 (h) Data = 18 (h) -8 Data = 0E (h) -12 -16 20 100 1k 10 k 20 k 10 k 20 k 10 k 20 k Frequency (Hz) Surround frequency characteristic (gain) 7.5 5.0 Gain (dB) 2.5 0 -2.5 -5.0 -7.5 -10.0 -12.5 20 100 1k Frequency (Hz) Surround frequency characteristic (phase)/Mode 4 f 180 135 Phase (deg) 90 45 0 -45 -90 -135 -180 20 100 1k Frequency (Hz) 21 2002-02-12 TA1343N Test Circuit 1 DC Characteristics TP 1 10 mF 1 24 2 23 3 22 4 21 5 20 6 19 TP 2 0.039 mF TP 3 TP 22 0.01 mF 3.3 mF TP 21 TP 4 0.039 mF 0.01 mF 0.01 mF A 100 mF TP 5 0.039 mF TP 6 VCC 9 V 10 mF 7 TA1343N TP 19 0.022 mF TP 18 18 0.047 mF TP 8 TP 17 10 mF 8 17 9 16 10 15 11 14 0.033 mF TP 9 4.7 mF TP 16 TP 10 TP 15 0.027 mF 0.027 mF TP 11 TP 14 8200 pF TP 12 8200 pF 12 13 22 TP 13 2002-02-12 TA1343N Test Circuit 2 AC Characteristics 0.01 mF 0.039 mF 0.039 mF TP 6 10 mF I2C Bus 2 23 3 22 4 10 mF 4.7 mF 0.027 mF 21 5 3.3 mF 0.01 mF 6 19 18 8 17 9 16 10 15 11 14 (b) 100 mF (a) 51 W 20 8200 pF TP 12 SCL 9V 7 TP 8 SDA 24 SW1 0.039 mF 1 TA1343N 10 mF 0.01 mF 100 mF 0.022 mF 0.047 mF 0.033 mF TP 16 0.027 mF 8200 pF 12 13 23 TP 13 2002-02-12 TA1343N Application Circuit 10 mF 0.039 mF 0.01 mF 0.039 mF 1 SDA 24 I2C Bus 2 23 3 22 4 21 5 20 SCL 3.3 mF 0.01 mF 0.01 mF Lch Input 10 mF 9V 100 mF 6 7 19 TA1343N 0.039 mF 18 0.022 mF GND 0.047 mF Rch Input 10 mF 4.7 mF 0.027 mF 8 17 9 16 10 15 11 14 8200 pF 10 mF 0.033 mF 10 mF 0.027 mF Lch Output Rch Output Wch Output 8200 pF 12 13 24 10 mF 2002-02-12 TA1343N Package Dimensions Weight: 1.22 g (typ.) 25 2002-02-12 TA1343N RESTRICTIONS ON PRODUCT USE 000707EBA · TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the “Handling Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability Handbook” etc.. · The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury (“Unintended Usage”). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document shall be made at the customer’s own risk. · The products described in this document are subject to the foreign exchange and foreign trade laws. · The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. · The information contained herein is subject to change without notice. 26 2002-02-12