Thermoelectric Cooler (TEC) Controller ADN8831 Preliminary Technical Data FEATURES GENERAL DESCRIPTION True current sensing and over current protection Separate heating and cooling current limits High efficiency: >90% Long-term temperature stability: 0.1°C Temperature lock indication Temperature monitoring output Oscillator synchronization with an external signal Clock phase adjustment for multiple controllers Programmable switching frequency up to 1MHz Programmable maximum TEC voltage Low noise: <0.05% TEC current ripple TEC current monitoring Compact 5mm x 5mm LFCSP APPLICATIONS Thermoelectric Cooler (TEC) temperature control Resistive heating element control Temperature-Stabilization Substrate (TSS) control Temp Set Input Error Amplifier PID Compensation Network This device relies on a Negative Temperature Coefficient (NTC) thermistor or a positive temperature coefficient RTD device to sense the temperature of the object attached to the TEC. The target temperature is set with an analog input voltage either from a DAC or with an external resistor divider. The loop is stabilized by a PID compensation amplifier with high stability and low noise. The compensation network can be adjusted by the user to optimize temperature settling time. The component values for this network can be calculated based on the thermal transfer function of the laser diode or obtained from the look-up table given in the applications notes. Voltage outputs are provided to monitor both the temperature of the object and the voltage across the TEC. A 2.5V voltage reference is provided for the thermistor temperature sensing bridge. FUNCTIONAL BLOCK DIAGRAM Thermistor Input The ADN8831 is a monolithic controller that drives a Thermoelectric Cooler (TEC) to stabilize the temperature of a laser diode or a passive component used in telecommunications equipment. MOSFET Drivers Limiter Controls 2.5V Reference An external sense resistor provides true current sensing. Current limits for both heating and cooling can be set independently. Oscillator Heating ILim Cooling ILim VLim Freq/Phase Control Rev. PrC Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective companies. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved. ADN8831 PRELIMINARY TECHNICAL DATA TABLE OF CONTENTS Theory of Operation 9 Specifications 3 Introduction...................................................................................9 Absolute Maximum Ratings 5 Pin Configuration......................................................................... 6 Outline Dimensions 10 Pin Descriptions ........................................................................... 6 Ordering Guide 11 REVISION HISTORY Revision PrC 7/03—Data Sheet Changed from REV PrB to REV PrC. Rev. C | Page 2 of 11 PRELIMINARY TECHNICAL DATA ADN8831 SPECIFICATIONS Table 1. ADN8831—Electrical Characteristics (V+ = 3.0 V to 5.5 V, TA = 25°C, unless otherwise noted.) Parameter TEMPERATURE STABILITY Long Term Stability PWM OUTPUT DRIVERS Output Transition Time Nonoverlapping Clock Delay Output Resistance Symbol Conditions Min Typ 10 kΩ thermistor with α = -4.4% at 25C Max Unit 0.01 °C tR, tF CL = 3,300 pF RO(N1,P1) IL = 10 mA Output Voltage Swing Output Voltage Ripple Output Current Ripple LINEAR OUTPUT AMPLIFIER Output Resistance SFB ∆SFB ∆ITEC VLIM = 0 V fCLK = 1 MHz fCLK = 1 MHz RO, LNGATE RO, LPGATE IOUT = 2 mA IOUT = 2 mA Output Voltage Swing POWER SUPPLY Power Supply Voltage LFB 0 VDD V VDD 3.0 5.5 V Supply Current ISY 12 15 Shutdown Current ISD 5 mA mA µA Soft-Start Charging Current ISS 2 µA Undervoltage Lockout Standby Current UVLO ISB Low to high threshold SINCIN/SD = VDD, SS/SB = 0 V 2.5 1 2.7 V mA Standby Threshold VSB SYNCIN/SD = VDD 200 300 mV VOS1 VOS2 VCM1 = 1.5 V, VIN1P – VIN1M VCM2 = 1.5 V, VIN2P – VIN2M 10 10 100 100 µV µV ERROR AMPLIFIERS Input Offset Voltage 50 Input Voltage Range VCM1,2 Common-Mode Rejection Ratio Output Voltage Range CMRR1,2 VOUT1,2 Power Supply Rejection Ratio PSRR1,2 Output Current Gain Bandwidth Product OSCILLATOR Sync Range IOUT1,2 GBW1,2 Oscillator Frequency fCLK Free-Run Oscillation Frequency fCLK Phase Adjustment Range Phase Adjustment Default REFERENCE VOLTAGE Reference voltage LOGIC OUTPUTS Logic Low Output Level Logic High Outut Threshold fCLK 20 65 6 0 VDD 0.2 0.2 V % % 85 178 Ω Ω 8 PWM not switching -40C ≤ TA ≤ +85 SYNCIN/SD = 0 V ns ns Ω 0 VDD V VDD dB V 120 0 120 3.0 V ≤ VDD ≤ 5.0 V -5 dB +5 mA MHz 1,000 KHz 1,250 kHz 1000 KHz 335 ° 2 SYNCIN/SD connected to external clock COMPOSC = VDD, RFREQ = 150kΏ, SYNCIN/SD = VDD COMPOSC = VDD, SYNCIN/SD = VDD 200 ΦCLK 0.1 V ≤ VPHASE ≤ 2.4 V 25 ΦCLK PHASE = open VREF IREF < 2mA 800 100 180 2.37 TEMPGD, SYNCOUT VDD 0.2V Rev. C | Page 3 of 11 1,000 2.47 ° 2.57 V 0.2 V V ADN8831 PRELIMINARY TECHNICAL DATA Table 2. ADN8831—Electrical Characteristics (V+ = 3.0 V to 5.5 V, TA = 25°C, unless otherwise noted.) Parameter TEC CURRENT MEASUREMENT ITEC Gain ITEC Output Range ITEC Input Range ITEC Bias Voltage ITEC Output Current TEC VOLTAGE MEASUREMENT VTEC Gain VTEC Output Range VTEC Bias Voltage VTEC Output Current VOLTAGE LIMIT VLIM Gain VLIM Input Range VLIM Input Current, cooling VLIM Input Current, heating VLIM Input Current Accuracy, heating CURRENT LIMIT ILIMC Input Voltage Range ILIMH Input Voltage Range ILIMC Limit Threshold ILIMH Limit Threshold TEMPERATURE GOOD High Threshold Low Threshold Symbol Conditions Min Typ Max Unit AV,ITEC VITEC VCS, VLFB VITEC, B IOUT,TEC VITEC/(VLFB-VCS) 98 0 0 1.2 100 102 VDD VDD 1.3 V/V V V V mA 0.23 0 1.2 0.25 0.27 2.5 1.3 V/V V V mA VLFB = VCS = 0 AV,VTEC VVTEC VVTEC,B IVTEC VVTEC/(VLFB-VSFB) AV,LIM VVLIM IVLIM,COOL IVLIM,HEAT IVLIM,HEAT VSFB/VVLIM VLFB = VSFB = 2.5V 1.25 1 1.25 1 5 IFREQ 1.0 1.1 V/V V nA mA A/A VITEC = 2.0V VITEC = 0.5V 1.25 0 1.98 0.48 2.0 0.5 VDD 1.25 2.02 0.52 V V V V IN2M tied to OUT2, VIN2P = 1.5V IN2M tied to OUT2, VIN2P = 1.5V 1.525 1.475 1.530 1.470 V V 0 VOUT2 < 1.25V VOUT2 >1.25V IVLIM/IFREQ 0.9 VILIMC VILIMH VTH,ILIMC VTH,ILIMH VOUT1,TH1 VOUT1,TH2 Rev.Pr C | Page 4 of 11 VDD 100 PRELIMINARY TECHNICAL DATA ADN8831 ABSOLUTE MAXIMUM RATINGS Table 3. Absolute Maximum Ratings (at 25°C, unless otherwise noted) Table 2. Thermal Resistance Parameter Supply Voltage Input Voltage Storage Temperature Range Operating Temperature Range Operating Junction Temperature Lead Temperature Range (Soldering, 60 Sec) 32-lead LFCSP (ACP) Package Type Rating 6V GND to Vs + 0.3V –65°C to +150°C –40°C to +85°C 125°C 300°C 1 θJA1 35 θJC 10 Unit °C/W θJA is specified for the worst-case conditions, i.e., θJA is specified for device soldered in circuit board for surface mount packages. Rev. C | Page 5 of 11 ADN8831 PRELIMINARY TECHNICAL DATA Pin Configuration Pin Descriptions Pin No. 1 2 3 4 5 6 7 8 9 10 11 Mneumonic ILIMC IN1P IN1M OUT1 IN2P IN2M OUT2 VREF AVDD PHASE TMPGD Type Analog Input Analog Input Analog Input Analog Output Analog Input Analog Input Analog Output Analog Output Power Analog Input Digital Output 12 13 14 AGND FREQ SS/SB Ground Analog Input Analog Input 15 SYNCO Digital Output 16 SYNCI/SD Digital Input 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 COMPOSC PVDD SPGATE SWITCH SNGATE PGND SFB COMPSW LPGATE LNGATE LFB CS ITEC VTEC VLIM ILIMH Analog Output Power Analog Output Analog Input Analog Output Ground Analog Input Analog Input Analog Ouput Analog Output Analog Input Analog Input Analog Ouput Analog Ouput Analog Input Analog Input Description Analog input sets TEC cooling current protection limit. Non-inverting input to error amplifier. Inverting input to error amplifier. Output of error amplifer. Non-inverting input to compensation amplifier. Inverting input to compensation amplifier. Output of compensation amplifier. 2.5V Voltage Reference output. Power for non-driver sections. 3.0 V min; 5.5V max. Sets SYNCOUT clock phase relative to SYNCIN clock. Indicates when thermistor temperature is within ±0.01°C if target temperature as set by TEMPSET voltage. Analog ground. Connect to low noise ground. Sets switching frequency with an external resistor. Sets soft-start time for output voltage. Pull low to put ADN8831 into standby mode (VTEC = 0V). Phase adjustment clock output. Phase set from PHASE pin. Used to drive SYNCIN of other ADN8831 devices. Optional clock input. If not connected, clock frequency is set by FREQ pin. Pull low to put ADN8831 into shutdown mode. Comensation for oscillator; connect capacitor to ground. Power for output driver sections. 3.0V min; 5.5V max. Drives PWM output external PMOS gate. Connects to PWM FET drains. Drives PWM output external NMOS gate. Power ground. External NMOS devices connect to PGND. Connect to digital ground. PWM feedback. Typically connects to TEC- pin of TEC. Comensation for switching amplifier. Drives linear output external PMOS gate. Drives linear output external NMOS gate. Linear feedback. Will typically connect to TEC+ pin of TEC. Connect to output current sense resistor. Indicates TEC current. Indicates TEC voltage. Sets maximum TEC voltage. Sets TEC heating current protection limit. Rev.Pr C | Page 6 of 11 PRELIMINARY TECHNICAL DATA ADN8831 DETAILED BLOCK DIAGRAM Figure 2. Detailed Block Diagram Rev. C | Page 7 of 11 ADN8831 PRELIMINARY TECHNICAL DATA TYPICAL APPLICATION CIRCUIT Figure 3. Typical Application Circuit I Rev.Pr C | Page 8 of 11 PRELIMINARY TECHNICAL DATA ADN8831 THEORY OF OPERATION Introduction The ADN831 is a thermoelectric cooler (TEC) controller used to set and stabilize the temperature of the TEC. A voltage applied to the input of the ADN8831 corresponds to a target temperature set-point. Using a thermistor to monitor the current temperature of the target object, the ADN8831 applies the appropriate current to the TEC to pump heat either towards or away from the target object until the set-point temperature is reached. Self correcting auto-zero amplifiers (chop1 and chop2) are used in the input and compesation stages of the aDN8831 to provide a maximum offset voltage of 100uV over time and temperature. This results in a final temperature accuracy of 0.01C in typical applications, eliminating the ADN8831 as an error source in the temperature control loop. The TEC is driven differentially using an H-bridge configuration. The ADN8831 drives external transistors that are used to provide the current to the TEC. The maximum voltage across the TEC and current flowing through the TEC can be set using the VLIM and ILIM pins. Additional details are provided in the Setting Voltage and Current Limits section. One side of the H-bridge uses a switched output, while the other is linear. This proprietary configuration allows the ADN8831 to provide efficiency of >90%, while minimizing external filtering component count. The ADN8831 requires only one inductor and one capacitor to filter the switching frequency of the switched output. For most applications, a 4.7uH inductor, a 22uF capacitor and a switching frequency of 1MHz maintains less than 0.5% worst-case output voltage ripple across the TEC. The switched output is controlled by the ADN8831’s oscillator. A single resistor on the FREQ pin (pin #13) sets the switching frequency from 100kHz to 1MHz. The clock output is available at the SYNCO pin (pin #15). Connecting SYNCO to the SYNI pin of another ADN8831 allows multiple ADN8831s to be driven using a single clock. The clock phase can be changed using a simple resistor divider at the PHASE pin )pin #10). Phase adjustment allows two or more ADN8831 devices to operate from the same clock frequency and not have all outputs switch simultaneously, which could create excessive power supply ripple. Details of how to adjust the clock frequency and phase are provided in the Setting the Frequency section. The logic output of the TEMPGD pin (pin #11) indicates when the target temperature is reached. Shutdown, standby, and true current-sensing are also provided by the ADN8831 to protect from catastrophic system failures that could damage the TEC. Rev. C | Page 9 of 11 ADN8831 PRELIMINARY TECHNICAL DATA OUTLINE DIMENSIONS Figure 1. 32-Lead Lead Frame Chip Scale Package [LFCSP] (CP-32) Dimensions Shown in Millimeters ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although these products feature proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev.Pr C | Page 10 of 11 PRELIMINARY TECHNICAL DATA ADN8831 ORDERING GUIDE Table 3. Model Temperature Range Package Description Package Option ADN8831ACP -40°C to +85°C 32-Lead Lead Frame Chip Scale Package CP-32 ADN8831-EVAL -40°C to +85°C Evaluation Board © 2003 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective companies. PR04663-0-2/04(PrC) Rev. C | Page 11 of 11