T3GE9WBG TOSHIBA Digital Integrated Circuit Silicon Monolithic T3GE9WBG Dual Supply Bus Transceiver for SD Card The T3GE9WBG is a dual supply, advanced high-speed CMOS dual supply voltage interface bus transceiver fabricated with silicon gate CMOS technology. Designed for use as an interface between a 1.8-V bus and a 2.9-V bus in mixed 1.8-V/2.9-V supply systems. The A-port interfaces with the 1.8-V bus, the B-port with the 2.9-V bus. The direction of data transmission is determined by the level of the DIR input. All inputs are equipped with protection circuits against static discharge or transient excess voltage. Weight: 0.006 g (typ.) Features Bidirectional interface between 1.8-V and 2.9-V buses. High-speed operation : tpd = 8.5 ns (max) (VCCA = 1.8 ± 0.15 V, VCCB = 2.9 ± 0.1 V) Output current : IOHB/IOLB = ±6 mA (min) (VCCB = 2.8 V) IOHA/IOLA = ±6 mA (min) (VCCA = 1.65 V) Regulator output current: 200mA (min) Integrated EMI filter on B-port Integrated Pull-up and Pull-down resistors on B-port Latch-up performance : ±200 mA ESD performance : Machine model > ±200 V Human body model > ±2000 V IEC61000-4-2 Level 4 (Contact) > ±8000 V Ultra-small package ( SD card side ) : WCSP24 1 2009-06-15 T3GE9WBG Pin Assignment (top view) 1 2 3 4 5 A A B B C 1 2 3 Dat2.h CMD-dir Dat0-dir Dat3.h -- VCCA 4 5 VBatt Dat2-B VCCB O/P Dat3-B C Clk.h Enable GND GND CLK-B D D Dat0.h CMD.h CD CMD-B Dat0-B E E Dat1.h Clk-f Dat123-dir WP Dat1-B (Top view) Truth Table Input Clk.h Outputs Clk-f CLK-B L L L H H H Inputs Function Outputs CMD-dir CMD.h CMD-B L Output Input CMD.h = CMD-B H Input Output CMD-B = CMD.h Inputs Function L Output Input Dat0.h = Dat0-B H Input Output Dat0-B = Dat0.h Inputs Dat0-B Outputs Dat0-dir Dat0.h Function Dat123-dir Dat1.h – Dat3.h Dat1-B – Dat3-B Outputs L Output Input Datn.h = Datn-B H Input Output Datn-B = Datn.h Input Output Enable Regulator L OFF H ON 2 2009-06-15 T3GE9WBG Block Diagram VCCA VCCB O/P R8 Clk.h Logic level converter Clk-f R9 Clk-B C VCCB O/P VCCA Logic level converter CMD-dir R2 R8 R9 CMD-B CMD.h C VCCA VCCB O/P Logic level converter Data0-dir R3 R8 R9 Data0-B Data0.h C VCCA Data123-dir VCCB O/P Logic level converter R4 R8 Data1.h Data2.h R9 Data1-B Data2-B C R8 R9 R5 C Data3.h 3 Data3-B 2009-06-15 T3GE9WBG Block Diagram VCCA Symbol VCCA Value (typ) R3, R4 R6 R7 CD WP 70kΩ R2 15kΩ R5 470kΩ R6, R7 100kΩ R8 5Ω R9 35Ω C 35pF VBatt LDO Enable VCCB O/P Absolute Maximum Ratings (Note 1) Characteristics Power supply voltage DC input voltage DIR, Clk.h Enable DC bus I/O voltage Input diode current DIR, Clk.h Enable Symbol Rating VCCA −0.5 to 3.0 VBatt 5.5 VIN Unit V −0.5 to VCCA + 0.5 −0.5 to 5.5 VI/OA −0.5 to VCCA + 0.5 (Note 2) VI/OB −0.5 to VCCB + 0.5 (Note 2) ±25 IIK V V mA −25 II/OK ±25 IOUTA ±25 IOUTB ±25 ICCA ±50 mA Power dissipation PD 400 mW Storage temperature Tstg −55 to 150 °C Output diode current DC output current DC VCC/ground current per supply pin (Note 3) mA mA Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Note 2: High or Low stats. IOUT absolute maximum rating must be observed. Note 3: VOUT < GND, VOUT > VCC 4 2009-06-15 T3GE9WBG Operating Range (Note 1) Characteristics Symbol Rating VCCA 1.65 to 1.95 VBatt 3.2 to 5.0 Power supply voltage Input voltage DIR, Clk.h Enable Bus I/O voltage Unit V 0 to VCCA VIN V 0 to 5.0 VI/OA 0 to VCCA (Note 2) VI/OB 0 to VCCB O/P(Note 2) IOUTA ±6 (Note 3) IOUTB ±6 (Note 4) Operating temperature Topr −30 to 85 Input rise and fall time dt/dv 0 to 10 Output current V mA °C (Note 5) ns/V Note 1: The operating range is required to ensure the normal operation of the device. Unused inputs and bus inputs must be tied to either VCC or GND. Please connect both bus inputs and the bus outputs with VCC or GND when the I/O of the bus terminal changes by the function. In this case, please note that the output is not short-circuited. Note 2: High or low state Note 3: VCCA = 1.65 to 1.95 V Note 4: VCCB = 2.8 to 3.0 V, VCCB is supplied from the built-in LDO. Note 5: VCCA = 1.65 V, VCCB = 2.8 V 5 2009-06-15 T3GE9WBG Electrical Characteristics DC Characteristics (1.65 V ≤ VCCA ≤ 1.95 V, 2.8 V ≤ VCCB ≤ 3.0 V) Characteristics H-level input voltage L-level input voltage Symbol Test Condition VIHA DIR, An VIHB Bn VILA DIR, An VILB Bn VCCA ×0.65 ⎯ 1.65 to 1.95 2.8 to 3.0 2.0 ⎯ 1.65 to 1.95 2.8 to 3.0 ⎯ VCCA ×0.35 1.65 to 1.95 2.8 to 3.0 ⎯ 0.8 IOHA = −100μA 1.65 to 1.95 2.8 to 3.0 VCCA − 0.2 ⎯ IOHA = −6 mA 1.65 2.8 to 3.0 1.15 ⎯ IOHB = −100 μA 1.65 to 1.95 2.8 to 3.0 VCCB − 0.2 ⎯ IOHB = −6 mA 1.65 to 1.95 2.8 2.2 ⎯ IOLA = 100 μA 1.65 to 1.95 2.8 to 3.0 ⎯ 0.2 1.65 2.8 to 3.0 ⎯ 0.3 IOLB = 100 μA 1.65 to 1.95 2.8 to 3.0 ⎯ 0.2 IOLB = 6 mA 1.65 to 1.95 2.8 ⎯ 0.4 1.65 to 1.95 2.8 to 3.0 ⎯ ±5.0 (Note 1) VOLA VIN = VIH or VIL L-level output voltage 2.8 to 3.0 (Note 1) VOHB VOLB 1.65 to 1.95 Ta = −30 to 85°C Max (Note 1) VIN = VIH or VIL H-level output voltage VCCB (V) Min (Note 1) VOHA VCCA (V) IOLA = 6 mA Unit V V V V VINA = VCCA or GND IIA DIR = HIGH VCD = VWP = VCCA μA VCMD-B, DAT0, DAT1, DAT2 = VCCA Input leakage current IIB VDAT3 = GND DIR = LOW 1.65 to 1.95 2.8 to 3.0 ⎯ ±5.0 1.65 to 1.95 2.8 to 3.0 ⎯ 20 VCD = VWP = VCCA VINA = VCCA or GND Quiescent supply current ICCA DIR = HIGH μA VCD = VWP = VCCA Note 1: An is a host side signal. Bn is a card side signal. Note: VCCB is supplied from the built-in LDO. 6 2009-06-15 T3GE9WBG AC Characteristics (Ta = −30 to 85°C, Input: tr = tf = 2.0 ns) VCCA = 1.8 ± 0.15 V, VCCB = 2.9 ± 0.1 V Characteristics Symbol Propagation delay time tpLH (Bn → An) tpHL Propagation delay time tpLH (An → Bn) tpHL Propagation delay time tpLH (Clk.h → Clk-f) tpHL Output Transition Time tTLH (An) tTHL Output Transition Time tTLH (Bn) tTHL Min Typ. Max Unit Figure 1, Figure 2 1.0 ⎯ 8.5 ns Figure 1, Figure 2 1.0 ⎯ 8.5 ns Figure 1, Figure 2 1.0 ⎯ 14 ns Figure 1, Figure 2 ⎯ 1.5 ⎯ ns Figure 1, Figure 2 ⎯ 1.5 ⎯ ns ⎯ ⎯ 0.5 ns tosLH Output to output skew (Note 1) tosHL (tosLH = |tpLHm − tpLHn|, tosHL = |tpHLm − tpHLn|) Note 1: Parameter guaranteed by design. Note: Test Condition An is a host side signal. Bn is a card side signal. VCCB is supplied from the built-in LDO. Dynamic Switching Characteristics (Ta = 25°C, Input: tr = tf = 2.0 ns, CL = 15 pF) Characteristics Test Condition Symbol Quiet output maximum dynamic VOL A→B Quiet output minimum dynamic VOL A→B Quiet output maximum dynamic VOH A→B VOLP B→A VOLV B→A VOHP B→A A→B Quiet output minimum dynamic VOH VOHV B→A VIH = VCC, VIL = 0 V (Note 2) VIH = VCC, VIL = 0 V (Note 2) VIH = VCC, VIL = 0 V (Note 2) VIH = VCC, VIL = 0 V (Note 2) VCCA (V) VCCB (V) Typ. 1.8 2.9 0.35 1.8 2.9 0.25 1.8 2.9 −0.35 1.8 2.9 −0.25 1.8 2.9 3.25 1.8 2.9 2.05 1.8 2.9 2.55 1.8 2.9 1.55 Unit V V V V Note 2: Parameter guaranteed by design. Note: An is a host side signal. Bn is a card side signal. Capacitive Characteristics (Ta = 25°C) Characteristics Symbol Power dissipation capacitance (Note 3) CPDA CPDB Test Circuit VCCA (V) VCCB (V) Typ. A → B (DIR = “H”) 1.8 2.9 24 B → A (DIR = “L”) 1.8 2.9 22 A → B (DIR = “H”) 1.8 2.9 76 B → A (DIR = “L”) 1.8 2.9 28 Unit pF Note 3: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr) = CPD・VCC・fIN + ICC/6 (per bit) 7 2009-06-15 T3GE9WBG Regulator Section Electrical Characteristics (unless otherwise specified, VIN = VOUT + 1 V, IOUT = 1 mA, CIN = 0.1 μF, COUT = 2.2 μF, Tj = 25°C) Characteristics Input voltage Output voltage Symbol Test Condition Min Typ. Max VIN ⎯ 3.2 ⎯ 5.0 V VCCB O/P Unit 2.8 2.9 3.0 V ⎯ 3 15 mV mV Line regulation Reg・line VOUT + 0.5 V ≤ VIN ≤ 5.0 V, IOUT = 1 mA Load regulation Reg・load 1 mA ≤ IOUT ≤ 200 mA ⎯ ⎯ 150 IB1 IOUT = 0 mA ⎯ 40 80 IB2 IOUT = 100 mA ⎯ 45 85 VCT = 0 V ⎯ 0.1 1.0 μA Quiescent current Stand-by current IB (OFF) μA Output noise voltage VNO VIN = VOUT + 1 V, IOUT = 10 mA, 10 Hz ≤ f ≤ 100 kHz, , Ta = 25°C ⎯ 140 ⎯ μVrms Temperature coefficient TCVO −40°C ≤ Topr ≤ 85°C ⎯ 100 ⎯ ppm/°C R.R. VIN = VOUT + 1 V, IOUT = 10 mA, f = 1 kHz, VRipple = 500 mVp-p, Ta = 25°C ⎯ 40 ⎯ dB Ripple rejection Control voltage (ON) VCT (ON) ⎯ 1.5 ⎯ VIN V Control voltage (OFF) VCT (OFF) ⎯ 0 ⎯ 0.25 V Control current (ON) ICT (ON) VCT = 1.5 V ⎯ ⎯ 0.1 μA Control current (OFF) ICT (OFF) VCT = 0 V ⎯ ⎯ 0.1 μA Peak output current Ioutpeak 200 ⎯ ⎯ mA EMI Filter Response (Typical Performance) 0 Attenuation [dB] -10 -20 -30 -40 -50 -60 0.1 1 10 Frequency [GHz] 8 2009-06-15 T3GE9WBG AC Test Circuit VCC (output) Symbol Output RL CL Measure 2.9 ± 0.1 V 1.8 ± 0.18 V RL 2 kΩ 2 kΩ CL 15 pF 15 pF Figure 1 AC Waveform tf 2.0 ns tr 2.0 ns 90% VM Input (An, Bn) tTLH VIH 10% GND tTHL 90% VM Output (Bn, An) tpLH VOH 10% tpHL VOL Figure 2 tpLH, tpHL, tTLH, tTHL Symbol VCC 2.9 ± 0.1 V 1.8 ± 0.18 V VIH VCC VCC VM VCC/2 VCC/2 9 2009-06-15 T3GE9WBG Package Dimensions Unit: mm Weight: 0.006 g (typ.) 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