TPCS8004 TOSHIBA Field Effect Transistor Silicon N Channel MOS Type (π-MOSV) TPCS8004 High-Speed Switching Applications Switching Regulator Applications DC-DC Converter Applications Unit: mm • Small footprint due to small and thin package • Low drain-source ON resistance: RDS (ON) = 0.56 Ω (typ.) • High forward transfer admittance: |Yfs| = 1.8 S (typ.) • Low leakage current: IDSS = 100 μA (max) (VDS = 200 V) • Enhancement model: Vth = 1.5 to 3.5 V (VDS = 10 V, ID = 1 mA) Absolute Maximum Ratings (Ta = 25°C) Characteristics Symbol Rating Unit Drain-source voltage VDSS 200 V Drain-gate voltage (RGS = 20 kΩ) VDGR 200 V Gate-source voltage VGSS ±20 V (Note 1) ID 1.3 Pulse (Note 1) IDP 5.2 Drain power dissipation (t = 10 s) (Note 2a) PD 1.5 Drain power dissipation (t = 10 s) (Note 2b) PD 0.6 Single pulse avalanche energy (Note3) EAS 1.05 mJ Avalanche current IAR 1.3 A Repetitive avalanche energy (Note2a, Note 4) EAR 0.15 mJ Channel temperature Tch 150 °C Storage temperature range Tstg −55 to 150 °C Drain current DC A JEDEC ― JEITA ― TOSHIBA W 2-3R1B Weight: 0.035 g (typ.) Circuit Configuration 8 7 6 5 1 2 3 4 Note 1, Note 2, Note 3 and Note 4: See the next page. This transistor is an electrostatic-sensitive device. Please handle with caution. 1 2009-09-29 TPCS8004 Thermal Characteristics Characteristics Symbol Max Unit Thermal resistance, channel to ambient (t = 10 s) (Note 2a) Rth (ch-a) 83.3 °C/W Thermal resistance, channel to ambient (t = 10 s) (Note 2b) Rth (ch-a) 208 °C/W Marking (Note 5) Part No. (or abbreviation code) S8004 Lot No. Note 1: Note 6 Ensure that the channel temperature does not exceed 150°C. Note 2: a) Device mounted on a glass-epoxy board (a) b) Device mounted on a glass-epoxy board (b) FR-4 25.4 × 25.4 × 0.8 (unit: mm) FR-4 25.4 × 25.4 × 0.8 (unit: mm) Note 3: VDD = 50 V, Tch = 25°C (initial), L = 1.0 mH, RG = 25 Ω, IAR = 1.3 A Note 4: Repetitive rating: pulse width limited by maximum channel temperature Note 5: ○ on lower right of the marking indicates Pin 1. ※ Weekly code: (Three digits) Week of manufacture (01 for the first week of a year: sequential number up to 52 or 53) Year of manufacture (The last digit of a year) Note 6: A line under a Lot No. identifies the indication of product Labels. Not underlined: [[Pb]]/INCLUDES > MCV Underlined: [[G]]/RoHS COMPATIBLE or [[G]]/RoHS [[Pb]] Please contact your TOSHIBA sales representative for details as to environmental matters such as the RoHS compatibility of Product. The RoHS is the Directive 2002/95/EC of the European Parliament and of the Council of 27 January 2003 on the restriction of the use of certain hazardous substances in electrical and electronic equipment. 2 2009-09-29 TPCS8004 Electrical Characteristics (Ta = 25°C) Characteristics Symbol Test Condition Min Typ. Max Unit Gate leakage current IGSS VGS = ±16 V, VDS = 0 V ⎯ ⎯ ±10 μA Drain cut-OFF current IDSS VDS = 200 V, VGS = 0 V ⎯ ⎯ 100 μA ID = 10 mA, VGS = 0 V 200 ⎯ ⎯ V Drain-source breakdown voltage V (BR) DSS Vth VDS = 10 V, ID = 1 mA 1.5 ⎯ 3.5 V Drain-source ON resistance RDS (ON) VGS = 10 V, ID = 0.6 A ⎯ 0.56 0.8 Ω Forward transfer admittance |Yfs| VDS = 10 V, ID = 0.6 A 0.9 1.8 ⎯ S Input capacitance Ciss ⎯ 380 ⎯ pF Reverse transfer capacitance Crss ⎯ 40 ⎯ pF Output capacitance Coss ⎯ 140 ⎯ pF ⎯ 4.5 ⎯ ⎯ 12 ⎯ Rise time VDS = 10 V, VGS = 0 V, f = 1 MHz tr VGS Turn-ON time ton Fall time tf Turn-OFF time toff Total gate charge (gate-source plus gate-drain) Qg Gate-source charge Qgs Gate-drain (“miller”) charge Qgd 0V 4.7 Ω Switching time ID = 0.6 A VOUT 10 V RL = 167 Ω Gate threshold voltage ns ⎯ 23 ⎯ ⎯ 54 ⎯ ⎯ 12 ⎯ nC ⎯ 8 ⎯ nC ⎯ 4 ⎯ nC VDD ∼ − 100 V Duty < = 1%, tw = 10 μs VDD ∼ − 160 V, VGS = 10 V, ID = 1.3 A Source-Drain Ratings and Characteristics (Ta = 25°C) Characteristics Drain reverse current (pulse) Forward voltage (diode) (Note 1) Symbol Test Condition Min Typ. Max Unit IDRP ⎯ ⎯ ⎯ 5.2 A ⎯ ⎯ −2.0 V VDSF IDR = 1.3 A, VGS = 0 V Reverse recovery time trr IDR = 1.3 A, VGS = 0 V, ⎯ 89 ⎯ ns Reverse recovery charge Qrr dIDR/dt = 100 A/μs ⎯ 230 ⎯ nC 3 2009-09-29 TPCS8004 ID – VDS ID – VDS 5 4.6 Common source Ta = 25°C Pulse test 4.8 8 4 4.4 3 4.2 2 6 10 Drain current ID (A) 4.8 6 4 Drain current ID (A) Common source Ta = 25°C Pulse test 8 10 5 4 4.6 4.4 3 4.2 2 4 3.8 1 0 0 10 20 30 Drain-source voltage 3.8 1 VGS = 3.6 V VGS = 3.6 V 0 0 40 2 VDS (V) 4 Drain-source voltage ID – VGS Common source VDS = 10 V Pulse test 3 2 25°C 1 Ta = 100°C 0 0 1 2 −55°C 3 Gate-source voltage 10 VDS (V) VDS – VGS Drain-source voltage Drain current ID (A) 4 8 3.0 VDS (V) 5 6 4 Common source Ta = 25°C Pulse test 2.5 2.0 ID = 2.6 A 1.5 1.0 1.3 0.5 0.6 0.32 0 0 5 4 VGS (V) 8 12 Gate-source voltage 16 20 VGS (V) |Yfs| – ID Forward transfer admittance ⎪Yfs⎪ 3 Common source VDS = 10 V Pulse test RDS (ON) – ID Ta = −55°C 100°C 5 (Ω) (S) 5 25°C Drain-source on resistance RDS (ON) 7 1 0.5 0.3 0.1 0.05 0.05 0.1 0.3 0.5 1 3 3 Drain current ID (A) Ta = 25°C Pulse test 1 VGS = 10 V 0.5 15 V 0.3 0.1 0.05 0.05 5 Common source 0.1 0.3 0.5 1 3 5 Drain current ID (A) 4 2009-09-29 TPCS8004 IDR – VDS 10 Common source 0.65 A ID = 0.32 A 0.8 0 0.4 VGS = 10 V 0.2 0 −80 −40 0 40 80 Ambient temperature Ta 120 Common source Ta = 25°C 5 (A) Pulse test 3 1 0.5 0.3 VGS = 10 V 5V 160 (°C) 0, −1 V 3V 0.1 −0.03 −0.05 −0.1 −0.3 −0.5 Drain-source voltage Capacitance – VDS 5 Vth (V) 100 Gate threshold voltage Coss 10 Crss Common source Ta = 25°C f = 1MHz VGS = 0 V 1 0.1 Common source VDS = 10 V ID = 1 mA Pulse test 4 3 2 1 0 −80 1 10 Drain-source voltage 120 160 VDS (V) 160 1.2 0.8 (2) 0.4 80 80 Dynamic input/output characteristics (1) Device mounted on a glass-epoxy board (a) (Note 2a) (2) Device mounted on a glass-epoxy board (b) (Note 2b) t = 10 s 40 40 VDS (V) Drain-source voltage Drain power dissipation PD (W) (1) 0 Ambient temperature Ta (°C) 100 PD – Ta 2.0 −40 120 160 40 120 12 80 VDD = 160 V 80 8 VGS Common source ID = 1.3 A 40 4 Ta = 25 °C 0 0 200 16 VDS 4 8 12 16 VGS (V) Capacitance C (pF) Ciss 0 0 VDS (V) Vth – Ta 1000 1.6 −3 −1 Gate-source voltage 1.0 1.3 A Pulse test Drain reverse current IDR Drain-source ON resistance RDS (ON) (Ω) RDS (ON) – Ta 1.2 0 Total gate charge Qg (nC) Ambient temperature Ta (°C) 5 2009-09-29 TPCS8004 rth − tw Normalized transient thermal impedance rth (°C/W) 500 300 (1) Device mounted on a glass-epoxy board (a) (Note 2a) (2) (2) Device mounted on a glass-epoxy board (b) (Note 2b) t = 10 s 100 (1) 50 30 10 5 3 1 0.5 0.3 Single pulse 0.1 1m 10 m 100 m 1 Pulse width 10 tw 100 (S) EAS − Tch Safe operating area 5 3 1.2 ID max (pulse) * 1 ms * Avalanche energy EAS (mJ) 10 Drain current ID (A) 1 0.5 0.3 10 ms * 0.1 0.05 0.03 0.01 0.005 * Single pulse Ta = 25°C 0.003 Curves must be derated linearly with increase in temperature. 0.001 0.1 0.3 1 3 10 Drain-source voltage 1000 100 0.8 0.6 0.4 0.2 0 25 VDSS max 30 1.0 300 50 75 100 125 150 Channel temperature (initial) Tch (°C) 1000 VDS (V) 15 V BVDSS IAR −15 V VDD Test circuit VDS Wave form Tch = 25°C (Initial) ⎞ B VDSS 1 2 ⎛ Peak IAR = 1.3 A, RG = 25 Ω E AS = 2 ⋅ L ⋅ I ⋅ ⎜⎜ B ⎟⎟ ⎝ VDSS − VDD ⎠ VDD = 50 V, L = 1 mH 6 2009-09-29 TPCS8004 RESTRICTIONS ON PRODUCT USE • Toshiba Corporation, and its subsidiaries and affiliates (collectively “TOSHIBA”), reserve the right to make changes to the information in this document, and related hardware, software and systems (collectively “Product”) without notice. • This document and any information herein may not be reproduced without prior written permission from TOSHIBA. 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