FAIRCHILD TMC2069P7C

www.fairchildsemi.com
TMC2069P7C
Demonstration Board for the TMC3003 DAC
Description
• Parallel TTL Compatible Inputs
• Component and VGA Outputs
• Fairchild demo board compatibility
The TMC2069P7C DAC demonstration board provides a
flexible base for evaluating the performance of the
TMC3003 triple 10 bit DAC.
Applications
The board can output analog component video or VGA.
There are high quality Hybrid filters (601-003) on the output.
•
•
•
•
Evaluation of TMC3003 DAC
Output for TMC2068P7C Decoder demo board
Output for Genesis 10-bit Line doubler board
System Breadboarding
Block Diagram
Analog RGB
VGA Output
+5V 0V -5V
96 Way
Edge
Connector
(female)
1
Digital Inputs:
10 bit G/Y
10 bit B/U
10 bit R/V
High Quality
LPF
TMC3003
DAC Clock
SYNC
BLANK
High Quality
LPF
Analog RGB/YPbPr
Video Output
High Quality
LPF
32
Analog Outputs for the TMC22153 Digital Decoder
Rev. 0.9.1
PRELIMINARY INFORMATION describes products that are not in full production at the time of printing. Specifications are based on design goals
and limited characterization. They may change without notice. Contact Fairchild Semiconductor for current information.
Preliminary Information
Features
Preliminary Information
TMC2069P7C
PRODUCT SPECIFICATION
Functional Description
Setup Procedure
The TMC2069P7C is designed to demonstrate the performance of the TMC3003 Digital to Analog converter. It also
offers an example of design practices that result in highquality video performance.
1.
To set up the output levels on the triple dac, place a digital NTSC unmodulated ramp that has peak white at the
digital level 824 and blanking at 240.
2.
The output analog levels should be 286 mV sync tip to
blank level and 1.0V sync tip to peak white. If the output
levels are incorrect, adjust the GREEN output using the
potentiometer RV1.
3.
Apply either the unmodulated digital ramp used in step
1 to the red and blue inputs to adjust the Pb/BLUE and
Pr/RED outputs or apply SMPTE color bars and measure the Pb and Pr outputs.
4.
Adjust RV2, to adjust the RED, and RV3, to adjust the
BLUE output.
The TMC3003 is a high-speed triple 10-bit D/A converter
especially suited for video and graphics applications.
It offers 10-bit resolution, TTL-compatible inputs, low
power consumption, and requires only a single +5 Volt
power supply. It has single ended current output, SYNC and
BLANK control inputs, and a separate current source for
adding sync pulses to the Green D/A converter output. It is
ideal for generating analog RGB from digital RGB and
driving computer display and video monitors. Three speed
grades are available: 30, 50, and 80 Msps.
The DAC module can be plugged into the TMC2068P7C
decoder demonstration board to provide analog RGB or
YPbPr outputs for viewing the decoder performance. The
board can also be plugged into the 10-bit DICE line doubler
demonstration board from Genesis. The input for the
Genesis 10 bit line doubler board is being provided by the
TMC2067P7C 10 bit ADC demonstration board connected
to the TMC2068P7C decoder demonstration board.
A set of switches routes the triple DAC outputs to either the
VGA connector or the component video connectors. The
SYNC and BLANK signals to the triple DAC are required
for the VGA mode are disabled when the component video
output is required. The component video connectors provide
sync on green.
a.
If using the unmodulated ramp, match the output
voltage levels to the values on the green channel.
b.
If using the SMPTE color bars, the level of Pb and
Pr peak to peak should be 525 mV.
1.0V
286 mV
Figure 2. Unmodulated Ramp Waveform
Pass Band
Stop Band
0 dB
0 dB
With 13.5MHz SinX/X Roll-off
With 13.5 MHz SinX/X Roll-off
0.25 dB/Div
-2.0 dB
0 MHz
6 MHz
-50 dB
0 MHz
2T Pulse
10 MHz
100 MHz
Group Delay
475 nSec
20 nSec/Div
HAD=200 nSec
375 nSec
0 MHz
Figure 1. Output Low Pass Filters
2
6 MHz
PRODUCT SPECIFICATION
Power Supply Requirements
The TMC2069P7C board requires 1.5 Amps from the +5
Volt power supply and 0.5 Amps from the -5 Volt power supply. The -5 Volt power supply powers the SMA filters. The
+5 Volt power supply not only drives TTL logic devices but
it also provides the power and voltage references to the
TMC3003. Therefore, it is recommended that a bench power
supply be used with the cable lengths kept to a minimum.
TMC2069P7C
The response at 5.0MHz typically varies<±0.25dB with
supplies of ±5V to ±8V. When operating in the 0dB gain
mode, pin 6 must be well isolated from ground planes. When
operating in the +6dB gain mode, pin 6 must have a low
resistance path to ground.
For more information please contact Microelectronic
Module Corporation (MMC) at 414-785-6506.
Output Low-Pass Filters
Preliminary Information
The 601-003 filters are high end broadcast quality
filters. They are Virtual 601 post filters with a bandwidth of
5.75MHz. 5-pole, sharp cutoff, Elliptic response, with 3
sections of group delay equalization. These filters were
designed for SinX/X compensated CCIR 601 luminance
applications and make an excellent post-filter following a
D/A converter.
3
4
IPCONN
IPCONN
PXCK
VSYNC
HSYNC
BLANK
B[0:9]
G[0:9]
R[0:9]
POWER
POWER
3003
PXCK_
VSYNC_
HSYNC
BLANK
B[0:9]
G[0:9]
R[0..9]
-HS
-VS
IOR
IOG
IOB
Figure 3. TMC2069P7C (10 Bit Triple DAC)
B[0:9]
G[0:9]
R[0:9]
TMC3003
-HS
-VS
IOR
IOG
IOB
OUTPUT FILTERS
FILTERS
Preliminary Information
TMC2069P7C
PRODUCT SPECIFICATION
Schematics
VSYNC
PXCK
B[0..9]
G[0..9]
R[0..9]
BLANK
HSYNC
VCC
C17
0.1
10
9
2
1
74ACT00
U2C
74ACT00
U2A
R[0:9]
B[0:9]
G[0:9]
8
3
E3
SELECT
74ACT00
U2B
6
7
8
9
10
11
12
13
14
15
19
20
21
22
23
24
25
26
27
28
G0
G1
G2
G3
G4
G5
G6
G7
G8
G9
B0
B1
B2
B3
B4
B5
B6
B7
B8
B9
29
40
41
42
43
44
1
2
3
4
5
TMC3003
CLK
B0
B1
B2
B3
B4
B5
B6
B7
B8
B9
G0
G1
G2
G3
G4
G5
G6
G7
G8
G9
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
SYNC
BLANK
4
74ACT125
6
1
3
74ACT125
U4
U3B
U3A
17
16
5
2
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
6
VCC
Figure 4. TMC3003, Passive Filters
5
4
R3
4.7K
B
RREF
VREF
0.1
2
D5
3.3K
R6
C29 IS NOT USED IF D5
IS INSTALLED
LT1004-1.2
39
38
37
32
C29
0.1
R7
412
1
3
5K
RV1
2
R8
412
WHEN USING OVER-021
FILTERS, R7 AND R8
SHOULD BE 750 OHMS
IOB
IOG
TP4
TP
C16
10
-HS
-VS
IOR
VDD
C15
0.1
-VS
G 35
C25
C14
0.1
R22 22
-HS
R 36
VDD
R21 22
COMP
C13
0.1
Preliminary Information
VCC
PRODUCT SPECIFICATION
TMC2069P7C
Schematics (continued)
5
6
IOB
IOG
IOR
-VS
-HS
500
RV2
1
500
RV3
3
75 1%
39 1%
2
R16
1
3
75 1%
R12
R19
31.6 1%
R15
2
39 1%
R11
IN
VEE
IN
VCC
1
BEAD
L11
BEAD
L10
BEAD
L15
BEAD
L14
BEAD
L13
BEAD
VCC L12
VEE
IN
VEE
1
1
VCC
7
V- X2
9 6
OUT
V+
7
9 6
V- X2
OUT
V+
7
9 6
V- X2
OUT
V+
12
U7
601-003
12
U6
601-003
12
U5
601-003
75 1%
R18
75 1%
R14
75 1%
R10
75
R13
JUMPER
JP2
75
R17
JP3
JUMPER
B
75
R20
JUMPER
JP4
TP8
G
TP7
R
TP6
Figure 5. TMC2069P7C
C40
0.1
C39
0.1
C38
0.1
C37
0.1
C36
0.1
C35
0.1
BLUE
VGA
TP2
HS
GREEN
SELECT
E6
VGA
TP3
VS
E5
SELECT
RED
VGA
1
1
1
SELECT
E4
Preliminary Information
2
BNC
J5
2
BNC
J4
2
BNC
J3
BLUE
GREEN
RED
CON15
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
J2
TMC2069P7C
PRODUCT SPECIFICATION
Schematics (continued)
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
EURO96F
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
P1A
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
G0
G1
G2
G3
G4
G5
G6
G7
G8
G9
B0
B1
B2
B3
B4
B5
B6
B7
B8
B9
VCC
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
EURO96F
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
P1B
+12V
PGM_IN
-12V
-12V
IE
-5V
-5V
-5V
XDIR
XHSYNC
XVSYNC
XPXCK
XRS3
XRS2
XRS1
XRS0
ANLGCHR
XEN
ANLGCMP
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
EURO96F
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
P1C
+12V
SDA
OE
BLANK
LOCK
D1
RESET
SCL
NTSC/PAL
CLAMP
RGB
VSYNC
HSYNC
HREF
VREF
ODDIN
CREF
PCK
PXCK
B[0:9]
G[0:9]
R[0:9]
JP5
R2
4.7K
VCC
DICE OE
RGB
JP1
Figure 6. IPCONN
R23
4.7K
VCC
R1
4.7K
VCC
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
G0
G1
G2
G3
G4
G5
G6
G7
G8
G9
B0
B1
B2
B3
B4
B5
B6
B7
B8
B9
P2A
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
HEADER 96
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
VEE
+12V
PGM_IN
-12V
-12V
IE
-5V
-5V
-5V
XDIR
XHSYNC
XVSYNC
XPXCK
XRS3
XRS2
XRS1
XRS0
ANLGCHR
XEN
ANLGCMP
Preliminary Information
CONNECTOR "P1" IS A FEMALE
CONNECTOR WHICH MATES
WITH THE MALE CONNECTOR
WITH THE PIN NUMBERS BEING
FLIPPED. EXAMPLE: P1A PIN 1
MATES WITH THE MALE
CONNECTOR PIN 32.
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
P2B
HEADER 96
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
+12V
SDA
OE
BLANK
LOCK
D1
RESET
SCL
NTSC/PAL
CLAMP
RGB
VSYNC
HSYNC
HREF
VREF
ODDIN
CREF
PCK
PXCK
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
P2C
HEADER 96
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
PXCK
VSYNC
HSYNC
BLANK
B[0:9]
G[0:9]
R[0:9]
PRODUCT SPECIFICATION
TMC2069P7C
Schematics (continued)
7
8
1
2
3
PWR3
J1
+
BEAD
L2
BEAD
+ C6
22 µF
C1
22 µF
L1
+ C5
0.47 µF
+ C2
0.47 µF
C7
0.1
C3
0.1
C8
0.01
C4
0.01
D4
LED
LED
D2
Figure 7. Power
D3
DIODE
DIODE
D1
VEE
VCC
LOOP
G1
VDD
Preliminary Information
LOOP
G2
LOOP
G3
TMC2069P7C
PRODUCT SPECIFICATION
Schematics (continued)
PRODUCT SPECIFICATION
TMC2069P7C
Table 1. TMC2069P7C Parts List
Qty.
Part Name
Reference Designator
Description
1
2
MiniReel: 645-823
C1,C6
22uf 25v Tantalum
2
2
MiniReel: 641-647
C2,C5
0.47 uf 25v Tantalum
3
1
MiniReel: 644-810
C16
10 uf 25v Tantalum
4
14
MiniReel: 605-611
C3,C7,C13,C14,C15,C17,C25,C29,
C35,C36,C37,C38,C39,C40
0.1uF
5
2
MiniReel: 605-510
C4,C8
0.01 uf
6
2
MiniReel: 76-4004
D1,D3
FM4004, Diode
7
1
HP: hlmp-1600
D2
LED, Red 5v
8
1
HP: hlmp-1620
D4
LED, Yellow 5v
9
1
Linear Technology
LT1004CH-1.235
D5
LT1004, 1.2
10
4
SECMA: 090320102
E3,E4,E5,E6
Subminiature switch, 2 pos. sip
11
3
G1,G2,G3
Wire Loop, gnd
12
5
AMP: 103747-2
JP1,JP2,JP3,JP4,JP5
Jumper, header
13
1
BEAU: 870503
BEAU: 871803
J1
Terminal block plug, and socket
14
1
AMP: 748390-5
J2
Con15, VGA
15
3
Amphenol: 31-5431
J3,J4,J5
BNC, Connector
16
8
Fair-Rite:
2743019447
L1,L2,L10,L11,L12,L13,L14,L15
Ferrite Bead
17
1
AMP: 650461-4
P1
EURO96F, Connector
18
1
AMP: 3-103817-0
P2
Header-96, 3x32
19
1
Bourns: 3262W502
RV1
5k ohm, pot.
20
2
Bourns: 3262W501
RV2,RV3
500 ohm, pot.
21
4
MiniReel: 615-848
R1,R2,R3,R23
4.7k ohm
22
1
MiniReel: 615-844
R6
3.3k ohm
23
1
MiniReel: 615-347
R7
475 ohm
24
1
MiniReel: 615-375
R8
750 ohm
25
5
MiniReel: 615-275
R10,R12,R14,R16,R18
75 ohm 1%
26
2
MiniReel: 615-809
R11,R19
39 ohm 1%
27
3
MiniReel: 655-275
R13,R17,R20
75 ohm
28
1
MiniReel: 615-231
R15
31.6 ohm 1%
29
2
MiniReel: 615-804
R21,R22
22 ohm
30
6
Mouser:
ME151-203-100
TP2,TP3,TP4,TP6TP7,TP8
Test Points
31
1
Motorola: 74ACT00
U2
surface mount IC
32
1
Motorola: 74ACT125
U3
surface mount IC
33
1
Fairchild: TMC3003
U4
surface mount IC
34
3
601-003
U5,U6,U7
Active filters
35
2
CCI: B500-2-0.5-FO
Shield
Board stiffener used as a shield
Special order part
Preliminary Information
Item
9
TMC2069P7C
PRODUCT SPECIFICATION
INPUT 96 Way Connector (Female)
Preliminary Information
Row A
Row B
Row C
32
+5V
32
GND
32
+5v
31
D1 or R/V [bit 0]
31
+5V
31
GND
30
D1 or R/V [bit 1]
30
+5V
30
PXCK
29
D1 or R/V [bit 2]
29
+5V
29
GND
28
D1 or R/V [bit 3]
28
GND
28
PCK
27
D1 or R/V [bit 4]
27
Analog Composite/luma
27
GND
26
D1 or R/V [bit 5]
26
GND
26
CREF
25
D1 or R/V [bit 6]
25
Analog chroma
25
GND
24
D1 or R/V [bit 7]
24
XEN
24
VSYNC
23
D1 or R/V [bit 8]
23
GND
23
HSYNC
22
D1 or R/V [bit 9]
22
XDIR
22
HREF
21
Comp, G/Y, or Luma [bit 0]
21
XHSYNC
21
VREF
20
Comp, G/Y, or Luma [bit 1]
20
XVSYNC
20
ODD IN
19
Comp, G/Y, or Luma [bit 2]
19
XPXCK
19
GND
18
Comp, G/Y, or Luma [bit 3]
18
XRS [bit 3]
18
NTSC/PAL
17
Comp, G/Y, or Luma [bit 4]
17
XRS [bit 2]
17
CLAMP pulse
16
Comp, G/Y, or Luma [bit 5]
16
XRS [bit 1]
16
RGB
15
Comp, G/Y, or Luma [bit 6]
15
XRS [bit 0]
15
14
Comp, G/Y, or Luma [bit 7]
14
GND
14
13
Comp, G/Y, or Luma [bit 8]
13
-5V
13
12
Comp, G/Y, or Luma [bit 9]
12
-5V
12
LOCK
11
Chroma or B/U [bit 0]
11
-5V
11
D1
10
Chroma or B/U [bit 1]
10
GND
10
RESET
9
Chroma or B/U [bit 2]
9
PGM_IN
9
SCL
8
Chroma or B/U [bit 3]
8
-12V
8
GND
7
Chroma or B/U [bit 4]
7
-12V
7
SDA
6
Chroma or B/U [bit 5]
6
IE (input enable)
6
OE (output enable)
5
Chroma or B/U [bit 6]
5
GND
5
BLANK (DAC)
4
Chroma or B/U [bit 7]
4
3
Chroma or B/U [bit 8]
3
2
Chroma or B/U [bit 9]
2
+12V
2
+12V
1
GND
1
GND
1
GND
10
4
3
TMC2069P7C
PRODUCT SPECIFICATION
Input Edge Connector Design Notes
Signal Flow FORWARD
Chrominance
BPF and
Clamp Circuit
TMC1185
Preliminary Information
SW1
TMC2072
Digital
LPFs
TMC3003
Decoder
Input Logic
TMC2242
SW2
High Quality
LPF
FPGA
High Quality
LPF
High Quality
LPF
10 bit
ADCs
1 1
EPROM
TMC2242
32 32
2:1 Mux
TMC1185
1 1
Y/Composite
LPF and
Clamp Circuit
TMC22153
SW1
D.C. Supply
32 32
+5V to -5V
Low Quality
LPF
Low Quality
LPF
Low Quality
LPF
Signal Flow BACKWARD
Figure 8.
Important:
Boards with different revision letters may not be compatible. Damage may occur if they are connected together!
• The RESET pin on the input edge connector should be
connected directly to the RESET pin on the output
connector. A link should be used to connect any pulse to
the RESET line.
• XPXCK is a two times pixel clock fed BACKWARD.
• XHSYNC and XVSYNC are timing reference signals fed
BACKWARD.
• The MASTER/SLAVE, XDIR, PGM_IN and RESET pins
on the input edge connector should be connected to +5V
through a 10k pull up resistor.
• The MASTER/SLAVE signal states if a board is a
MASTER or a SLAVE board. This signal is fed
FORWARD. A MASTER board produces the PXCK,
HSYNC, and VSYNC signals, and a SLAVE board
expects to receive XPXCK, XHSYNC, XVSYNC, etc .
• The CLAMP signal is fed BACKWARD from a MASTER
to a SLAVE board. The CLAMP signal should not be fed
FORWARD.
• XDIR is fed FORWARD and controls in which direction
the XRS[3:0] data flows.
•
•
•
•
• PGM_IN is a negative going pulse, logically ANDed with
the onboard program start pulse, for initiating the
programming sequence for components on that board.
Care must be taken to ensure that multiple devices do not
try to drive the RBUS at any given time. Minimum width
of PGM_IN is 1uS.
11
Related Products
TMC2068P7C Decoder demonstration board
TMC2067P7C ADC demonstration board
Raydemo software
TMC2070P7C R-bus interface board
TMC2069P7C
PRODUCT SPECIFICATION
Ordering Information
Product Number
Temperature
Range
Speed
Grade
Screening
Package
TMC2069P7C
25°C
80 MHz
Commercial
4” by 5” Printed Circuit Board
TMC2069P7C
TMC2069P7CG1
25°C
80 MHz
Commercial
4” by 5” Printed Circuit Board
TMC2069P7CG
Package Marking
Notes:
1. Setup for use with Genesis 10-bit line doubler and comes with OVER-21 filters instead of 601-003 filters.
For information call MMC at 414-785-6516. [email protected]
Preliminary Information
A schematic database is available in OrCADä format. Contact the factory.
The TMC2069P7C Demonstration Board, design documentation, and software are provided as a design example for the
customers of Fairchild. Fairchild makes no warranties, express, statutory, or implied regarding merchantability or fitness for a
particular purpose.
FCC Compliance
This device has not been approved by the Federal Communications Commission (FCC). This board is intended for the evaluation of Fairchild products only. This device is not and may not be offered for sale or lease or sold or leased until the approval of
the FCC has been obtained.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
5/20/98 0.0m 001
Stock# DS7002069P
Ó 1998 Fairchild Semiconductor Corporation