TC78B002FTG
TOSHIBA CMOS Integrated Circuit
Silicon Monolithic
TC78B002FTG
Single Phase Full-wave Driver for Fan Motor
TC78B002FTG is a single phase full-wave driver for fan motor. It
has a DMOS device in an output transistor.
A highly effective drive is possible by adopting a DMOS output
driver with low ON resistance and a PWM drive system.
TC78B002FTG
Features
•
Single-phase full-wave drive
•
Motor power supply voltage: VM =16V (maximum operating
range)
•
Output current: Iout = 1.5A (max.)
•
PWM control
•
Built-in oscillation circuit (External resistor)
•
Soft switching drive
•
Lock protection, Automatic recovery
•
Quick start
•
Built in hall bias
•
Rotation Speed Detection (FG) and Lock Detection (RDO) Output
•
Current limit function
•
Built in over current protection
•
Built in thermal shut down circuit
P-WQFN16-0303-0.50-002
Weight: 0.02g (typ)
1
2013-03-19
TC78B002FTG
24kΩ
0.1uF
Block Diagram (Application circuit)
2
2013-03-19
TC78B002FTG
Pin Assignment
OUT2
VM
VMI
VSOFT
RS
GND
VREG
HP
3
2013-03-19
TC78B002FTG
Pin Description
Pin No.
Pin name
Description
1
HM
2
OSCR
3
RDO
Output pin for lock detection
4
OUT1
Motor output pin 1
5
GND
6
RS
Connection pin for detecting resistor of output current
7
VM
Power supply pin
8
OUT2
Motor output pin 2
9
FG
10
VSP
11
VOFF
12
LA
Setting pin for lead angle
13
VMI
Setting pin for minimum output duty
14
VSOFT
Setting pin for soft switching term
15
VREG
Output pin for reference voltage of 5 V
16
HP
Hall signal input pin－
Connection pin for resistor of oscillation circuit
Connection pin for ground
Rotating output pin
Setting pin for output duty
Setting pin for OFF term in switching conducting phase
Hall signal input pin +
4
2013-03-19
TC78B002FTG
Absolute Maximum Ratings (Ta = 25°C)
Characteristics
Symbol
Rating
Unit
Power supply voltage
VM
18
Input voltage
VIN
-0.3~6
(Note 1)
V
VOUT
18
(Note 2)
V
(Note 3)
Output voltage
OUT1,OUT2
V
IOUT
1.5
IOUT
10
mA
IFG
10
mA
IRDO
10
mA
Power dissipation
PD
2.5
Operating temperature
Topr
-40 to 105
°C
Storage temperature
Tstg
-55 to 150
°C
Output current
VREG
FG pin sink current
RDO pin sink current
(Note 4)
A
W
Note: The absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded, even for a
moment. Do not exceed any of these ratings. Exceeding the rating (s) may cause the device breakdown, damage or
deterioration, and may result injury by explosion or combustion. Please use the IC within the specified operating ranges.
Note 1: VMI, VSP, VSOFT, VOFF, and LA pins
Note 2: OUT1, OUT2, FG and RDO pins
Note 3: Power dissipation must not be exceed
Note 4: Mounted on a glass epoxy board (74mm×74mm×1.6mm 4 layers, FR-4 board)
Package Power Dissipation
PD (W)
3
(1)
2.5
2
1.5
1
(2)
0.5
0
0
25
50
75
100
125
150
Ta (℃)
(1) When mounted on the board (74mm×74mm×1.6mm 4 layers, FR-4 board) Rth(j-a)=50℃/W
(2) When mounted on the board (⌀40mm×1.6mm 1 layer, FR-4 board) Rth(j-a)=160℃/W
Operating Ranges (Ta = 25°C)
Characteristics
Symbol
Min
Typ.
Max
Unit
Power supply voltage
VMopr1
5.5
12
16
V
Power supply for low voltage
operation
VMopr2
3.5
4.5
5.5
V
Internal oscillation frequency (Note 1)
fOSC
8
10
12
MHz
PWM frequency
fPWM
20
25
30
kHz
VIN
0
⎯
VREG
V
Input voltage (Note 2)
Note 1: In low-voltage operation, operation with frequency more than 10MHz is not covered under guarantee.
Note 2: VMI, VSOFT, VOFF, and LA pins
5
2013-03-19
TC78B002FTG
Electrical Characteristics (Ta = 25°C and VM = 12 V, unless otherwise specified.)
Characteristics
Min
Typ.
Max
Unit
⎯
3
5
mA
VCMRH
0
⎯
VREG
-1.5
V
Input voltage swing
VH
40
⎯
⎯
mV
Input current
IH
|VHP-VHM|≧100mV
⎯
⎯
1
μA
Power supply current
Common mode input voltage
range
Hall signal
input
Symbol
IVM
Test conditions
VM = 12 V, VREG = OPEN
Hall input=100Hz, output OPEN
Hysteresis＋Voltage
VHHYS+
(Design target value) (Note 1)
5
10
15
mV
Hysteresis－Voltage
VHHYS-
(Design target value) (Note 1)
-15
-10
-5
mV
VREG pin voltage
VREG
VREG pin output source current=10mA
4.5
5.0
5.5
V
Maximum voltage of ADC convertor
VADC
(Design target value) (Note 1)
⎯
VREG
-0.75
⎯
V
15
20
25
%
43
50
57
%
70
80
90
%
ROSC=24kΩ, output load:1kΩ
Duty(20)
VSP=1.2V, VMI=0V or
VMI=1.2V, VSP=0V
ROSC=24kΩ, output load:1kΩ
Output On Duty (Note 1)
Duty(50)
VSP=2.2V, VMI=0V or
VMI=2.2V, VSP=0V
ROSC=24kΩ, output load:1kΩ
Duty(80)
VSP=3.2V, VMI=0V or
VMI=3.2V, VSP=0V
VAD (L)
Threshold voltage of stopping output
0.5
0.55
⎯
VAD (H)
Threshold voltage of full output
⎯
3.9
4.3
VSP response time
TVSP
(Design target value) (Note 1)
⎯
⎯
10
ms
Internal oscillation frequency
fOSC
ROSC=24kΩ
Measured by internal divided frequency
8
10
12
MHz
PWM frequency
fPWM
ROSC=24kΩ
20
25
30
kHz
Pin input current
IIN
VSP,VMI,VSOFT,VOFF, and LA pins
input voltage 0~VREG
⎯
⎯
1
μA
IOUT = 0.2A
⎯
1.6
2.5
Ω
⎯
⎯
0
43
⎯
47
84
⎯
90
⎯
⎯
0
43
⎯
47
84
⎯
90
⎯
⎯
0
10
⎯
12
21
⎯
24
VSP threshold
Output ON resistance
Ron(H+L)
TSOFT(0)
Soft switching time (Note 1)
TSOFT(45)
TSOFT(90)
TOFF(0)
OFF term
(Note 1)
TOFF(45)
TOFF(90)
TLA(0)
Lead angle correction
(Note 1)
TLA(11.25)
TLA(22.5)
ROSC=24kΩ, Hall input=100Hz
VOFF=0V ,
VSOFT=0V
ROSC=24kΩ, Hall input=100Hz
VOFF=0V ,
VSOFT=VREG*0.45
ROSC=24kΩ, Hall input=100Hz
VOFF=0V ,
VSOFT= VREG
ROSC=24kΩ, Hall input=100Hz
VSOFT=0V,
VOFF=0V
ROSC=24kΩ, Hall input=100Hz
VSOFT=0V,
VOFF= VREG*0.45
ROSC=24kΩ, Hall input=100Hz
VSOFT=0V,
VOFF= VREG
ROSC=24kΩ, Hall input=100Hz
LA=0V
ROSC=24kΩ, Hall input=100Hz
LA= VREG*0.23
ROSC=24kΩ, Hall input=100Hz
LA= VREG
6
V
°
°
°
2013-03-19
TC78B002FTG
FG
RDO
pin
Characteristics
Symbol
Output low voltage
VOUT(L)
Output leakage current
IOUT(H)
Current limit detecting voltage for RS pin
Masking time of current limit detection
OFF time of over current protection
Min
Typ.
Max
Unit
IFG/RDO=5mA
⎯
⎯
0.3
V
VFG/RDO=5V
⎯
⎯
1
μA
0.27
0.3
0.33
V
VRS
Tmask
(Design target value) (Note 1)
1.2
1.5
1.8
μs
ILIM
(Design target value) (Note 1)
⎯
2.5
⎯
A
TISDMASK
(Design target value) (Note 1)
⎯
2
⎯
μs
TISDOFF
(Design target value) (Note 1)
⎯
100
⎯
ms
⎯
170
⎯
℃
⎯
40
⎯
℃
0.32
0.4
0.48
s
3.2
4
4.8
s
2.6
2.9
3.2
V
2.9
3.2
3.5
V
Operating current of over current protection
Masking time of over current protection
Test conditions
Operating temperature of thermal shutdown
circuit
TSD
Hysteresis of thermal shutdown circuit
ΔTSD
ON time of lock detection
TON
OFF time of lock detection
TOFF
VUVLO
Detecting voltage for low voltage
VPORRL
Output switching characteristics
Junction temperature
(Design target value) (Note 1)
(Design target value) (Note 1)
ROSC=24kΩ
(Design target value) (Note 1)
ROSC=24kΩ
(Design target value) (Note 1)
Operation voltage
(Design target value) (Note 1)
Recovery voltage
(Design target value) (Note 1)
tr
(Design target value)
(Note 1)
⎯
100
⎯
tf
(Design target value)
(Note 1)
⎯
100
⎯
ns
Note 1: Pre-shipment testing is not performed.
7
2013-03-19
TC78B002FTG
Reference Data
Hall input hysteresis voltage. VHHYS [mV]
Power supply current. IVM [mA]
3
125℃
25℃
‐40℃
2
Operation Voltage Range
1
3
6
9
12
15
Supply voltage. VM[V]
20
10
125℃
25℃
‐40℃
0
‐40℃
25℃
125℃
‐10
Operation Voltage Range
‐20
18
3
Fig.1 Power supply current
18
6
‐40℃
VREG output voltage. VREG[V]
VREG output voltage. VREG[V]
9
12
15
Supply voltage. VM[V]
Fig.2 Hall input Hysteresis voltage
5
4.9
25℃
125℃
4.8
4.7
4.6
18V
5
12V
4
3.5V
3
2
0
2
4
6
8
10
0
Output Current. IVREG[mA]
2
4
6
8
10
Output Current. IVREG[mA]
Fig.3 VREG pin voltage (VM=12V)
Fig.4 VREG pin voltage (Ta=25℃)
4
3
Ouput ON resistance.RON(H+L) [Ω]
4
Ouput ON resistance.RON(H+L) [Ω]
6
125℃
2
25℃
‐40℃
1
3
3.5V
2
12V
1
0
0
0
0.3
0.6
0.9
1.2
0
1.5
Output Current. IOUT[A]
0.3
0.6
0.9
1.2
1.5
Output Current. IOUT[A]
Fig.6 Output ON resistance (Ta=25℃)
Fig.5 Output ON resistance (VM=12V)
8
2013-03-19
TC78B002FTG
1
FG low voltage. VOUT(L)[V]
FG low voltage. VOUT(L)[V]
1
0.8
0.6
125℃
25℃
0.4
‐40℃
0.2
0.8
0.6
3.5V
0.4
12V
0.2
0
0
0
2
4
6
8
0
10
2
6
8
10
Output Current. IFG/RDO[mA]
Output Current. IFG/RDO[mA]
Fig.8 FG/RDO pin Output low voltage (Ta=25℃)
Fig.7 FG/RDO pin Output low voltage (VM=12V)
12
0.32
Current limit detecting voltage . VRS [V]
Internal oscillation frequency. fOSC [MHz]
4
11
125℃
25℃
10
‐40℃
9
Operation Voltage Range
8
125℃
25℃
0.31
‐40℃
0.3
0.29
Operation Voltage Range
0.28
3
6
9
12
15
Supply voltage. VM[V]
18
3
Fig.9 Internal oscillation frequency
6
9
12
15
Supply voltage. VM[V]
18
Fig.10 Current limit detecting voltage for RS pin
9
2013-03-19
TC78B002FTG
I/O Equivalent Circuits
Pin name
HP
HM
I/O signal
Hall signal input pin
Equivalent circuit
VREG
In-phase input voltage range
0V to VREG-1.5V
VREG
HP
HM
VSP
VMI
LA
Control voltage input pin
VSOFT
VOFF
Control voltage input pin
VSP
VMI
LA
VREG
VSOFT
VOFF
VREG
Voltage output pin
VREG = 5V (typ)
VM
VREG
FG
RDO
Digital output pin
FG
RDO
Open drain output
It should be pulled up externally to output
High.
10
2013-03-19
TC78B002FTG
Pin name
VM
OUT1
OUT2
RS
I/O signal
Motor output pin
Equivalent circuit
VM
OUT1
OUT2
RS
0.3V
OSCR
Connection pin for resistor of oscillation circuit
VREG
VREG
OSCR
11
2013-03-19
TC78B002FTG
Functional Description
The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes.
Timing charts may be simplified for explanatory purposes.
1.
Basic Operation
At startup, the motor is driven by a square-wave drive by determining the conducting phase with hall input
signal.
When hall signal frequency reaches 5Hz (typ) or more, the motor is driven by the conducting pattern which is
generated by estimating the next conducting timing from the hall input signal.
<I/O function table>
HP
HM
OUT1
OUT2
FG
RDO
H
L
L
PWM
OFF
L
L
H
PWM
L
L
L
H
L
L
OFF
OFF
⎯
L
H
OFF
L
L
⎯
⎯
⎯
OFF
OFF
⎯
OFF
⎯
⎯
OFF
OFF
⎯
⎯
Mode
Rotating (Note 1)
Current limit drive (Note 2)
Lock protection (Note 3)
Thermal shutdown
Note 1：Conducting phase is switched by the hall input signal. FG signal is outputted according to the phase-switching.
Conducting timing may be preceded depending on the lead angle set.
Note 2：Upper power transistor is turned off during current limitation. It recovers automatically every PWM frequency.
Note 3：FG output changes depending on the rotor position in the lock protection mode the same as rotating mode.
Timing chart (Normal rotation)
Without soft switching,
without lead angle
With soft switching, with lead angle
12
2013-03-19
TC78B002FTG
Timing chart (Lock protection)
2.
VSP/ VMI Input Pin
Output starts when VSP pin at the voltage of more than VAD(L). And it turns off at the voltage of VAD(L) or less.
Minimum voltage of VSP pin is clipped by the voltage of VMI pin.
In case the minimum duty setting by VMI pin is not used, connect the VMI pin to the GND pin.
Analog voltage which is input to VSP pin and VMI pin is converted by AD convertor of 7 bit, and the output
PWM duty is controlled.
0
≤ VSP, VMI ≤
VAD (L)
→
Duty = 0%
VAD (L)
< VSP, VMI ≤
VAD (H)
→
Below figure (17/127 to 116/127)
VAD (H)
< VSP, VMI ≤
VREG
→
Duty = 100% (117/127 to 127/127)
(PWM duty indicates the peak value of output because this circuit has a soft switching function.)
3.
Hall Input Signal
Voltage range of hall input
Characteristics of hall signal shown below are inputted to the hall input pin.
VH: 40mV or more
VHHYS+=10mV, VHHYS-=-10mV
*Though hall amplifier operates when VH is 40mV or
more, please widen the oscillation as possible to
stabilize the time width.
(200mV or more is recommended.)
13
2013-03-19
TC78B002FTG
4.
OSC Frequency and PWM Frequency
Oscillation frequency is approximated by below formula.
fOSC = 1/(2C[F]×ROSC[Ω]) [Hz]= 1/(2×2.08e-12[F]×ROSC[Ω]) [Hz]
Oscillation frequency fOSC is 10MHz(typ) when external resistor ROSC is 24kΩ
PWM frequency fPWM=fOSC/400.
5.
PWM Output Drive
In PWM drive, upper power transistor is turned on and off repeatedly.
PWM ON
PWM ON → OFF
PWM ON
In switching phase, power transistor operates in below order.
VM
M
RS
RF
PWM ON
6.
PWM OFF
Short brake
200ns (Design target value)
PWM OFF
PWM ON
Startup Sequence
Output starts when VSP pin at the voltage of VAD(L) or more. In order to ensure the starting torque, PWM
output is 50% duty when the motor rotating speed is lower than 5Hz (typ).
When output phase is switched during startup sequence, PWM OFF term of 1ms (typ) is inserted to reduce the
regenerating current to the power supply.
50% duty output
14
Duty is output by VSP voltage
2013-03-19
TC78B002FTG
7. Turning Off
Output turns off when the voltage of VSP pin is VAD(L) or less.
Before all output power transistors are turned off, the time, until the edge of FG signal is detected twice or the
frequency of 5 Hz or less is detected, is defined PWM OFF term.
0.55V
0.55V
Detecting
5Hz or less
15
2013-03-19
TC78B002FTG
8. Soft Switching
Soft switching is performed by changing the output PWM duty gradually when conducting phase switches.
The time of soft switching is determined by the voltage of VSOFT pin and that of VOFF pin.
T1
T1
HP-PM
HP-PM
T1'
Toff
OUT1
T1'
Toff
Toff
OUT1
Tsoft
Tsoft
OUT2
OUT2
Tsoft > Toff
Toff
Tsoft
Tsoft
Tsoft < Toff
Voltage of VSOFT > Voltage of VOFF:
Total term of soft switching (Tsoft) is determined by the time of prior hall signal (180°) and the voltage of
VSOFT pin. OFF term is provided during soft switching. The time of OFF term (Toff) is determined by the prior
hall signal (180°) and the voltage of VOFF pin. During OFF term, the state of the power transistor is in the PWM
OFF mode. Soft switching operates in the period other than the OFF term, and output PWM duty changes by 16
steps in maximum.
Tsoft
Tsoft
Toff
Toff
⑯
⑭ ⑮
④
③
②
①
Voltage of VSOFT < Voltage of VOFF:
It does not have the term of soft switching operation which changes the duty, but it has the OFF term. OFF
term (Toff) is determined by the time of the prior hall signal (180°) and the voltage of VOFF pin. During OFF
term, the sate of the power transistor is in the PWM OFF mode.
When next edge does not occur though time of T1’ passes, last output state continues.
Conducting pattern is reset in synchronization with the up edge and the down edge of the hall signal.
So, waveform indicates non-contiguous every reset when hall signal is offset and in speed up/slow down mode.
16
2013-03-19
TC78B002FTG
<Relation between the voltage of VSOFT pin and the term of soft switching>
VSOFT
＝ 0V
→ 0°
VSOFT
＝ VADC
→ 87.2° (In case voltage of VADC or more is input, it is set to 87.2°.)
Step
VSOFT
(V)
Term
(°)
Step
VSOFT
(V)
Term
(°)
Step
VSOFT
(V)
Term
(°)
1
0.00
0.0
12
1.51
30.9
23
3.02
61.9
2
0.14
2.8
13
1.65
33.8
24
3.15
64.7
3
0.27
5.6
14
1.78
36.6
25
3.29
67.5
4
0.41
8.4
15
1.92
39.4
26
3.43
70.3
5
0.55
11.3
16
2.06
42.2
27
3.56
73.1
6
0.69
14.1
17
2.19
45.0
28
3.70
75.9
7
0.82
16.9
18
2.33
47.8
29
3.84
78.8
50.6
30
3.98
81.6
53.4
31
4.11
84.4
32
4.25
87.2
8
0.96
19.7
19
9
1.10
22.5
20
10
1.23
25.3
21
2.74
56.3
11
1.37
28.1
22
2.88
59.1
2.47
Term
2.60
17
2013-03-19
TC78B002FTG
< Relation between the voltage of VOFF pin and the term of turning off>
VOFF
＝ 0V
→ 0°
VOFF
＝ VADC
→ 87.2° (In case voltage of VADC or more is input, it is set to 87.2°)
VOFF
(V)
Term
(°)
Step
VOFF
(V)
Term
(°)
Step
VOFF
(V)
Term
(°)
1
0.00
0.0
12
1.51
30.9
23
3.02
61.9
2
0.14
2.8
13
1.65
33.8
24
3.15
64.7
3
0.27
5.6
14
1.78
36.6
25
3.29
67.5
4
0.41
8.4
15
1.92
39.4
26
3.43
70.3
5
0.55
11.3
16
2.06
42.2
27
3.56
73.1
6
0.69
14.1
17
2.19
45.0
28
3.70
75.9
7
0.82
16.9
18
2.33
47.8
29
3.84
78.8
8
0.96
19.7
19
2.47
50.6
30
3.98
81.6
9
1.10
22.5
20
2.60
53.4
31
4.11
84.4
10
1.23
25.3
21
2.74
56.3
32
4.25
87.2
11
1.37
28.1
22
2.88
59.1
Term
Step
18
2013-03-19
TC78B002FTG
<PWM change during soft switching>
Soft switching after conducting phase switch:
It changes gradually from 4% to 100% of output PWM duty determined by the voltage of VSP pin. Its number
of steps is 16 in maximum.
Soft switching before conducting phase switch:
It changes gradually from 100% to 4% of output PWM duty determined by the voltage of VSP pin. Its number
of steps is 16 in maximum.
In case the term of soft switching operation is 22.5° or less, number of steps is less than16 in the soft switching
term.
The relation of steps of soft switching and the output PWM duty ratio is shown below.
Output ratio (%)
Step
Output ratio (%)
Step
Output ratio (%)
1
4
7
59
13
94
2
14
8
67
14
97
3
25
9
74
15
99
4
34
10
80
16
100
5
42
11
86
6
52
12
91
Steps of PWM change
Output ratio
Step
Term of soft switching operation
19
2013-03-19
TC78B002FTG
Lead Angle
Lead angle of the conducting signal can be set in the range of 0 to 22.5° against the hall signal.
Lead angle is set by analog input of LA pin (The range of 0 to VADC is divided into 32 steps and lower 17 steps
are used.)
LA
＝ 0V
→ Lead angle 0°
LA
＝ VADC
→ Lead angle 22.5° (In case of inputting the voltage of VADC or more.)
Step
LA
(V)
Lead angle
(°)
Step
LA
(V)
Lead angle
(°)
Step
LA
(V)
Lead angle
(°)
0
0.00
0.0
6
0.82
8.4
12
1.65
16.9
1
0.14
1.4
7
0.96
9.8
13
1.78
18.3
2
0.27
2.8
8
1.10
11.3
14
1.92
19.7
3
0.41
4.2
9
1.23
12.7
15
2.06
21.1
4
0.55
5.6
10
1.37
14.1
16
2.19
22.5
5
0.69
7.0
11
1.51
15.5
Lead angle
9.
20
2013-03-19
TC78B002FTG
10. Lock protection
It monitors the motor rotation by the hall signal and operates when the zero cross of the hall signal can not be
detected for certain time (TON) or more. When lock protection operates, the upper output transistor is turned off
for 1ms(typ) and then all output power transistors are turned off. The motor drive resumes certain time (TOFF)
after the lock protection operates.
TON = 0.4s (typ)
TOFF = 4s (typ)
1ms
1ms
FG is outputted by the hall signal even while the lock protection is operating.
In case the zero cross of the hall signal is detected twice in re-startup, the lock protection is cleared and the
RDO signal outputs low again.
11. Quick Start
During TOFF of lock protection, lock protection is cleared when the voltage of VSP pin is set to VAD(L) or less.
When VAD(L) or more is applied to the VSP pin again, the motor restarts operating quickly without waiting for
the end of the TOFF term.
1ms
0.55V
Because the voltage of VSP pin is detected through A/D circuit, the voltage of VSP pin should be kept at VAD(L)
or less for VSP response time (TVSP) or more in order to clear the lock protection.
Quick start is disabled when the minimum of the duty is configured by applying the voltage of VAD(L) or more
to VMI pin.
21
2013-03-19
TC78B002FTG
12. Current Limit
This function operates when the output voltage reaches the current limit detection voltage (VRS = 0.3 V (typ)).
It is detected by the resistor RF.
Current value which over current
protection operates (IOUT)
Over current detection voltage (VRS)
Detection resistance (RF)
=
When RF=0.51Ω, IOUT=0.3V (typ)/0.51Ω=588mA
VM
OUT1
M
OUT2
0.3V
RS
RF
IOUT
During the current limit operation, the operation mode is moved to PWM OFF state by turning off the upper
output power transistor. The operation resumes at the next PWM ON timing.
Masking time is configured to avoid malfunction by noise.
0.3V (typ)
RS端子
Voltage
of
電圧
RS
pin
1.5μs
2us
Detection
電流リミット
term of
検出期間
current limit
Internal
内部
PWM
PWM
OUT1
OUT2
(In case HP = L and HM = H)
22
2013-03-19
TC78B002FTG
13. Over Current Protection (ISD)
Detection of current of the output power transistor is incorporated.
Each current flowing through four power transistors is detected individually. When the current exceeds the
detection value, the related output power transistor is turned off. Then all output power transistors are turned
off 1ms(typ) after this related output power transistor is turned off.
Timer is incorporated in this circuit. The motor operation resumes OFF time of 100ms (typ) after the over
current is detected. When state of over current continues, over current protection operates repeatedly. In case
this protection operates 8 times repeatedly, the motor operation does not resume automatically. The output
power transistor keeps turned off. In order to clear this state, VSP or the power supply should be applied again.
Design target value of current limit for over current protection is 2.5A. Masking term of 2 μs (typ) is configured
to avoid malfunction by noisy pulse current.
14. Thermal Shutdown Circuit (TSD)
Thermal shutdown circuit (TSD) operates when Tj rises to 170℃(typ) or more. All output power transistors are
turned off after a 1ms(typ) PWM OFF term during which upper output power transistor is turned off.
The operation resumes when the temperature falls to 130℃(typ) or less.
Junction
temperature
Internal TSD signal
Normal operation
Normal operation
15. Under Voltage Lockout Protection (UVLO)
This IC has an under voltage lockout protection (UVLO).
The power supply voltage of VM and the voltage of VREG are monitored. When each of them falls to 2.9 V (typ)
or less, it is recognized as low voltage and the circuit is turned off. The normal operation resumes when both
voltage recovers to 3.2V (typ) or more.
VM
voltage
VM電圧
VREG voltage
VREG電圧
3.1V (typ)
3.2V
2.9V
2.8V (typ)
UVLO
protection
UVLO動作
Internal
UVLO
内部UVLO
解除信号
OUT1,OUT2
FG,RDO
Normal
operation
通常動作
23
Normal
通常動作
operation
2013-03-19
TC78B002FTG
Package Dimensions
P-WQFN16-0303-0.50-002
Unit: mm
3.0
S
0.05
S
(0.75)
A
4
16
1.50±0.05
5
8
13
12
1.50±0.05
0.25±0.05
0.5
1
B
0.30±0.07
(0.75)
0.5
0.75max
0.1 S
0.70±0.05
0.05max
1.5
3.0
1.5
9
×4
0.1 S AB
0.05 M
24
S AB
2013-03-19
TC78B002FTG
Notes on Contents
1. Block Diagrams
Some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for explanatory
purposes.
2. Equivalent Circuits
The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes.
3. Timing Charts
Timing charts may be simplified for explanatory purposes.
4. Application Circuits
The application circuits shown in this document are provided for reference purposes only. Thorough evaluation is
required, especially at the mass production design stage.
Toshiba does not grant any license to any industrial property rights by providing these examples of application circuits.
5. Test Circuits
Components in the test circuits are used only to obtain and confirm the device characteristics. These components and
circuits are not guaranteed to prevent malfunction or failure from occurring in the application equipment.
IC Usage Considerations
Notes on handling of ICs
[1] The absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded, even for a
moment. Do not exceed any of these ratings.
Exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result injury by
explosion or combustion.
[2] Use an appropriate power supply fuse to ensure that a large current does not continuously flow in case of over current
and/or IC failure. The IC will fully break down when used under conditions that exceed its absolute maximum ratings,
when the wiring is routed improperly or when an abnormal pulse noise occurs from the wiring or load, causing a large
current to continuously flow and the breakdown can lead smoke or ignition. To minimize the effects of the flow of a
large current in case of breakdown, appropriate settings, such as fuse capacity, fusing time and insertion circuit
location, are required.
[3] If your design includes an inductive load such as a motor coil, incorporate a protection circuit into the design to
prevent device malfunction or breakdown caused by the current resulting from the inrush current at power ON or the
negative current resulting from the back electromotive force at power OFF. IC breakdown may cause injury, smoke or
ignition.
Use a stable power supply with ICs with built-in protection functions. If the power supply is unstable, the protection
function may not operate, causing IC breakdown. IC breakdown may cause injury, smoke or ignition.
[4] Do not insert devices in the wrong orientation or incorrectly.
Make sure that the positive and negative terminals of power supplies are connected properly.
Otherwise, the current or power consumption may exceed the absolute maximum rating, and exceeding the rating(s)
may cause the device breakdown, damage or deterioration, and may result injury by explosion or combustion.
In addition, do not use any device that is applied the current with inserting in the wrong orientation or incorrectly
even just one time.
25
2013-03-19
TC78B002FTG
Points to remember on handling of ICs
(1) Over current Protection Circuit
Over current protection circuits (referred to as current limiter circuits) do not necessarily protect ICs under all
circumstances. If the over current protection circuits operate against the over current, clear the over current status
immediately.
Depending on the method of use and usage conditions, such as exceeding absolute maximum ratings can cause the
over current protection circuit to not operate properly or IC breakdown before operation. In addition, depending on
the method of use and usage conditions, if over current continues to flow for a long time after operation, the IC may
generate heat resulting in breakdown.
(2) Thermal Shutdown Circuit
Thermal shutdown circuits do not necessarily protect ICs under all circumstances. If the thermal shutdown circuits
operate against the over temperature, clear the heat generation status immediately.
Depending on the method of use and usage conditions, such as exceeding absolute maximum ratings can cause the
thermal shutdown circuit to not operate properly or IC breakdown before operation.
(3) Heat Radiation Design
In using an IC with large current flow such as power amp, regulator or driver, please design the device so that heat is
appropriately radiated, not to exceed the specified junction temperature (Tj) at any time and condition. These ICs
generate heat even during normal use. An inadequate IC heat radiation design can lead to decrease in IC life,
deterioration of IC characteristics or IC breakdown. In addition, please design the device taking into considerate the
effect of IC heat radiation with peripheral components.
(4) Back-EMF
When a motor rotates in the reverse direction, stops or slows down abruptly, a current flow back to the motor’s power
supply due to the effect of back-EMF. If the current sink capability of the power supply is small, the device’s motor
power supply and output pins might be exposed to conditions beyond absolute maximum ratings. To avoid this
problem, take the effect of back-EMF into consideration in system design.
26
2013-03-19
TC78B002FTG
RESTRICTIONS ON PRODUCT USE
• Toshiba Corporation, and its subsidiaries and affiliates (collectively "TOSHIBA"), reserve the right to make changes to the information in this
document, and related hardware, software and systems (collectively "Product") without notice.
• This document and any information herein may not be reproduced without prior written permission from TOSHIBA. Even with TOSHIBA's
written permission, reproduction is permissible only if reproduction is without alteration/omission.
• Though TOSHIBA works continually to improve Product's quality and reliability, Product can malfunction or fail. Customers are responsible
for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and systems which
minimize risk and avoid situations in which a malfunction or failure of Product could cause loss of human life, bodily injury or damage to
property, including data loss or corruption. Before customers use the Product, create designs including the Product, or incorporate the
Product into their own applications, customers must also refer to and comply with (a) the latest versions of all relevant TOSHIBA information,
including without limitation, this document, the specifications, the data sheets and application notes for Product and the precautions and
conditions set forth in the "TOSHIBA Semiconductor Reliability Handbook" and (b) the instructions for the application with which the Product
will be used with or for. Customers are solely responsible for all aspects of their own product design or applications, including but not limited
to (a) determining the appropriateness of the use of this Product in such design or applications; (b) evaluating and determining the
applicability of any information contained in this document, or in charts, diagrams, programs, algorithms, sample application circuits, or any
other referenced documents; and (c) validating all operating parameters for such designs and applications. TOSHIBA ASSUMES NO
LIABILITY FOR CUSTOMERS' PRODUCT DESIGN OR APPLICATIONS.
• PRODUCT IS NEITHER INTENDED NOR WARRANTED FOR USE IN EQUIPMENTS OR SYSTEMS THAT REQUIRE
EXTRAORDINARILY HIGH LEVELS OF QUALITY AND/OR RELIABILITY, AND/OR A MALFUNCTION OR FAILURE OF WHICH MAY
CAUSE LOSS OF HUMAN LIFE, BODILY INJURY, SERIOUS PROPERTY DAMAGE AND/OR SERIOUS PUBLIC IMPACT
("UNINTENDED USE"). Except for specific applications as expressly stated in this document, Unintended Use includes, without limitation,
equipment used in nuclear facilities, equipment used in the aerospace industry, medical equipment, equipment used for automobiles, trains,
ships and other transportation, traffic signaling equipment, equipment used to control combustions or explosions, safety devices, elevators
and escalators, devices related to electric power, and equipment used in finance-related fields. IF YOU USE PRODUCT FOR UNINTENDED
USE, TOSHIBA ASSUMES NO LIABILITY FOR PRODUCT. For details, please contact your TOSHIBA sales representative.
• Do not disassemble, analyze, reverse-engineer, alter, modify, translate or copy Product, whether in whole or in part.
• Product shall not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any
applicable laws or regulations.
• The information contained herein is presented only as guidance for Product use. No responsibility is assumed by TOSHIBA for any
infringement of patents or any other intellectual property rights of third parties that may result from the use of Product. No license to any
intellectual property right is granted by this document, whether express or implied, by estoppel or otherwise.
• ABSENT A WRITTEN SIGNED AGREEMENT, EXCEPT AS PROVIDED IN THE RELEVANT TERMS AND CONDITIONS OF SALE FOR
PRODUCT, AND TO THE MAXIMUM EXTENT ALLOWABLE BY LAW, TOSHIBA (1) ASSUMES NO LIABILITY WHATSOEVER,
INCLUDING WITHOUT LIMITATION, INDIRECT, CONSEQUENTIAL, SPECIAL, OR INCIDENTAL DAMAGES OR LOSS, INCLUDING
WITHOUT LIMITATION, LOSS OF PROFITS, LOSS OF OPPORTUNITIES, BUSINESS INTERRUPTION AND LOSS OF DATA, AND (2)
DISCLAIMS ANY AND ALL EXPRESS OR IMPLIED WARRANTIES AND CONDITIONS RELATED TO SALE, USE OF PRODUCT, OR
INFORMATION, INCLUDING WARRANTIES OR CONDITIONS OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE,
ACCURACY OF INFORMATION, OR NONINFRINGEMENT.
• Do not use or otherwise make available Product or related software or technology for any military purposes, including without limitation, for
the design, development, use, stockpiling or manufacturing of nuclear, chemical, or biological weapons or missile technology products (mass
destruction weapons). Product and related software and technology may be controlled under the applicable export laws and regulations
including, without limitation, the Japanese Foreign Exchange and Foreign Trade Law and the U.S. Export Administration Regulations. Export
and re-export of Product or related software or technology are strictly prohibited except in compliance with all applicable export laws and
regulations.
• Please contact your TOSHIBA sales representative for details as to environmental matters such as the RoHS compatibility of Product.
Please use Product in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances,
including without limitation, the EU RoHS Directive. TOSHIBA ASSUMES NO LIABILITY FOR DAMAGES OR LOSSES OCCURRING AS
A RESULT OF NONCOMPLIANCE WITH APPLICABLE LAWS AND REGULATIONS.
27
2013-03-19