TC4521BP TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC4521BP TC4521BP 24-Stage Frequency Divider TC4521BP is frequency divider consisting of 24 stages of flip-flop. The input section is equipped with an inverter to enable to use either RC oscillator circuit or crystal oscillator circuit and to accept pulse from external clock source. Each flip-flop is inverted by the falling edge of the output of previous stage flip-flop and this can count up to the maximum of 224 = 16,777,216. Since six outputs, 218, 219, 220, 221, 222, and 223 are available besides of 224, adjustment of frequency divided output can be achieved. Weight: 1.00 g (typ.) Pin Assignment Count Capacity Output Count Capacity Q18 2 = 262,144 Q19 2 = 524,288 Q20 2 = 1,048,576 Q21 2 = 2,097,152 Q22 2 = 4,194,304 Q23 2 = 8,388,608 Q24 2 = 16,777,216 18 19 20 21 22 23 24 1 2007-10-01 TC4521BP Block Diagram 2 2007-10-01 TC4521BP Logic Diagram Internal Flip Flop Logic Diagram Flip Flop Timing Chart 3 2007-10-01 TC4521BP Absolute Maximum Ratings (Note) Characteristics DC supply voltage Input voltage Symbol Rating VDD1 VSS1 − 0.5~VSS1 + 20 VDD2 VSS1 − 0.5~VDD1 + 0.5 VIN VSS1 − 0.5~VDD1 + 0.5 Unit V V VOUT VSS1 − 0.5~VDD1 + 0.5 V DC input current IIN ±10 mA Power dissipation PD 300 mW Operating temperature range Topr −40~85 °C Storage temperature range Tstg −65~150 °C Output voltage Note: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Operating Ranges (VSS1 = VSS2 = 0 V) (Note) Characteristics DC supply voltage Input voltage Note: Symbol Test Condition Min Typ. Max Unit VDD1, VDD2 ⎯ 3 ⎯ 18 V VIN ⎯ 0 ⎯ VDD1 V The operating ranges must be maintained to ensure the normal operation of the device. Unused inputs must be tied to either VDD or VSS. 4 2007-10-01 TC4521BP Static Electrical Characteristics (VSS1 = VSS2 = 0 V, VDD1 = VDD2) Characteristics High-level output voltage Low-level output voltage Symbol VOH VOL IOH 25°C 85°C VDD (V) Min Max Min Typ. Max Min Max 5 4.95 ⎯ 4.95 5.00 ⎯ 4.95 ⎯ 10 9.95 ⎯ 9.95 10.00 ⎯ 9.95 ⎯ 15 14.95 ⎯ 14.95 15.00 ⎯ 14.95 ⎯ 5 ⎯ 0.05 ⎯ 0.00 0.05 ⎯ 0.05 10 ⎯ 0.05 ⎯ 0.00 0.05 ⎯ 0.05 15 ⎯ 0.05 ⎯ 0.00 0.05 ⎯ 0.05 5 −0.61 ⎯ −0.51 −1.0 ⎯ −0.42 ⎯ VOH = 2.5 V 5 −2.5 ⎯ −2.1 −4.0 ⎯ −1.7 ⎯ VOH = 9.5 V 10 −1.5 ⎯ −1.3 −2.2 ⎯ −1.1 ⎯ VOH = 13.5 V 15 −4.0 ⎯ −3.4 −9.0 ⎯ −2.8 ⎯ VOL = 0.4 V 5 0.61 ⎯ 0.51 1.2 ⎯ 0.42 ⎯ VOL = 0.5 V 10 1.5 ⎯ 1.3 3.2 ⎯ 1.1 ⎯ VOL = 1.5 V 15 4.0 ⎯ 3.4 12.0 ⎯ 2.8 ⎯ VOUT = 0.5 V, 4.5 V 5 3.5 ⎯ 3.5 2.75 ⎯ 3.5 ⎯ VOUT = 1.0 V, 9.0 V 10 7.0 ⎯ 7.0 5.5 ⎯ 7.0 ⎯ VOUT = 1.5 V, 13.5 V 15 11.0 ⎯ 11.0 8.25 ⎯ 11.0 ⎯ ⎪IOUT⎪ < 1 μA VIN = VSS, VDD ⎪IOUT⎪ < 1 μA VIN = VSS, VDD VOH = 4.6 V Output high current −40°C Test Condition Unit V V mA VIN = VSS, VDD Output low current IOL mA VIN = VSS, VDD Input high voltage VIH V ⎪IOUT⎪ < 1 μA Input low voltage VIL VOUT = 0.5 V, 4.5 V 5 ⎯ 1.5 ⎯ 2.25 1.5 ⎯ 1.5 VOUT = 1.0 V, 9.0 V 10 ⎯ 3.0 ⎯ 4.5 3.0 ⎯ 3.0 VOUT = 1.5 V, 13.5 V 15 ⎯ 4.0 ⎯ 6.75 4.0 ⎯ 4.0 18 ⎯ 0.1 ⎯ 10− 5 0.1 ⎯ 1.0 −5 −0.1 ⎯ −1.0 V ⎪IOUT⎪ < 1 μA Input current “H” level “L” level Quiescent supply current IIH IIL IDD VIH = 18 V VIL = 0 V VIN = VSS, VDD (Note) 18 ⎯ −0.1 ⎯ −10 5 ⎯ 5 ⎯ 0.005 5 ⎯ 150 10 ⎯ 10 ⎯ 0.010 10 ⎯ 300 15 ⎯ 20 ⎯ 0.015 20 ⎯ 600 μA μA Note: All valid input combinations. 5 2007-10-01 TC4521BP Dynamic Electrical Characteristics (Ta = 25°C, VSS1 = VSS2 = 0 V, VDD1 = VDD2, CL = 50 pF) Characteristics Output transition time (low to high) Output transition time (high to low) (IN2-Q18) tpHL Propagation delay time tpLH (IN2-Q24) tpHL Max clock frequency Max clock input fall time tfCL Min clock pulse width tW Input capacitance ⎯ ⎯ ⎯ ⎯ fCL trCL (RESET) ⎯ tpHL Max clock input rise time Min pulse width ⎯ tTHL tpLH (RESET-Qn) VDD (V) tTLH Propagation delay time Propagation delay time Test Condition Symbol Min Typ. Max 5 ⎯ 70 200 10 ⎯ 35 100 15 ⎯ 30 80 5 ⎯ 70 200 10 ⎯ 35 100 15 ⎯ 30 80 5 ⎯ 1.1 9.0 10 ⎯ 0.5 3.5 15 ⎯ 0.3 2.7 5 ⎯ 1.4 12 10 ⎯ 0.6 4.5 15 ⎯ 0.4 3.5 5 ⎯ 220 2600 10 ⎯ 100 1000 15 ⎯ 70 750 5 3 9.5 ⎯ 10 6 17.5 ⎯ 15 8 23.5 ⎯ Unit ns ns μs μs ns MHz 5 ⎯ 10 μs No limit 15 ⎯ ⎯ tWH ⎯ CIN 6 5 ⎯ 55 385 10 ⎯ 25 150 15 ⎯ 16 120 5 ⎯ 60 385 10 ⎯ 26 150 15 ⎯ 20 120 ⎯ 5 7.5 ns ns pF 2007-10-01 TC4521BP Waveforms for Measurement of Dynamic Characteristics Application Circuit When CR Oscillation is Used as Time Reference When Crystal Oscillation is Used as the Time Reference Typical Data X’tal (Hz) CI, CO (pF) RO (Ω) 32.768 k 23 500 k 100 k 60 100 k 1M 45~50 100 4.194304 M 12~15 0 Rf = 10 MΩ 7 2007-10-01 TC4521BP Package Dimensions Weight: 1.00 g (typ.) 8 2007-10-01 TC4521BP RESTRICTIONS ON PRODUCT USE 20070701-EN GENERAL • The information contained herein is subject to change without notice. • TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. 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Toshiba assumes no liability for damage or losses occurring as a result of noncompliance with applicable laws and regulations. 9 2007-10-01