TOSHIBA TA8435H/HQ

TA8435H/HQ
TOSHIBA BIPOLAR LINEAR INTEGRATED CIRCUIT
SILICON MONOLITHIC
TA8435H/HQ
PWM CHOPPER-TYPE BIPOLAR STEPPING MOTOR DRIVER.
The TA8435H/HQ is a PWM chopper-type sinusoidal micro-step
bipolar stepping motor driver.
Sinusoidal micro-step operation is achieved using only a clock
signal input by means of built-in hardware.
FEATURES
z Single-chip bipolar sinusoidal micro-step stepping motor
driver
z Output current up to 1.5 A (AVE.) and 2.5 A (PEAK)
z PWM chopper-type
z Structured by high voltage Bi-CMOS process technology
z Forward and reverse rotation are available
z 2-, 1-2-, W1-2-, and 2W1-2-phase modes, and one- or two-clock
drives can be selected.
Weight: 9.86 g (typ.)
z Package: HZIP25-P
z Input pull-up resistor equipped with RESET pin: R = 100 kΩ (typ.)
z Output monitor available with MO IO ( MO ) = ±2 mA (MAX.)
z Equipped with RESET and ENABLE pins.
TA8435HQ:
The TA8435HQ is a Sn-Ag plated product that includes Pb.
The following conditions apply to solderability:
*Solderability
1. Use of Sn-37 Pb solder bath
*solder bath temperature = 230°C
*dipping time = 5 seconds
*number of times = once
*use of R-type flux
2. Use of Sn-3.0Ag-0.5Cu solder bath
*solder bath temperature = 245°C
*dipping time = 5 seconds
*number of times = once
*use of R-type flux
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TA8435H/HQ
BLOCK DIAGRAM
Non-connection
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PIN CONNECTION (top view)
Note:
NC: No connection
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PIN FUNCTION
PIN No
SYMBOL
FUNCTIONAL DESCRIPTION
1
SG
Signal GND
2
RESET
L : RESET
3
ENABLE
L : ENABLE, H: OFF
4
OSC
5
CW / CCW
Chopping oscillation is determined by the external capacitor
6
CK2
Clock input terminal.
7
CK1
Clock input terminal.
8
M1
Excitation control input
9
M2
Excitation control input
10
REF IN
11
MO
Monitor output
12
NC
No connection.
13
VCC
Voltage supply for logic.
14
NC
No connection.
15
VMB
Output power supply terminal.
16
φB
Output φ B
17
PG−B
18
NFB
19
φB
Forward / Reverse switching terminal.
VNF control input
Power GND.
B−ch output current detection terminal.
Output φB
20
φA
Output φ A
21
NFA
A−ch output current detection terminal.
22
PG−A
23
φA
24
VMA
Output power supply terminal.
25
NC
No connection
Power GND
Output φA
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OUTPUT CIRCUIT
INPUT CIRCUIT
z CK1, CK2, CW / CCW, M1,
M2, REF IN: Terminals
z RESET , ENABLE : Terminals
z OSC: Terminal
Equipped with 100 kΩ of pull-up
resistance.
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OSCILLATOR FREQUENCY CALCULATION
The sawtooth oscillator (OSC) circuit consists of Q1 through Q4 and R1 through R4. Q2 is turned off when VOSC is
less than the voltage of 2.5 V + VBE (Q2), a value that is approximately equal to 2.85 V. VOSC is increased by COSC
charging through R1. Q3 and Q4 are turned on when VOSC becomes 2.85 V (High level.) The Low level of V (4) pin
is equal to VBE(Q2) + V(SAT)(Q4), which is approximately equal to 1.4 V. VOSC is calculated by following equation:
⎡
⎛
1
VOSC = 5· ⎢1 − exp ⎜⎜ −
C
·R 1
OSC
⎝
⎣
⎞⎤
⎟⎟ ⎥ ------------------- (1).
⎠⎦
Assuming that VOSC = 1.4 V (t = t1) and = 2.85 V (t = t2), and given that COSC is the external capacitance
connected to pin (4) and R1 is an on-chip 10 kΩ resistor, the OSC frequency is calculated as follows:
t1 = − COSC· R 1· l n ( 1 −
1.4
) ---------------------- (2),
5
t2 = − COSC· R 1· l n ( 1 −
2.85
) -------------------- (3),
5
fOSC =
1
1
=
1.4
2.85
t2 − t1 C
) − R 1· l n ( 1 −
))
OSC (R 1· l n ( 1 −
5
5
=
1
(kHz)(COSC : µF) .
5.15·COSC
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ENABLE AND RESET FUNCTION AND MO SIGNAL
Figure 1:
1-2 phase drive mode (M1: H, M2: L)
The ENABLE signal at High level disables only the output signals. Internal logic functions proceed in accordance
with input clock signals and without regard to the ENABLE signal. Therefore output current is initiated by the
timing of the internal logic circuit after release of disable mode. Figure 1 shows the ENABLE functions for when
1-2 phase drive is selected for the system.
Figure 2:
1-2 phase drive mode (M1: H, M2: L)
The RESET signal at Low level not only turns off the output signals but also stops the internal clock functions,
while MO (Monitor Output) signals are set to low. Output signals are initiated from the initial point after release
of RESET (High), as shown in Figure 2. MO signals can be used as rotation and initial signals for stable
rotation checking.
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FUNCTION
INITIAL MODE
INPUT
CW / CCW
RESET
ENABLE
H
L
H
L
CW
L
L
H
L
INHIBIT
H
L
H
L
CCW
L
L
H
L
INHIBIT
H
H
H
L
CCW
L
H
H
L
INHIBIT
H
H
H
L
CW
L
H
H
L
INHIBIT
X
X
X
L
L
RESET
X
X
X
X
H
Z
INPUT
EXCITATION
MODE
MODE
CK2
CK1
(Note)
(Note)
A PHASE
CURRENT
B PHASE
CURRENT
2-Phase
100%
−100%
1-2- Phase
100%
0%
W1-2-Phase
100%
0%
2W1-2-Phase
100%
0%
(Note)
Z: High Impedance
(Note)
X: Don’t Care
MODE
(EXCITATION)
M1
M2
L
L
2-Phase
H
L
1-2-Phase
L
H
W1-2-Phase
H
H
2W1-2-Phase
2-PHASE EXCITATION
1-2-PHASE EXCITATION
(M1: L, M2: L, CW MODE)
(M1: H, M2: L, CW MODE)
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W1-2-PHASE EXCITATION (M1: L, M2: H, CW MODE)
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2W1-2-PHASE EXCITATION (M1: H, M2: H, CW MODE)
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ABSOLUTE MAXIMUM RATINGS (Ta = 25°C)
CHARACTERISTIC
SYMBOL
RATING
UNIT
Supply Voltage
VCC
5.5
V
Output Voltage
VM
40
V
PEAK
IO (PEAK)
2.5
AVE
IO (AVE.)
1.5
IO ( MO )
±2
mA
Input Voltage
VIN
~VCC
V
Power Dissipation
PD
Operating Temperature
Topr
−40~85
°C
Storage Temperature
Tstg
−55~150
°C
Feed Back Voltage
VNF
1.0
V
Output Current
MO Output Current
A
5 (Note 1)
W
43 (Note 2)
Note 1: No heat sink
Note 2: Tc = 85°C
RECOMMENDED OPERATING CONDITIONS (Ta = −20~75°C)
CHARACTERISTIC
SYMBOL
TEST CONDITION
MIN
TYP.
MAX
UNIT
Supply Voltage
VCC
―
4.5
5.0
5.5
V
Output Voltage
VM
―
21.6
24
26.4
V
Output Current
IOUT
―
―
―
1.5
A
Input Voltage
VIN
―
―
―
VCC
V
Clock Frequency
fCK
―
―
―
5
kHz
OSC Frequency
fOSC
―
15
―
80
kHz
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ELECTRICAL CHARACTERISTICS (Ta = 25°C, VCC = 5 V, VM = 24 V)
CHARACTERISTIC
SYMBOL
High
VIN (H)
Low
VIN (L)
Input Voltage
Input Hysteresis Voltage
TEST
CIR−
CUIT
1
MIN
TYP.
MAX
3.5
―
VCC
+ 0.4
GND
−0.4
―
1.5
―
600
―
mV
M1, M2, REF IN, VIN = 5.0 V
―
―
100
nA
RESET , ENABLE , VIN = 0 V
INTERNAL PULL−UP RESISTOR
10
50
100
µA
SOURCE TYPE, VIN = 0 V
―
―
100
nA
―
10
18
―
10
18
M1, M2, CW / CCW, REF IN
ENABLE , CK1, CK2
RESET
VH
IIN−1 (H)
Input Current
TEST CONDITION
IIN−1 (L)
1
IIN−2 (L)
Output Open, RESET
ICC1
UNIT
V
:H
ENABLE : L
(2, 1−2 phase excitation)
Quiescent Current VCC
Terminal
ICC2
1
Output Open, RESET
ENABLE
:H
:L
mA
(W1−2, 2W1−2 phase excitation)
Comparator
Reference
Voltage
High
Low
ICC3
RESET : L, ENABLE : H
―
5
―
ICC4
RESET : H, ENABLE : H
―
5
―
0.72
0.8
0.88
VNF (H)
3
REF IN H
Output Open
(Note)
REF IN L
Output Open
VNF (L)
V
0.45
0.5
0.55
Output Differential
∆VO
―
B / A, COSC = 0.0033 µF,
RNF = 0.8 Ω
−10
―
10
%
VNF (H) − VNF (L)
∆VNF
―
VNF (L) / VNF (H)
COSC = 0.0033 µF, RNF = 0.8 Ω
56
63
70
%
INF
―
SOURCE TYPE
―
170
―
µA
Maximum OSC Frequency
fOSC (MAX.)
―
―
100
―
―
kHz
Minimum OSC Frequency
fOSC (MIN.)
―
―
―
―
10
kHz
fOSC
―
25
44
62
kHz
tW (CK)
―
―
1.0
―
µs
4.5
4.9
VCC
GND
0.1
0.5
NF Terminal Current
OSC Frequency
Minimum Clock Pulse Width
Output Voltage
VOH ( MO )
VOL (MO)
Note:
―
COSC = 0.0033 µF
―
IOH = −40 µA
IOL = 40 µA
V
2-phase excitation, RNF = 0.7 Ω, COSC = 0.0033 µF
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OUTPUT BLOCK
CHARACTERISTIC
Output
Saturation
Voltage
Diode
Forward
Voltage
SYMBOL
TEST
CIR−
CUIT
TEST CONDITION
TYP.
MAX
―
2.1
2.8
―
1.3
2.0
―
1.8
2.2
―
1.1
1.5
UNIT
Upper Side
VSAT U1
Lower Side
VSAT L1
Upper Side
VSAT U2
Lower Side
VSAT L2
Upper Side
VSAT U3
IOUT = 2.5 A
―
2.5
3.0
Lower Side
VSAT L3
Pulse width 30 ms
―
1.8
2.2
Upper Side
VF U1
―
2.0
3.0
Lower Side
VF L1
―
1.5
2.1
Upper Side
VF U2
IOUT = 2.5 A
―
2.5
3.3
Lower Side
VF L2
Pulse width 30 ms
―
1.8
2.5
ENABLE : "H" Level,
Output Open
―
―
50
µA
―
8
15
mA
IOUT = 1.5 A
4
Output Dark Current
(A + B Channels)
IOUT = 0.8 A
IOUT = 1.5 A
5
IM1
2
IM2
RESET :
θ=0
―
100
―
2W1−2φ
―
θ=1/8
―
100
―
―
θ=2/8
86
91
96
78
83
88
66.4
71.4
76.4
50.5
55.5
60.5
2W1−2φ W1−2φ
2W1−2φ
―
―
A−B
Chopping 2W1−2φ W1−2φ 1−2φ
Current
2W1−2φ
―
―
(Note)
REF IN : H
RNF = 0.8
Ω
COSC =
0.0033 µF
θ=3/8
VECTOR
―
θ=4/8
θ=5/8
2W1−2φ W1−2φ
―
θ=6/8
35
40
45
2W1−2φ
―
θ=7/8
15
20
25
―
100
―
―
2 Phase Excitation
Mode VECTOR
V
"H" Level
2W1−2φ W1−2φ 1−2φ
―
V
"L" Level
ENABLE : "L" Level
Output Open
RESET :
Note:
MIN
―
%
Maximum current (θ = 0): 100%
2W1−2φ : 2W1-2-phase excitation mode
W1−2φ : W1-2-phase excitation mode
1−2φ
: 1-2-phase excitation mode
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CHARACTERISTIC
2W1−2φ
A−B
Chopping
Current
(Note)
SYMBOL
TEST
CIR−
CUIT
W1−2φ 1−2φ
TEST CONDITION
MIN
TYP.
MAX
θ=0
―
100
―
―
100
―
86
91
96
78
83
88
66.4
71.4
76.4
2W1−2φ
―
―
θ=1/8
2W1−2φ
W1−2φ
―
θ=2/8
2W1−2φ
2W1−2φ
―
―
W1−2φ 1−2φ
REF IN : H
RNF = 0.8 Ω
COSC =
0.0033 µF
θ=3/8
VECTOR
―
θ=4/8
2W1−2φ
―
―
θ=5/8
50.5
55.5
60.5
2W1−2φ
W1−2φ
―
θ=6/8
35
40
45
2W1−2φ
―
―
θ=7/8
15
20
25
―
―
100
―
∆θ = 0 / 8 − 1 / 8
―
0
―
∆θ = 1 / 8 − 2 / 8
32
72
112
24
64
104
53
93
133
87
127
167
∆θ = 5 / 8 − 6 / 8
84
124
164
∆θ = 6 / 8 − 7 / 8
120
160
200
―
0.3
―
―
2.2
―
―
1.5
―
2 Phase Excitation Mode
VECTOR
∆θ = 2 / 8 − 3 / 8
Feed Back Voltage Step
∆VNF
―
∆θ = 3 / 8 − 4 / 8
∆θ = 4 / 8 − 5 / 8
tr
RL = 2 Ω, VNF = 0 V,
CL = 15 pF
tf
tpLH
CK~Output
tpHL
Output Tr Switching Characteristics
tpLH
tpHL
7
tpLH
tpLH
ENABLE ~Output
tpHL
Note:
Upper Side
IOH
Lower Side
IOL
OSC~Output
RESET ~Output
tpHL
Output Leakage
Current
REF IN : H
RNF = 0.8 Ω
COSC =
0.0033 µF
6
VM = 30 V
―
2.7
―
―
5.4
―
―
6.3
―
―
2.0
―
―
2.5
―
―
5.0
―
―
6.0
―
―
―
50
―
―
50
UNIT
%
mV
µs
µA
Maximum current (θ = 0): 100%
2W1−2φ : 2W1-2-phase excitation mode
W1−2φ : W1-2-phase excitation mode
1−2φ
: 1-2-phase excitation mode
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TEST CIRCUIT 1
VIN (H), (L), IIN (H), (L)
TA8435H/HQ
TEST CIRCUIT 2
ICC, IM
TA8435H/HQ
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TEST CIRCUIT 3
VNF (H), (L)
TA8435H/HQ
TEST CIRCUIT 4
VCE (SAT) UPPER SIDE, LOWER SIDE
TA8435H/HQ
Note:
Calibrate Io to 1.5 A / 0.8 A by RL
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TEST CIRCUIT 5
VFU, VFL
TA8435H/HQ
TEST CIRCUIT 6
IOH, IOL
TA8435H/HQ
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AC ELECTRICAL CHARACTERISTICS, MEASUREMENT WAVE
CK (OSC)−OUT
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OUTPUT CURRENT VECTOR ORBIT (normalized to 90° per step)
θ
ROTATION ANGLE
IDEAL
VECTOR LENGTH
TA8435H/HQ
IDEAL
TA8435H/HQ
θ0
0°
0°
100
100.00
―
θ1
11.25°
11.31°
100
101.98
―
θ2
22.5°
23.73°
100
99.40
―
θ3
33.75°
33.77°
100
99.85
―
θ4
45°
45°
100
100.97
141.42
θ5
56.25°
56.23°
100
99.85
―
θ6
67.5°
66.27°
100
99.40
―
θ7
78.75°
78.69°
100
101.98
―
θ8
90°
90°
100
100.00
―
1−2 / W1−2 / 2W1−2-Phase
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TA8435H/HQ
TA8435H/HQ
APPLICATION CIRCUIT
Note 1: A Schottky diode (3GWJ42) for preventing punch−through current should also be connected between each
output (pin 16 / 19 / 20 / 23).
Note 2: The GND pattern should be laid out at one point to prevent common impedance.
Note 3: A capacitor for noise suppression should be connected between the power supply (VCC, VM) and GND to
stabilize operation.
Note 4: Utmost care is necessary in the design of the output, VCC, VM, and GND lines since the IC may be destroyed
by short-circuiting between outputs, air contamination faults, or faults due to improper grounding, or by
short-circuiting between contiguous pins.
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When using TA8435H/HQ
0.
Introduction
The TA8435H/HQ controls the PWM to set the stepping motor winding current to a constant current. The
device is a micro-step driver IC used to drive the stepping motor efficiently at low vibration.
1.
Micro-step drive
The TA8435H/HQ drives the stepping motor in micro steps with a maximum resolution of 1/8 of the 2-phase
stepping angle (in 2W1-2-phase mode).
In micro step operation, A-phase and B-phase current levels are set inside the IC so that the composite vector
size and the rotation angle are even. Just inputting clock signals rotates the stepping motor in micro steps.
2.
PWM control and output current setting
(1)
Output current path (PWM control)
The TA8435H/HQ controls the PWM by turning the upper power transistor on and off.
Here, current flows as shown in the figure below.
(2)
Setting of output current by REF-IN input and current detection resistor
The motor current (maximum current for micro-step drive) IO is set as shown in the following
equation, using REF-IN input and the external current detection resistor RNF.
IO = VREF / RNF
where,
REF−IN = High,
REF−IN = Low,
VREF = 0.8 V
VREF = 0.5 V
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3.
Logic control
(1)
Clock input for rotation direction control
To switch rotation between forward and reverse, there are two types of clock input: one-clock input
and two-clock input.
(a) One-clock input
One clock pin, CK1 or CK2, is used for clock input. In this case, rotation is switched between
forward or reverse using a CW or CCW signal.
<Input signal example: 1-2-phase mode>
(b)
Two-clock input
Both clock pins, CK1 and CK2, are used for clock input. Switching between CK1 and CK2 controls
forward and reverse rotation.
<Input signal example: 1-2-phase mode>
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(2)
Mode setting
Setting M1 and M2 selects one of the following modes: 2-phase, 1-2-phase, W1-2-phase, and
2W1-2-phase modes.
(3)
Monitor ( MO ) output
The product supports the use of monitor output to monitor the current waveform location.
For 2-phase mode, the MO output is Low if the timing of the A-phase current = 100% and that of
the B-phase current = -100%.
For 1-2-phase, W1-2-phase, or 2W1-2-phase mode, the MO output is Low if the timing of the
A-phase current = 100% and and that of the B-phase current = 0%.
(4)
Reset pin
The product supports the use of reset input to reset the internal counter.
Setting RESET to Low resets the internal counter, forcing the output current to the same value as
that when the MO output is Low.
(5)
Phase mode switching
To avoid step changing during motor rotation, the current must not fluctuate at phase mode switching.
Pay attention to the following points.
(a) During switching between 2-phase and other phase modes, the current fluctuates.
(b) When switching between phase modes other than 2-phase, the current can be switched without
fluctuation if the timing of MO output = Low.
However, when switching as follows, set RESET to Low beforehand:
from 1-2-phase to W1-2-phase or 2W1-2-phase mode;
from W1-2-phase to 2W1-2-phase mode.
<Example of Input Signal>
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4.
PWM oscillation frequency (external capacitor setting)
An external capacitor connected to the OSC pin is used to generate internally a sawtooth waveform.
PWM is controlled using this frequency.
Toshiba recommend 3300 pF for the capacitance, taking variations between ICs into consideration.
5.
External Schottky diode
A parasitic diode can be supported on the lower side of the output. When PWM is controlled, current
flows to this parasitic diode. Unfortunately, this current has the effect of generating punch-through
current and micro-step waveform fluctuation. For this reason, be sure to connect a Schottky barrier
diode externally.
This external diode can also reduce heat generated in the IC.
6.
Power dissipation
The IC power dissipation is determined by the following equation (where the Schottky diode is connected
between the output pin and GND):
P = VCC × ICC + VM × IM + IO (tON × VSAT−U + VSAT−L)
tON = TON / TS (PWM control ON duty).
The higher the ambient temperature, the smaller the power dissipation.
Check the PD-Ta curve, and be sure to design the heat dissipation with a sufficient margin.
7.
Heatsink fin processing
The IC fin (rear) is electrically connected to the rear of the chip.
When current flows to the fin, the IC malfunctions.
If there is any possibility of a voltage being generated between the IC GND and the fin, either ground
the fin or insulate it.
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PACKAGE DIMENSIONS
HZIP25−P−1.27
Unit: mm
Weight: 9.86 g (typ.)
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Notes on Contents
1. Block Diagrams
Some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified
for explanatory purposes.
2. Equivalent Circuits
The equivalent circuit diagrams may be simplified or some parts of them may be omitted for
explanatory purposes.
3. Timing Charts
Timing charts may be simplified for explanatory purposes.
4. Application Circuits
The application circuits shown in this document are provided for reference purposes only. Thorough
evaluation is required, especially at the mass production design stage.
Toshiba does not grant any license to any industrial property rights by providing these examples of
application circuits.
5. Test Circuits
Components in the test circuits are used only to obtain and confirm the device characteristics. These
components and circuits are not guaranteed to prevent malfunction or failure from occurring in the
application equipment.
IC Usage Considerations
Notes on handling of ICs
[1] The absolute maximum ratings of a semiconductor device are a set of ratings that must not be
exceeded, even for a moment. Do not exceed any of these ratings.
Exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result
injury by explosion or combustion.
[2] Use an appropriate power supply fuse to ensure that a large current does not continuously flow in
case of over current and/or IC failure. The IC will fully break down when used under conditions that
exceed its absolute maximum ratings, when the wiring is routed improperly or when an abnormal
pulse noise occurs from the wiring or load, causing a large current to continuously flow and the
breakdown can lead smoke or ignition. To minimize the effects of the flow of a large current in case
of breakdown, appropriate settings, such as fuse capacity, fusing time and insertion circuit location,
are required.
[3] If your design includes an inductive load such as a motor coil, incorporate a protection circuit into
the design to prevent device malfunction or breakdown caused by the current resulting from the
inrush current at power ON or the negative current resulting from the back electromotive force at
power OFF. IC breakdown may cause injury, smoke or ignition.
Use a stable power supply with ICs with built-in protection functions. If the power supply is
unstable, the protection function may not operate, causing IC breakdown. IC breakdown may cause
injury, smoke or ignition.
[4] Do not insert devices in the wrong orientation or incorrectly.
Make sure that the positive and negative terminals of power supplies are connected properly.
Otherwise, the current or power consumption may exceed the absolute maximum rating, and
exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result
injury by explosion or combustion.
In addition, do not use any device that is applied the current with inserting in the wrong orientation
or incorrectly even just one time.
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Points to remember on handling of ICs
(1) Heat Radiation Design
In using an IC with large current flow such as power amp, regulator or driver, please design the
device so that heat is appropriately radiated, not to exceed the specified junction temperature (TJ)
at any time and condition. These ICs generate heat even during normal use. An inadequate IC heat
radiation design can lead to decrease in IC life, deterioration of IC characteristics or IC breakdown.
In addition, please design the device taking into considerate the effect of IC heat radiation with
peripheral components.
(2) Back-EMF
When a motor rotates in the reverse direction, stops or slows down abruptly, a current flow back to the motor’s
power supply due to the effect of back-EMF. If the current sink capability of the power supply is small, the
device’s motor power supply and output pins might be exposed to conditions beyond maximum ratings. To avoid
this problem, take the effect of back-EMF into consideration in system design.
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