ATMEL AT90SCR100

General Features
• High Performance, Low Power AVR® 8-Bit Microcontroller
• Advanced RISC Architecture
•
•
•
•
– 131 Powerful Instructions - Most Single Clock Cycle Execution
– 32 x 8 General Purpose Working Registers
– Up to 16MIPS Throughput at 16Mhz
– On-chip 2-cycle Multiplier
Non-volatile Program and Data Memories
– 64K Bytes of In-System Self-Programmable Flash
• Endurance: 10,000 Write/Erase Cycles
– 4K Bytes EEPROM
• Contains 128 Bytes of One Time Programmable Memory
• Endurance: 100,000 Write/Erase Cycles
– 4K Bytes Internal SRAM
– Optional Boot Code Section
• In-System Programming by On-chip Bootloader program
JTAG (IEEE std. 1149.1 compliant) Interface
– Boundary-scan Capabilities According to the JTAG Standard
– Extensive On-chip Debug Support
– Programming of Flash, EEPROM, Fuses, and Locks Bits through JTAG Interface
– Locking JTAG for Software Security (using OTP programmation)
ISO7816 UART Interface Fully compliant with EMV, GIE-CB and WHQL Standards
– Programmable ISO clock from 1 Mhz to 4.8, 6, 8 or 12Mhz
– Card insertion/removal detection with automatic deactivation sequence
– Programmable Baud Rate Generator from 372 to 3 clock cycles
– Synchronous/Asynchronous Protocols T=0 and T=1 with Direct of Inverse
Convention
– Automatic character repetition on parity errors
– 32 Bit Waiting Time Counter
– 16 Bit Guard Time Counter/Block Guard Time Counter
– Internal Step Up/Down Converter with Programmable Voltage Output if DC/DC
embedded:
• Class A: 5V +/-8% at 60mA, Vcc>2.85 (50mA if Vcc >2.7)
• Class B: 3V +/-8% at 60mA, Vcc>2.85 (50mA if Vcc >2.7)
• Class C: 1.8V +/-8% at 35mA
– ISO7816-12 USB Host controller for card interface
• Supports up to 60mA USB Smart Cards
• Supports limited cable length to Smart Card Connector (~50cm)
– 4 kV ESD (MIL/STD 833 Class 3) protection on whole Smart Card Interface
USB 2.0 Full-speed Device Module
– Complies fully with:
• Universal Serial Bus Specification Rev 2.0
– Supports data transfer rates up to 12 Mbit/s
– Endpoint 0 for Control Transfers : up to 64-bytes
– 8 Programmable Endpoints with IN or OUT Directions and with Bulk, Interrupt or
Isochronous Transfers
• 3 Programmable Endpoints with double buffering of 64x2 bytes
– Suspend/Resume Interrupts, and Remote Wake-up Support
– Power-on Reset and USB Bus Reset
8-bit
Microcontroller
for Smart Card
Readers
AT90SCR100
Summary
Preliminary
SUMMARY PRELIMINARY
6568AX–SMS–23Oct08
SUMMARY PRELIMINARY
•
•
•
•
•
•
•
•
•
•
•
2
– 48 Mhz clock for Full-speed Bus Operation
– USB Bus Disconnection on Microcontroller Request
Peripheral Features
– One 8-bit Timer/Counters with Separate Prescaler, Compare Mode and PWM Channel
– One 8-bit Timer/Counters with Separate Prescaler, Compare Mode and Real Time Counter on Separate Oscillator
– One 16-bit Timer/Counters with Separate Prescaler and Compare Mode
– Hardware Watchdog
– Hardware AES 128/256 Engine
– Random Number Generator (RNG)
Communication Peripherals
– High Speed Master/Slave SPI Serial Interface (Up to 20Mhz)
– 2-Wire Serial Interface
– USART interface (up to 2Mbps)
– Standard SPI Interface (to ease the communication with most of RF front end chip)
Special Microcontroller Feature
– Power-on Reset and Brown-out Detection
– Internal Callibrated Oscillator
– External and Internal Interrupt Sources
– Five Sleep Modes: Idle, Power-save, Power-down, Standby and Extended Standby
– Supply Monitoring with Interruption Generation below a fixed level.
Keyboard Interface with up to 5x4 Matrix Management Capability + Interrupts and Wake-Up on Key Pressed Event
Up to 4 x I/O Ports: Programmable I/O Port
Up to 4 x LED Outputs with Programmable Current Sources: 2 or 4 mA (not usable in emulation mode)
Specific and Unique Serial Number per IC in production.
Operating Temperature
– Industrial (-40°C to +85°C)
Core Operating Voltages
– 2.4 - 5.5V
DC/DC Operating Voltages (See “Smart Card Interface Characteristics” for details)
– 2.7 - 5.5V
Maximum Frequency
– 8Mhz Clock Input
AT90SCR100
6568AX–SMS–23Oct08
AT90SCR100
1. Description
Smart Cards and Smart Card Readers are increasingly being used in various systems such as
Health Care, USB Token, Password Generator, Access control, Laptop Computer, Set Topbox,
Payment Terminals... These applications require complex integration using different communicating interfaces.
The AT90SCR100 based on the powerful 8/16bit AVR® Core technology, meets the requirements of such applications thanks to its embedded communication interfaces: USB Full-speed,
ISO7816 (1-4,12) interface, High Speed SPI supporting speed up to 20Mbps, USART, TWI.
The AT90SCR100 has been designed to support standard systems such as Contactless interface and Fingerchip, among others.
An AES engine is also embedded to ease the development of secured communication between
AT90SCR100 and external peripherals.
All these features require a minimum of external components which makes this solution the best
choice for low cost high integration in small environments.
Its FLASH memory allows remote firmware management. The JTAG interface eases code
development, and program loading in end-customers factories.
A low pincount package is also available for embedded application with size constraints, such as
USB tokens, laptop computers.
A complete datasheet will soon be available on Atmel’s website: www.atmel.com.
SUMMARY PRELIMINARY
6568AX–SMS–23Oct08
3
SUMMARY PRELIMINARY
2. Block Diagram
Figure 2-1.
Block Diagram
HSSCL, HSMOSI
HSMISO, HSSS
High-Speed
SPI
SPI DMA
USB+, USB-
USB Device
USB DMA
SDA, SCL
TWI
RXD, TXD
USART
SCL, MOSI
MISO, SS
SPI
CIO, CCLK, CVCC,
CRST, CC4, CC8,
CPres
USB+, USB-
8 x 8 Keyboards
specifics IOs
4 LEDS
SRAM
4 KB
Smart Card
Interface
Supply
Monitor
JTAG
FLASH
64 KB Code
Vcc
TDI, TDO
TMS, TCK
Eeprom
4 KB Data
On-chip
Debug
cpu
Smart Card
USB Interface
Keyboard
Interface
Interrupt
Controller
USB
Watchdog
48MHz
Clock
Management
LED port
AES 256
RNG
Power
Management
Timers/Counters
8bit T/C 0
PWM
16bit T/C 1
8bit T/C 2
RTC
32.768 Khz
4
AT90SCR100
6568AX–SMS–23Oct08
AT90SCR100
3. Pin List Configuration
• 2 package configurations to answer different needs
– 32pins: LowPinCount package: for small package size, useful for small embedded systems
(AT90SCR100L and AT90SCR100LS)
– 64pins: FullPinCount: For full performance advanced reader (AT90SCR100H)
!
Caution
On Full Pin Count (FPC) package, the only supported package type is QFN, and
we connect all the Vss signals to the e-pad. It is important to have it fully soldered
on groundplane of final PCB.
• USBReg refers to 3.3V USB specific regulator
Note
!
Caution
Unmapped, generic pins
x
x
x
x
e
(1)
e
(1)
x
Supply
SCR100H
SCR100LS
Vss
SCR100L
Portmap
Vcc
Take care of the multiplexed functionnalities of each port. All functionnalities may
be active at the same time. The only way to disable a feature is to deactive it inside
the corresponding peripheral blokck.
Pin List Configuration
Table 3-1.
ID
• PCINTx refer to Pin Change Interrupts. See “External Interrupt Registers” in full
Datasheet.
Configuration, Role
-
AVss
x
x
RST
x
x
x
Xtal1
x
x
x
Vcc
Voltage Supply
Vss
Ground
AVss
PLL Ground
RST
Reset signal: Drive low to reinitialize the chip
XTAL1
Vcc
Clock Input: Support up to 8 Mhz cristals
Xtal2
x
x
x
XTAL2
DVcc
x
x
x
DVcc
Digital Vcc:Used for internal regulator decoupling
Vcc2
x
x
x
Vcc2
Voltage Supply: To be tied to same Vcc supply voltage
Vcc3
-
-
x
Vcc3
Voltage Supply: To be tied to same Vcc supply voltage
Vcc4
-
-
x
Vcc4
Voltage Supply: To be tied to same Vcc supply voltage
Vcc5
-
-
x
Vcc5
Voltage Supply: To be tied to same Vcc supply voltage
Vdcdc
x
x
x
Vdcdc
Voltage Supply for DC/DC Converter.
x
e
(1)
Vss2
Second Vss: To be tied to Vss
e
(1)
Vss3
Third Vss: To be tied to Vss
Vss2
x
Vss3
x
x
D+
x
x
-
x
D+
USB
D-
x
x
x
UCap
x
x
x
RTC1
-
-
x
RTC2
-
-
x
Reg
Vcc
USB Interface
DUCap
USB Decoupling: Used for specific USB regulator decoupling
TOSC1
TOSCx: 32.768 Khz cristal input for Real Time Clock. (Please
note that these pins are not GPIO accessible).
TOSC2
SUMMARY PRELIMINARY
6568AX–SMS–23Oct08
5
SUMMARY PRELIMINARY
Pin List Configuration
PORT D
PORT C(3)
6
-
-
x
KbIN7
PCINT7
PA6
-
-
x
KbIN6
PCINT6
PA5
-
-
x
KbIN5
PCINT5
PA4
-
-
x
KbIN4
PCINT4
PA3
-
-
x
KbIN3
PCINT3
PA2
-
-
x
KbIN2
PCINT2
PA1
-
-
x
KbIN1
PCINT1
PA0
-
-
x
KbIN0
PCINT0
PB7
x
-
x
SCK
OC2A
PCINT15
PB6
x
-
x
MISO
OC2B
PCINT14
PB5
x
-
x
MOSI
OC1A
PCINT13
PB4
x
-
x
SS
OC0B
PCINT12
PB3
-
-
x
PWM
OC0A
PCINT11
Supply
SCR100LS
PA7
ID
SCR100H
SCR100L
PORT B
PORT A
Portmap
Table 3-1.
Configuration, Role
Vcc
Vcc
ICP1
PCINT10
KbINx: Input for “Keyboard Interface”
SS, MISO, MOSI, SCK: Standard “SPI - Serial Peripheral
Interface”
OCxx: Output Comparator outputs. See “Timers”.
ICP1: Input Capture. See “16-bit Timer/Counter1 with PWM”
PWM: Output from “8-bit Timer/Counter0 with PWM”
Tx: Clock input for “Timers” 0 and 1
XCK: Clock input for synchronous “USART”
PB2
-
-
x
PB1
-
-
x
INT3
T1
CKO
PCINT9
PB0
-
-
x
INT2
T0
XCK
PCINT8
PC5
-
-
x
JTGTDI
LED3
PC4
-
-
x
JTGTDO
LED2
JTGxxx: “JTAG Interface and On-chip Debug System”
PC3
-
-
x
JTGTMS
LED1
SDA, SCL: “2-wire Serial Interface _ TWI” signals
PC2
x
x
x
JTGTCK
LED0
PC1
-
-
x
SDA
INT3b
PC0
-
-
x
SCL
INT2b
PD7
-
x
x
HSMISO
PCINT23
PD6
-
x
x
HSMOSI
PCINT22
PD5
-
x
x
HSSCK
PCINT21
PD4
-
x
x
HSSS
PCINT20
PD3
-
-
x
INT1
PCINT19
TXD, RXD: “USART” signals
PD2
-
-
x
INT0
PCINT18
OCxB: Output Comparators: See “Timers”.
PD1
x
x
x
TXD
PCINT17
PD0
x
x
x
RXD
PCINT16
Vcc
Vcc
OC1B
INTx: “External Interrupts” , default configuration
CKO: System clock output. (only active if CKOUT fuse is
enabled). “Fuse Low Byte” .
LEDx: “LED” Outputs (IO driving current)
INTxb: “External Interrupts” , bis configuration
HSxxxx: “High-Speed SPI Controller” (MISO, MOSI, SCK,
SS)
INTx: “External Interrupts” , default configuration
AT90SCR100
6568AX–SMS–23Oct08
AT90SCR100
Pin List Configuration
SCR100LS
-
-
x
KbO7
PCINT31
PE6
-
-
x
KbO6
PCINT30
PE5
-
-
x
KbO5
PCINT29
PE4
-
-
x
KbO4
PCINT28
PE3
-
-
x
KbO3
PCINT27
PE2
-
-
x
KbO2
PCINT26
PE1
-
-
x
KbO1
PCINT25
PE0
-
-
x
KbO0
PCINT24
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
CC8, DM
x
x
x
CVcc
x
x
x
Notes:
Supply
SCR100H
SCR100L
PE7
ID
Smart Card PORT
PORT E
Portmap
Table 3-1.
Configuration, Role
Vcc
Vcc
KbOx: Output for “Keyboard Interface”
CPRES
CCLK
CVcc
CRST
CIO
(2)
Cx: “Smart Card Interface Block (SCIB)” : Standard ISO7816
port and “USB Host Controller” .
CC4, DP
CVSense
CVcc
x
x
e(1)
x
x
x
LI
x
x
x
LO
CVss
Smart Card Interface: “DC/DC Converter” Supply Signals
1. Should be connected to e-pad underneath QFN package
2. According to the current configuration, these pins are supplied either by USB regulator or CVcc
3. PORT C is not complete, due to RTC pins, dedicated to oscillator pads
SUMMARY PRELIMINARY
6568AX–SMS–23Oct08
7
SUMMARY PRELIMINARY
3.1
Typical Application
C3
C4
DVcc
Vcc
Card C4/D+
Card C8/D-
CIO
Card IO
R5
C2
Vss
Vss2
Vss3
AVss
Host
R3
R4
CC4
CC8
Vcc1
Vcc2
Vcc3
Vcc4
3.3V
C1
UCAP
AT90SCR100
Card Vcc
CVcc
C9
CVss
Li
RESET
L1
RST
Lo
D+
D-
R1
R2
CVsense
RTC1
XTAL2
: As DCDC generates noise, we encourage the use of
another supply power than global Vcc, if possible.
Table 3-2.
C5
RTC2
Q2
Q1
(1)
(1)
Vdcdc
D+
D-
XTAL1
3.3V
C7
C6
Rled
C8
Rs
Led0
3.3V
Dled
External Components, Bill Of Materials
Reference
Description
Value
Comment
R1, R2
R3, R4
USB Pad Serial Resistor
22Ω +/-10%
-
R5
CIO Pull-up Resistor
10KΩ +/-10%
(Optional) Can be required for high speed communication
Rs
DCDC Sense Resistor
200mΩ +/-2%
125mW
Current Sensing: Overcurrent detection
C1
Power Supply Decoupling
capacitor
4.7μF +/-10%
Maximum application capacitance allowed by USB
standard is 10μF
C2
Power Supply Filter capacitor
100nF
-
C3
Internal Core Regulator
Decoupling capacitor
2.2μF +/-10%
Used for internal regulator stability
C4
Internal USB Regulator
Decoupling capacitor
2.2μF +/-10%
Used for internal regulator stability
C5, C6
PLL Filter capacitors
47pF +/-10%
-
C7, C8
RTC Filter capacitors
22pF +/-10%
Only if Real Time Counter is used.
C9
DCDC Decoupling Capacitor
10μF +/-10%
esr=100mΩ
Tantalum capacitor is needed
Recommended: AVX: TPSE106-035-200
L1
DCDC inductance
6.8μH
esr=20.2mΩ
Recommended: Gowanda: SMP3316LP-681M
Q1
Crystal
8.0 Mhz
Q2
Real Time Crystal
3.768 Mhz
Only if Real Time Counter is used
Rled/Dled
LED mechanism
--
Depends on the configuration of the Led Controller
8
AT90SCR100
6568AX–SMS–23Oct08
AT90SCR100
3.1.1
Recommendations
1. In Order to reduce the board parasitics, the external components for DCDC converter
should be as close as possible to the chip pins (ideally solded directly on the pins).
2. In order to have a correct current limitation, the board parasitic resistances must be
taken into account in the choice of the Rs value (e.g., if each metal line connecting Rs
to the chip adds a 10 mΩ resistance, the correct Rs value should be 200-2x10=180mΩ)
3. CVcc and CVss lines must have very low resistance (short and wide metal line).
4. R1, R2, R3 and R4 must be placed as close as possible to the chip pins.
5. Connect e-pad to ground. If possible connect it to ground plane
SUMMARY PRELIMINARY
6568AX–SMS–23Oct08
9
–
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6568AX–SMS–23Oct08