Datasheet 2.7V to 5.5V, 1.2A 1ch Synchronous Buck Converter integrated FET BD9123MUV ●General Description ROHM’s high efficiency step-down switching regulator BD9123MUV is a power supply designed to produce a low voltage including 0.85 to 1.2 volts from 5.5/3.3 volts power supply line. Offers high efficiency with our original pulse skip control technology and synchronous rectifier. Employs a current mode control system to provide faster transient response to sudden change in load. ●Key Specifications Input voltage range: Output voltage range: Output current: Switching frequency: Pch FET ON resistance: Nch FET ON resistance: Standby current: Operating temperature range: ●Features ■ Offers fast transient response with current mode PWM control system. ■ Offers highly efficiency for all load range with synchronous rectifier (Nch/Pch FET) and SLLM (Simple Light Load Mode) ■ Incorporates output voltage inside control function.(3 bit) ■ Incorporates PGOOD function. ■ Incorporates soft-start function. ■ Incorporates thermal protection and ULVO functions. ■ Incorporates short-current protection circuit with time delay function. ■ Incorporates shutdown function Icc=0µA(Typ.) ●Package VQFN016V3030: 2.7V to 5.5V 0.85V to 1.2V 1.2A (Max.) 1MHz(Typ.) 0.35Ω(Typ.) 0.25Ω(Typ.) 0μA (Typ.) -40℃ to +95℃ 3.00mm x 3.00mm x 1.00mm ●Applications Power supply for LSI including DSP, Micro computer and ASIC ●Typical Application Circuit VCC VCC RPG Cin VCC,PVCC EN VOUT VID<2:0> PGOOD VOUT L VID<2:0) ITH SW VOUT GND,PGND RITH ESR CITH CO RO Fig.1 Typical Application Circuit ○Product structure：Silicon monolithic integrated circuit www.rohm.com © ROHM Co., Ltd. All rights reserved. TSZ22111･14･001 ○This product is not designed protection against radioactive rays. 1/20 TSZ02201-0J3J0AJ00120-1-2 02.MAR.2012 Rev.001 Datasheet BD9123MUV ●Pin Configuration (Top View) VID<0> VID<1> VID<2> VOUT > 12 11 10 9 8 ITH 7 PGOOD 15 6 GND 16 5 PGND EN 13 VCC 14 PVCC PVCC (TOP VIEW) 1 2 3 4 SW SW SW PGND Fig.2 Pin Configuration ●Pin Description Pin No. Pin name Function 1 2 Pch/Nch FET drain output pin SW 3 4 Nch FET source pin PGND 5 6 GND 7 PGOOD 8 ITH Ground Power Good pin Gm Amp output pin/Connected phase compensation capacitor Output voltage pin 9 VOUT 10 VID<2> Output voltage control pin<2> 11 VID<1> Output voltage control pin<1> 12 VID<0> Output voltage control pin<0> 13 EN 14 VCC VCC power supply input pin PVCC Pch FET source pin 15 16 Enable pin(High Active） ●Block Diagram VCC EN 13 VCC VREF VID<0> 12 VID<1> 11 VID<2> 10 PVCC 15 Current Comp R Q S SELECTOR SLOPE CLK Gm Amp VOUT OSC 9 Vcc VCC Current Sense/ Protect + Driver Logic Input 10µF 16 1 100Ω SW 4.7µH Output 2 3 22µF PGND Soft Start UVLO 7 PGOOD 0.1µF 14 4 5 TSD PGOOD 6 8 GND ITH RITH CITH Fig.3 Block Diagram www.rohm.com © ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 2/20 TSZ02201-0J3J0AJ00120-1-2 02.MAR.2012 Rev.001 Datasheet BD9123MUV ●Absolute Maximum Ratings (Ta=25℃) Parameter Symbol Ratings Unit Vcc -0.3 to +7 * 1 PVcc -0.3 to +7 * 1 EN,SW,ITH Voltage EN, SW, ITH -0.3 to +7 Logic input voltage VID<2:0> -0.3 to +7 Power Dissipation 1 Pd1 0.27 * 2 W Power Dissipation 2 Pd2 0.62 * 3 W W W VCC Voltage PVCC Voltage V V V V Power Dissipation 3 Pd3 1.77 * 4 Power Dissipation 4 Pd4 2.66 * 5 Operating temperature range Topr -40 to +95 ℃ Storage temperature range Tstg -55 to +150 ℃ Tj +150 ℃ Maximum junction temperature *1 *2 *3 *4 *5 Pd should not be exceeded. IC only 1-layer. mounted on a 74.2mm×74.2mm×1.6mm glass-epoxy board, occupied area by copper foil : 10.29mm2 4-layer. mounted on a 74.2mm×74.2mm×1.6mm glass-epoxy board, 1st and 4th copper foil area : 10.29mm2 , 2nd and 3rd copper foil area : 5505mm2 4-layer. mounted on a 74.2mm×74.2mm×1.6mm glass-epoxy board, occupied area by copper foil : 5505mm2, in each layers ●Operating Ratings (Ta=-40 to +95℃) Parameter Power Supply Voltage EN Voltage Logic input voltage Output voltage Setting Range SW average output current *6 Symbol Ratings Min. Typ. Max. Unit VCC 2.7 3.3 5.5 V PVCC 2.7 3.3 5.5 V VEN 0 - Vcc V VID<2:0> 0 - 5.5 V VOUT 0.85 - 1.2 V ISW - - 1.2 *6 A Pd should not be exceeded. ●Electrical Characteristics (Ta=25℃ VCC=PVCC=5V, EN=VCC, VID<2>=VID<1>=VID<0>= 0V), unless otherwise specified.) Limits Parameter Symbol Unit Conditions Min. Typ. Max. Standby current Active current EN Low voltage EN High voltage EN input current VID Low voltage VID High voltage VID input current Oscillation frequency Pch FET ON resistance Nch FET ON resistance Output voltage ITH SInk current ITH Source Current UVLO threshold voltage UVLO release voltage Power Good Threshold Power Good Release Power Good Delay PGOOD ON Resistance Soft start time Timer latch time Output Short circuit threshold Voltage www.rohm.com © ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 ISTB ICC VENL VENH IEN VVIDL VVIDH IVID FOSC RONP RONN VOUT ITHSI ITHSO VUVLO1 VUVLO2 VPGOOD1 VPGOOD2 TPG RONPG TSS TLATCH VSCP 2.0 2.0 0.8 0.98 25 25 2.4 2.425 70 85 2.5 0.4 1 - 3/20 0 10 300 500 GND 0.8 VCC 5 10 GND 0.8 VCC 5 10 1 1.2 0.35 0.60 0.25 0.50 1.0 1.02 50 50 2.5 2.6 2.55 2.7 75 80 90 95 5 10 140 280 0.8 1.6 2 4 VOUT×0.5 VOUT×0.7 µA µA V V µA V V µA MHz Ω Ω V µA µA V V % % ms Ω ms ms V EN=GND Standby mode Active mode VEN=5V VVID=5V PVCC=5V PVCC=5V VID<2:0>=(0,0,0) VOUT =1.2V VOUT =0.8V VCC=5V→0V VCC=0V→5V VOUT→0V 0V→VOUT VOUT→0V TSZ02201-0J3J0AJ00120-1-2 02.MAR.2012 Rev.001 Datasheet BD9123MUV ●Typical Performance Curves Fig.5 VEN - VOUT Fig.4 Vcc-VouT Fig.6 IOUT-VOUT www.rohm.com © ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 Fig. 7 Ta-VOUT 4/20 TSZ02201-0J3J0AJ00120-1-2 02.MAR.2012 Rev.001 Datasheet BD9123MUV Fig.9 Power supply voltageOperating frequency Fig.8 Efficiency Fig.11 Ta-RONN,RONP Fig.10 Ta-Fosc www.rohm.com © ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 5/20 TSZ02201-0J3J0AJ00120-1-2 02.MAR.2012 Rev.001 Datasheet BD9123MUV Fig.12 Ta-VEN Fig.13 Ta-Icc Fig.15 SW waveform Io=0mA Fig.14 Soft start waveform www.rohm.com © ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 6/20 TSZ02201-0J3J0AJ00120-1-2 02.MAR.2012 Rev.001 Datasheet BD9123MUV Fig.16 SW waveform Io=1.2A Fig.17 Transient Response Io=125mA→850mA(2µA) Fig.19 BIT CHANCE RESPONSE Fig.18 Transient Response Io=850mA→125mA(2µA) www.rohm.com © ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 7/20 TSZ02201-0J3J0AJ00120-1-2 02.MAR.2012 Rev.001 Datasheet BD9123MUV Fig.21 PGOOD Delay Fig.20 BIT CHANCE RESPONSE www.rohm.com © ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 8/20 TSZ02201-0J3J0AJ00120-1-2 02.MAR.2012 Rev.001 Datasheet BD9123MUV ●Application Information Operation BD9123MUV is a synchronous rectifying step-down switching regulator that achieves faster transient response by employing current mode PWM control system. It utilizes switching operation in PWM (Pulse Width Modulation) mode for heavier load, while it utilizes SLLM (Simple Light Load Mode) operation for lighter load to improve efficiency. ○Synchronous rectifier It does not require the power to be dissipated by a rectifier externally connected to a conventional DC/DC converter IC, and its P.N junction shoot-through protection circuit limits the shoot-through current during operation, by which the power dissipation of the set is reduced. ○Current mode PWM control Synthesizes a PWM control signal with a inductor current feedback loop added to the voltage feedback. ・PWM (Pulse Width Modulation) control The oscillation frequency for PWM is 1 MHz. SET signal form OSC turns ON a Pch MOS FET (while a Nch MOS FET is turned OFF), and an inductor current IL increases. The current comparator (Current Comp) receives two signals, a current feedback control signal (SENSE: Voltage converted from I L) and a voltage feedback control signal (FB), and issues a RESET signal if both input signals are identical to each other, and turns OFF the highside MOS FET (while a lowside MOS FET is turned ON) for the rest of the fixed period. The PWM control repeats this operation. ・SLLM (Simple Light Load Mode) control When the control mode is shifted from PWM for heavier load to the one for lighter load or vise versa, the switching pulse is designed to turn OFF with the device held operated in normal PWM control loop, which allows linear operation without voltage drop or deterioration in transient response during the mode switching from light load to heavy load or vise versa. Although the PWM control loop continues to operate with a SET signal from OSC and a RESET signal from Current Comp, it is so designed that the RESET signal is held issued if shifted to the light load mode, with which the switching is tuned OFF and the switching pulses are thinned out under control. Activating the switching intermittently reduces the switching dissipation and improves the efficiency. SENSE Current Comp RESET VOUT R Q Level Shift FB SET S Gm Amp. ITH IL Driver Logic VOUT SW Load OSC Fig.22 Diagram of current mode PWM control PVCC Current Comp SENSE PVCC SENSE Current Comp FB FB SET GND SET GND RESET GND RESET GND SW GND SW IL GND IL(AVE) IL 0A VOUT VOUT(AVE) VOUT VOUT(AVE) Not switching Fig.23 PWM switching timing chart www.rohm.com © ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 TM Fig.24 SLLM 9/20 switching timing chart TSZ02201-0J3J0AJ00120-1-2 02.MAR.2012 Rev.001 Datasheet BD9123MUV Description of Operations ・Soft-start function EN terminal shifted to “High” activates a soft-starter to gradually establish the output voltage with the current limited during startup, by which it is possible to prevent an overshoot of output voltage and an inrush current. The inclination of standing up is different and the soft start time is different because of constancy depending on the value offset output voltage. When 1V settiing it, it is Tss=1msec(Typ.) VCC,EN 1.2V 0.85V VOUT Tss [ms] Tss’ Fig.25 Soft start action ・Shutdown function With EN terminal shifted to “Low”, the device turns to Standby Mode, and all the function blocks including reference voltage circuit, internal oscillator and drivers are turned to OFF. Circuit current during standby is 0µA(Typ.). ・UVLO function Detects whether the input voltage sufficient to secure the output voltage of this IC is supplied. of 50mV (Typ.) is provided to prevent output chattering. And the hysteresis width Hysteresis 50mV Vcc EN VOUT Tss Soft start Standby mode Tss Tss Operating mode UVLO Standby mode Operating mode Standby mode UVLO EN Standby mode Operating mode UVLO Fig.26 Soft start, Shutdown, UVLO timing chart ・PGOOD function When the output voltage falls below 75% (Typ.) of a set value, the PGOOD pin of Open-Drain is turned off. And the hysteresis width of 15% (Typ.) is provided to prevent output chattering. VOUT 90% The hysteresis width 75% TGP PGOOD Fig.27 PGOOD timing chart www.rohm.com © ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 10/20 TSZ02201-0J3J0AJ00120-1-2 02.MAR.2012 Rev.001 Datasheet BD9123MUV About Setting the Output Voltage Output voltage shifts step by step as often as bit setting to control the overshoot/undershoot that happen when changing the setting value of output voltage. From the bit switching until output voltage reach to setting value, 8 steps (max) delay will occur. (0,0,1) VID<2:0> (1,1,1) 1.2V 0.85V VOUT tVID (max)=0.06ms ⅰ) Switching 3 bit synchronously ⅲ) Switching the bit during counting VID<2> V2D〈2〉 VID<1> 〈1〉 VID<0> 〈0〉 Count STOP Count STOP VOUT VOUT About 10µs from bit switching 5µs(max) About 10µs from bit switching ⅱ) Switching 3 bit with the time lag VID<2> VID<1> VID<0> Count STOP VOUT About 10µs from switching the last bit Fig.28 Timing chart of setting the output voltage It is possible to set output voltage, shown the diagram 1 below, by setting VID<0> to <2> 0 or 1. VID<2:0> terminal is set to VID<2:0>=(0,0,0) originally by the pull down resistor with high impedance inside IC. By pulling up/ pulling down about 10kΩ, the original value is changeable optionally. Table of output voltage setting VID<2> VID<1> VID<0> VOUT 0 0 0 1.0V 0 0 1 0.85V 0 1 0 0.9V 0 1 1 0.95V 1 0 0 1.05V 1 0 1 1.1V 1 1 0 1.15V 1 1 1 1.2V *After 10µs(max) from the bit change, VOUT change starts. *Requiring time for one step (50 mV shift) of VOUT is 5µs(max). *From the bit switching until output voltage reach to setting value, tVID(max)=0.06ms delay will occur. www.rohm.com © ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 11/20 TSZ02201-0J3J0AJ00120-1-2 02.MAR.2012 Rev.001 Datasheet BD9123MUV ・Short-current protection circuit with time delay function Turns OFF the output to protect the IC from breakdown when the incorporated current limiter is activated continuously for the fixed time (TLATCH) or more. The output thus held tuned OFF may be recovered by restarting EN or by re-unlocking UVLO. VCC Output voltage OFF Latch Output Short circuit Threshold Voltage VOUT IL Limit IL t1<TLATCH Output voltage OFF t2=TLATCH Output voltage OFF Operated mode Timer Latch UVLO Operated mode UVLO Fig.29 Short-current protection circuit with time delay timing chart Information on Advantages Advantage 1: Offers fast transient response with current mode control system. Conventional product (Load response IO=0.1A→0.6A) BD9123MUV (Load response IO=0.6A→0.1A) VOUT 37mV VOUT 27mV IOUT IOUT Fig.30 Comparison of transient response Advantage 2: Offers high efficiency for all load range. ・For lighter load: Utilizes the current mode control mode called SLLM for lighter load, which reduces various dissipation such as switching dissipation (PSW), gate charge/discharge dissipation, ESR dissipation of output capacitor (P ESR) and on-resistance dissipation (PRON) that may otherwise cause degradation in efficiency for lighter load. Achieves efficiency improvement for lighter load. ・For heavier load: Utilizes the synchronous rectifying mode and the low on-resistance MOS FETs incorporated as power transistor. Achieves efficiency improvement for heavier load. Offers high efficiency for all load range with the improvements mentioned above. Efficiency η[%] 100 ON resistance of Pch side MOS FET : 0.35mΩ(Typ.) ON resistance of Nch side MOS FET : 0.25mΩ(Typ.) SLLM ② 50 ① PWM ①inprovement by SLLM system ②improvement by synchronous rectifier 0 0.001 0.01 0.1 Output current Io[A] 1 Fig.31 Efficiency www.rohm.com © ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 12/20 TSZ02201-0J3J0AJ00120-1-2 02.MAR.2012 Rev.001 Datasheet BD9123MUV Advantage 3: ・Supplied in smaller package due to small-sized power MOS FET incorporated. ・Output capacitor Co required for current mode control: 10µF ceramic capacitor ・Inductance L required for the operating frequency of 1 MHz: 4.7µH inductor Reduces a mounting area required. VCC VCC 20mm R PGOOD L Cin Co DC/DC Convertor L VOUT RITH Rf Cf CIN RPGOOD 15mm Co RITH CITH CITH Fig.32 Example application Switching Regulator Efficiency Efficiency ŋ may be expressed by the equation shown below: η= VOUT×IOUT ×100[%]= Vin×Iin POUT Pin ×100[%]= POUT POUT+PDα ×100[%] Efficiency may be improved by reducing the switching regulator power dissipation factors PDα as follows: Dissipation factors: 2 1) ON resistance dissipation of inductor and FET: PD(I R) 2) Gate charge/discharge dissipation: PD(Gate) 3) Switching dissipation: PD (SW) 4) ESR dissipation of capacitor: PD (ESR) 5) Operating current dissipation of IC: PD(IC) 2 2 1) PD(I R)=IOUT ×(RCOIL+RON) (RCOIL[Ω]: DC resistance of inductor, RON[Ω]: ON resistance of FET, IOUT[A]: Output current.) 2) PD(Gate)=Cgs×f×V (Cgs[F]: Gate capacitance of FET、f[H]: Switching frequency、V[V]: Gate driving voltage of FET) 3) PD(SW)= 4) PD(ESR)=IRMS ×ESR (IRMS[A]: Ripple current of capacitor, ESR[Ω]: Equivalent series resistance.) 5) PD(IC)=Vin×ICC (ICC[A]: Circuit current.) 2 Vin ×CRSS×IOUT×f IDRIVE (CRSS[F]: Reverse transfer capacitance of FET, IDRIVE[A]: Peak current of gate.) 2 www.rohm.com © ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 13/20 TSZ02201-0J3J0AJ00120-1-2 02.MAR.2012 Rev.001 Datasheet BD9123MUV Consideration on Permissible Dissipation and Heat Generation As this IC functions with high efficiency without significant heat generation in most applications, no special consideration is needed on permissible dissipation or heat generation. In case of extreme conditions, however, including lower input voltage, higher output voltage, heavier load, and/or higher temperature, the permissible dissipation and/or heat generation must be carefully considered. For dissipation, only conduction losses due to DC resistance of inductor and ON resistance of FET are considered. Because the conduction losses are considered to play the leading role among other dissipation mentioned above including gate charge/discharge dissipation and switching dissipation. 4 layers (Copper foil area : 5505mm2) copper foil in each layers. θj-a=47.0℃/W ② 4 layers (1st and 4th copper foil area : 6.28m2) (2nd and 3rd copper foil area: 5505m2) (copper foil in each layers) θj-a=70.62℃/W ③ 1 layer (Copper foil area : 6.28m2) θj-a=201.6℃/W ④ IC only. θj-a=462.9℃/W ① Power dissipation:Pd [W] 4.0 3.0 ①2.66W 2.0 1.0 ②1.77W 2 P=IOUT ×RON RON=D×RONP+(1-D)RONN D：ON duty (=VOUT/VCC) RONP：ON resistance of Highside MOS FET RONN：ON resistance of Lowside MOS FET IOUT：Output curren ③0.62W ④0.27W 0 0 25 50 75 100 105 125 150 Ambient temperature:Ta [℃] Fig.33 Thermal derating curve (VQFN016V3030) If VCC=3.3V, VOUT=1.2V, RONP=0.35mΩ, RONN=0.25mΩ IOUT=1.2A, for example, D=VOUT/VCC=1.2/5=0.24 RON=0.24×0.35+(1-0.24)×0.25 =0.084+0.19 =0.274[Ω] 2 P=1.2 ×0.247=0.394[W] As RONP is greater than RONN in this IC, the dissipation increases as the ON duty becomes greater. With the consideration on the dissipation as above, thermal design must be carried out with sufficient margin allowed. Selection of Components Externally Connected 1. Selection of inductor (L) The inductance significantly depends on output ripple current. As seen in the equation (1), the ripple current decreases as the inductor and/or switching frequency increases. IL ΔIL ΔIL= (VCC-VOUT)×VOUT L×VCC×f [A]・・・(1) VCC Appropriate ripple current at output should be 20% more or less of the maximum output current. IL ΔIL=0.3×IOUTmax. [A]・・・(2) VOUT (VCC-VOUT)×VOUT L Co L= ΔIL×VCC×f [H]・・・(3) (ΔIL: Output ripple current, and f: Switching frequency) Fig.34Output ripple current www.rohm.com © ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 14/20 TSZ02201-0J3J0AJ00120-1-2 02.MAR.2012 Rev.001 Datasheet BD9123MUV ※Current exceeding the current rating of the inductor results in magnetic saturation of the inductor, which decreases efficiency. The inductor must be selected allowing sufficient margin with which the peak current may not exceed its current rating. If VCC=5.0V, VOUT=1.2V, f=1MHz, ΔIL=0.3×1.2A=0.36A, for example, (5-1.2)×1.2 L= 0.6×5×1M =2.53µ → 4.7 [µH] ※Select the inductor of low resistance component (such as DCR and ACR) to minimize dissipation in the inductor for better efficiency. 2. Selection of output capacitor (CO) Output capacitor should be selected with the consideration on the stability region and the equivalent series resistance required to smooth ripple voltage. VCC Output ripple voltage is determined by the equation (4): ΔVOUT=ΔIL×ESR [V]・・・(4) (ΔIL: Output ripple current, ESR: Equivalent series resistance of output capacitor) VOUT L ESR Co ※ Rating of the capacitor should be determined allowing sufficient margin against output voltage. A 10µF to 100µF ceramic capacitor is recommended. Fig.35 Output capacitor Less ESR allows reduction in output ripple voltage. 3. Selection of input capacitor (Cin) Input capacitor to select must be a low ESR capacitor of the capacitance sufficient to cope with high ripple current to prevent high transient voltage. The ripple current IRMS is given by the equation (5): VCC Cin IRMS=IOUT× VOUT L Co Fig.36 Input capacitor √VOUT(VCC-VOUT) VCC [A]・・・(5) < Worst case > IRMS(max.) IOUT When Vcc=2×VOUT, IRMS= 2 IRMS= If VCC=5V, VOUT=1.2V, and IOUTmax.=1.2A, √1.2(5-1.2) IRMS=1.2× =0.51 [ARMS] 5 A low ESR 10µF/10V ceramic capacitor is recommended to reduce ESR dissipation of input capacitor for better efficiency. www.rohm.com © ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 15/20 TSZ02201-0J3J0AJ00120-1-2 02.MAR.2012 Rev.001 Datasheet BD9123MUV 4. Determination of RITH, CITH that works as a phase compensator As the Current Mode Control is designed to limit a inductor current, a pole (phase lag) appears in the low frequency area due to a CR filter consisting of a output capacitor and a load resistance, while a zero (phase lead) appears in the high frequency area due to the output capacitor and its ESR. So, the phases are easily compensated by adding a zero to the power amplifier output with C and R as described below to cancel a pole at the power amplifier. fp(Min.) fp= A Gain [dB] fp(Max.) Phase [deg] 2π×RO×CO 1 fz(ESR)= 2π×ESR×CO 0 fz(ESR) IOUTMin. 1 IOUTMax. Pole at power amplifier When the output current decreases, the load resistance Ro increases and the pole frequency lowers. 0 -90 fp(Min.)= 1 [Hz]←with lighter load 2π×ROMax.×CO fp(Max.)= 1 2π×ROMin.×CO Fig.37 Open loop gain characteristics A [Hz]←with heavier load Zero at power amplifier Increasing capacitance of the output capacitor lowers the pole frequency while the zero frequency does not change. (This is because when the capacitance is doubled, the capacitor ESR reduces to half.) fz(Amp.) Gain [dB] 0 fz(Amp.)= 0 1 2π×RITH.×CITH Phase [deg] -90 Fig.38 Error amp phase compensation characteristics VCC RPG Cin VCC EN VOUT VID<2:0> VCC,PVCC PGOOD VOUT L VID<2:0) ITH SW VOUT GND,PGND RITH ESR CITH CO RO Fig.39 Typical application Stable feedback loop may be achieved by canceling the pole fp (Min.) produced by the output capacitor and the load resistance with CR zero correction by the error amplifier. fz(Amp.)= fp(Min.) 1 2π×RITH×CITH www.rohm.com © ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 = 1 2π×ROMax.×CO 16/20 TSZ02201-0J3J0AJ00120-1-2 02.MAR.2012 Rev.001 Datasheet BD9123MUV Cautions on PC Board Layout Fig.40 Layout diagram ① ② Lay out the input ceramic capacitor CIN closer to the pins PVCC and PGND, and the output capacitor Co closer to the pin PGND. Lay out CITH and RITH between the pins ITH and GND as neat as possible with least necessary wiring. ※VQFN016V3030 has thermal PAD on the reverse of the package. The package thermal performance may be enhanced by bonding the PAD to GND plane which take a large area of PCB. Recommended Components Lists on Above Application Recommended components Lists Symbol Value Manufacturer Coil 4.7uH TDK VLF5014S-4R7M1R7 CIN Ceramic capacitor 10uF KYOCERA CM316X5R106M10A CO Ceramic capacitor 22uF KYOCERA CM316B226M06A CITH Ceramic capacitor 1500pF murata GRM18 Series RITH Resistance 9.1kΩ ROHM MCR03 Series Cf Ceramic capacitor 0.1uF murata GRM18 Series Rf Resistance 100Ω ROHM MCR03 Series L Part Series ※The parts list presented above is an example of recommended parts. Although the parts are sound, actual circuit characteristics should be checked on your application carefully before use. Be sure to allow sufficient margins to accommodate variations between external devices and this IC when employing the depicted circuit with other circuit constants modified. Both static and transient characteristics should be considered in establishing these margins. When switching noise is substantial and may impact the system, a low pass filter should be inserted between the VCC and PVCC pins, and a schottky barrier diode or snubber established between the SW and PGND pins. www.rohm.com © ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 17/20 TSZ02201-0J3J0AJ00120-1-2 02.MAR.2012 Rev.001 Datasheet BD9123MUV ●I/O Equivalence Circuit 【BD9123MUV】 ・EN pin ・SW pin PVCC EN PVCC PVCC SW ・VOUT pin ・ITH pin VCC PGOOD ・PGOOD VOUT ITH ・VID〈2:0〉 pin VID〈2:0〉 Fig.41 I/O equivalence circuit www.rohm.com © ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 18/20 TSZ02201-0J3J0AJ00120-1-2 02.MAR.2012 Rev.001 Datasheet BD9123MUV ●Operational Notes 1. Absolute Maximum Ratings While utmost care is taken to quality control of this product, any application that may exceed some of the absolute maximum ratings including the voltage applied and the operating temperature range may result in breakage. If broken, short-mode or open-mode may not be identified. So if it is expected to encounter with special mode that may exceed the absolute maximum ratings, it is requested to take necessary safety measures physically including insertion of fuses. 2. Electrical potential at GND GND must be designed to have the lowest electrical potential In any operating conditions. 3. Short-circuiting between terminals, and mismounting When mounting to pc board, care must be taken to avoid mistake in its orientation and alignment. Failure to do so may result in IC breakdown. Short-circuiting due to foreign matters entered between output terminals, or between output and power supply or GND may also cause breakdown. 4. Thermal shutdown protection circuit Thermal shutdown protection circuit is the circuit designed to isolate the IC from thermal runaway, and not intended to protect and guarantee the IC. So, the IC the thermal shutdown protection circuit of which is once activated should not be used thereafter for any operation originally intended. 5. Inspection with the IC set to a pc board If a capacitor must be connected to the pin of lower impedance during inspection with the IC set to a pc board, the capacitor must be discharged after each process to avoid stress to the IC. For electrostatic protection, provide proper grounding to assembling processes with special care taken in handling and storage. When connecting to jigs in the inspection process, be sure to turn OFF the power supply before it is connected and removed. 6. Input to IC terminals + This is a monolithic IC with P isolation between P-substrate and each element as illustrated below. This P-layer and the N-layer of each element form a P-N junction, and various parasitic elements are formed. If a resistor is joined to a transistor terminal as shown in Fig 42. ○P-N junction works as a parasitic diode if the following relationship is satisfied; GND>Terminal A (at resistor side), or GND>Terminal B (at transistor side); and ○if GND>Terminal B (at NPN transistor side), a parasitic NPN transistor is activated by N-layer of other element adjacent to the above-mentioned parasitic diode. The structure of the IC inevitably forms parasitic elements, the activation of which may cause interference among circuits, and/or malfunctions contributing to breakdown. It is therefore requested to take care not to use the device in such manner that the voltage lower than GND (at P-substrate) may be applied to the input terminal, which may result in activation of parasitic elements. Resistor Transistor (NPN) Pin A Pin B C Pin B B Pin A N P+ N P+ P E N N Parasitic element P+ GND B P P+ C N E Parasitic element P substrate P substrate Parasitic element N Parasitic element GND GND GND Other adjacent elements Fig.42 Simplified structure of monorisic IC 7. Ground wiring pattern If small-signal GND and large-current GND are provided, It will be recommended to separate the large-current GND pattern from the small-signal GND pattern and establish a single ground at the reference point of the set PCB so that resistance to the wiring pattern and voltage fluctuations due to a large current will cause no fluctuations in voltages of the small-signal GND. Pay attention not to cause fluctuations in the GND wiring pattern of external parts as well. 8. Selection of inductor It is recommended to use an inductor with a series resistance element (DCR) 50mΩ or less. Especially, in case output voltage is set 1.6V or more, note that use of a high DCR inductor will cause an inductor loss, resulting in decreased output voltage. Should this condition continue for a specified period (soft start time + timer latch time), output short circuit protection will be activated and output will be latched OFF. When using an inductor over 50mΩ, be careful to ensure adequate margins for variation between external devices and this IC, including transient as well as static characteristics. Furthermore, in any case, it is recommended to start up the output with EN after supply voltage is within operation range. Status of this document The Japanese version of this document is formal specification. A customer may use this translation version only for a reference to help reading the formal version. If there are any differences in translation version of this document formal version takes priority. www.rohm.com © ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 19/20 TSZ02201-0J3J0AJ00120-1-2 02.MAR.2012 Rev.001 Datasheet BD9123MUV ●Ordering Information B D 9 1 2 3 M U V - Package MUV : VQFN016V3030 E2 Packaging and forming specification E2: Embossed tape and reel ●Physical Dimension Tape and Reel Information ●Marking Diagram VQFN016V3030 (TOP VIEW) Part Number Marking D 9 1 2 LOT Number 3 1PIN MARK www.rohm.com © ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 20/20 TSZ02201-0J3J0AJ00120-1-2 02.MAR.2012 Rev.001 Datasheet Notice ●Precaution for circuit design 1) The products are designed and produced for application in ordinary electronic equipment (AV equipment, OA equipment, telecommunication equipment, home appliances, amusement equipment, etc.). If the products are to be used in devices requiring extremely high reliability (medical equipment, transport equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car accessories, safety devices, etc.) and whose malfunction or operational error may endanger human life and sufficient fail-safe measures, please consult with the ROHM sales staff in advance. If product malfunctions may result in serious damage, including that to human life, sufficient fail-safe measures must be taken, including the following: [a] Installation of protection circuits or other protective devices to improve system safety [b] Installation of redundant circuits in the case of single-circuit failure 2) The products are designed for use in a standard environment and not in any special environments. Application of the products in a special environment can deteriorate product performance. Accordingly, verification and confirmation of product performance, prior to use, is recommended if used under the following conditions: [a] Use in various types of liquid, including water, oils, chemicals, and organic solvents [b] Use outdoors where the products are exposed to direct sunlight, or in dusty places [c] Use in places where the products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2 [d] Use in places where the products are exposed to static electricity or electromagnetic waves [e] Use in proximity to heat-producing components, plastic cords, or other flammable items [f] Use involving sealing or coating the products with resin or other coating materials [g] Use involving unclean solder or use of water or water-soluble cleaning agents for cleaning after soldering [h] Use of the products in places subject to dew condensation 3) The products are not radiation resistant. 4) Verification and confirmation of performance characteristics of products, after on-board mounting, is advised. 5) In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse) is applied, confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect product performance and reliability. 6) De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual ambient temperature. 7) Confirm that operation temperature is within the specified range described in product specification. 8) Failure induced under deviant condition from what defined in the product specification cannot be guaranteed. ●Precaution for Mounting / Circuit board design 1) When a highly active halogenous (chlorine, bromine, etc.) flux is used, the remainder of flux may negatively affect product performance and reliability. 2) In principle, the reflow soldering method must be used; if flow soldering method is preferred, please consult with the Company in advance. Regarding Precaution for Mounting / Circuit board design, please specially refer to ROHM Mounting specification ●Precautions Regarding Application Examples and External Circuits 1) If change is made to the constant of an external circuit, allow a sufficient margin due to variations of the characteristics of the products and external components, including transient characteristics, as well as static characteristics. 2) The application examples, their constants, and other types of information contained herein are applicable only when the products are used in accordance with standard methods. Therefore, if mass production is intended, sufficient consideration to external conditions must be made. Notice - Rev.001 Datasheet ●Precaution for Electrostatic This product is Electrostatic sensitive product, which may be damaged due to Electrostatic discharge. Please take proper caution during manufacturing and storing so that voltage exceeding Product maximum rating won't be applied to products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron, isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control). ●Precaution for Storage / Transportation 1) Product performance and soldered connections may deteriorate if the products are stored in the following places: [a] Where the products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2 [b] Where the temperature or humidity exceeds those recommended by the Company [c] Storage in direct sunshine or condensation [d] Storage in high Electrostatic 2) Even under ROHM recommended storage condition, solderability of products out of recommended storage time period may be degraded. It is strongly recommended to confirm solderability before using products of which storage time is exceeding recommended storage time period . 3) Store / transport cartons in the correct direction, which is indicated on a carton as a symbol. Otherwise bent leads may occur due to excessive stress applied when dropping of a carton. 4) Use products within the specified time after opening a dry bag. ●Precaution for product label QR code printed on ROHM product label is only for internal use, and please do not use at customer site. It might contain a internal part number that is inconsistent with an product part number. ●Precaution for disposition When disposing products please dispose them properly with a industry waste company. ●Precaution for Foreign exchange and Foreign trade act Since concerned goods might be fallen under controlled goods prescribed by Foreign exchange and Foreign trade act, please consult with ROHM in case of export. ●Prohibitions Regarding Industrial Property 1) Information and data on products, including application examples, contained in these specifications are simply for reference; the Company does not guarantee any industrial property rights, intellectual property rights, or any other rights of a third party regarding this information or data. Accordingly, the Company does not bear any responsibility for: [a] infringement of the intellectual property rights of a third party [b] any problems incurred by the use of the products listed herein. 2) The Company prohibits the purchaser of its products to exercise or use the intellectual property rights, industrial property rights, or any other rights that either belong to or are controlled by the Company, other than the right to use, sell, or dispose of the products. Notice - Rev.001