ROHM BD9137MUV

TECHNICAL NOTE
Single-chip built-in FET type Switching Regulator Series
High Efficiency
Step-down Switching Regulator
BD9137MUV
●Description
ROHM’s high efficiency step-down switching regulator BD9137MUV is a power supply designed to produce a low voltage
including 0.8 volts from 5.5/3.3 volts power supply line. Offers high efficiency with our original pulse skip control technology
and synchronous rectifier. Employs a current mode control system to provide faster transient response to sudden change in
load.
●Features
1) Offers fast transient response with current mode PWM control system.
2) Offers highly efficiency for all load range with synchronous rectifier (Nch/Nch FET) and SLLM (Simple Light Load Mode)
3) Incorporates soft-start function.
4) Incorporates thermal protection and ULVO functions.
5) Incorporates short-current protection circuit with time delay function.
6) Incorporates shutdown function Icc=0μA(Typ.)
7) Employs small surface mount package : VQFN020V4040
●Use
Power supply for LSI including DSP, Micro computer and ASIC
●Absolute Maximum Rating (Ta=25℃)
Symbol
Parameter
VCC
PVCC
VBST
VBST-SW
VEN
VSW, VITH
Pd1
Pd2
Pd3
Pd4
Topr
Tstg
Tj
VCC Voltage
PVCC Voltage
BST Voltage
BST_SW Voltage
EN Voltage
SW,ITH Voltage
Power Dissipation 1
Power Dissipation 2
Power Dissipation 3
Power Dissipation 4
Operating temperature range
Storage temperature range
Maximum junction temperature
＊1
＊2
＊3
＊4
＊5
Limits
BD9137MUV
1
-0.3～+7 *
1
-0.3～+7 *
-0.3～+13
-0.3～+7
-0.3～+7
-0.3～+7
2
0.34 *
0.70 *3
2.21 *4
3.56 *5
-40～+105
-55～+150
+150
Unit
V
V
V
V
V
V
W
W
W
W
℃
℃
℃
Pd should not be exceeded.
IC only
1-layer. mounted on a 74.2mm×74.2mm×1.6mm glass-epoxy board, occupied area by copper foil : 10.29mm2
4 layers, mounted on a board 74.2mm×74.2mm×1.6mm Glass-epoxy PCB (1st ,4th Copper foil area : 10.29mm2 2nd ,3rd Copper foil area : 5505mm2)
4-layer. mounted on a 74.2mm×74.2mm×1.6mm glass-epoxy board, occupied area by copper foil : 5505mm2, in each layers
●Operating Conditions (Ta=-40～+105℃)
Parameter
Power Supply Voltage
EN Voltage
Output voltage Setting Range
SW average output current
＊6
＊7
Symbol
VCC
PVCC
VEN
VOUT
ISW
Min.
2.7
2.7
0
0.8
-
BD9137MUV
Typ.
3.3
3.3
-
Unit
Max.
5.5
5.5
5.5
3.3*6
4.0*7
V
V
V
V
A
In case set output voltage 1.6V or more, VccMin = Vout+1.2V.
Pd should not be exceeded.
Dec. 2008
●Electrical Characteristics
◎BD9137MUV (Ta=25℃ VCC=PVCC=3.3V, EN=VCC, R1=10kΩ, R2=5kΩ, unless otherwise specified.)
Parameter
Symbol
Min.
Typ.
Max.
Unit
Conditions
Standby current
ISTB
0
10
μA
EN=GND
Active current
ICC
250
500
μA
Standby mode
EN Low voltage
GND
0.8
V
VENL
Active mode
EN High voltage
2.0
Vcc
V
VENH
EN input current
2
10
μA
VEN=3.3V
IEN
SLLM & PWM mode
PWM Low voltage
GND
0.8
V
VPWML
PWM mode
PWM High voltage
2.0
Vcc
V
VPWMH
PWM input current
2
10
μA
VPWM=3.3V
IPWM
Oscillation frequency
0.8
1
1.2
MHz
FOSC
High side FET ON resistance
82
115
mΩ
PVCC=3.3V
RONH
Low side FET ON resistance
70
98
mΩ
PVCC=3.3V
RONL
ADJ Voltage
0.788
0.800
0.812
V
VADJ
ITH SInk current
10
18
μA
VADJ=1V
ITHSI
ITH Source Current
10
18
μA
VADJ=0.6V
ITHSO
UVLO threshold voltage
2.400
2.500
2.600
V
VCC=3.3V→0V
VUVLO1
UVLO release voltage
2.425
2.550
2.700
V
VCC=0V→3.3V
VUVLO2
Soft start time
2.5
5
10
ms
TSS
Hiccup delay
0.5
1
2
Ms
THP
Cool down time
8
16
32
ms
TCD
Output Short circuit
0.40
0.56
V
VADJ =0.8V→0V
VSCP
Threshold Voltage
●Block Diagram, Application Circuit
【BD9137MUV】
4.0±0.1
VCC
EN
VCC
4.0±0.1
VREF
D9137
BST
Current
Comp
Lot No.
1.0Max.
S
S
C0.2 2.1±0.1
6
16
1.0
10
SLOPE
CLK
OSC
3.3V
Input
+
Driver
Logic
UVLO
SW
Output
PVCC
PGND
TSD
SLLM
select
SCP
ADJ
11
ITH
RITH
0.25 +0.05
0.5
-0.04
(Unit : mm)
PVCC
VCC
Soft
Start
5
20
15
+
2.1±0.1
1
0.02 +0.03
-0.02
(0.22)
Gm Amp
0.08 S
0.4±0.1
R Q
+
Current
Sense/
Protect
R1 R2
GND
PWM
CITH
Fig.2 BD9137MUV Block Diagram
Fig.1 BD9137MUV TOP View
●Pin No. & function table
Pin
Pin
No.
name
1
SW
SW pin
2
SW
SW pin
Function
Pin
No.
11
12
Pin
name
GND
ADJ
3
SW
SW pin
13
ITH
4
SW
SW pin
14
PWM
5
6
7
8
9
10
SW
PVCC
PVCC
PVCC
BST
VCC
SW pin
Highside FET source pin
Highside FET source pin
Highside FET source pin
Bootstrapped voltage input pin
VCC power supply input pin
15
16
17
18
19
20
TP.1
TP.2
EN
PGND
PGND
PGND
2/16
Function
Ground
Output voltage detect pin
GmAmp output pin/Connected phase
compensation capacitor
Select SLLM / PWM
(H:PWM mode , L:SLLM & PWM mode)
Test pin(connect to GND)
Test pin(connect to GND)
Enable pin(High Active）
Lowside FET source pin
Lowside source pin
Lowside source pin
●Characteristics data【BD9137MUV】
2.0
2.0
2.0
1.6
1.2
0.8
0.4
Ta=25℃
Io=3A
1.6
1.2
0.8
VCC=5V
Ta=25℃
Io=0A
0.4
0.0
0.0
0
1
2
3
4
INPUT VOLTAGE:VCC[V]
1
Fig.3 Vcc - VOUT
2
3
EN VOLTAGE:VEN[V]
4
1.2
0.8
0.4
VCC=5V
Ta=25℃
5
0
1
2
3
4
5
6
7
OUTPUT CURRENT:IOUT[A]
Fig.4 VEN - VOUT
1200
【VOUT=1.2V】
90
1000
70
EFFICIENCY:η[%]
1.20
FREQUENCY:FOSC[MHz]
80
1.21
【SLLM】
60
50
【PWM】
40
30
1.19
20
VCC=5V
Io=0A
VCC=5V
Ta=25℃
10
800
600
400
200
VCC=5V
0
1.18
-40
-20
0
20
40
60
80
TEMPERATURE:Ta[℃]
1
100
10
100
1000
-40
2.0
400
1.8
350
High side
50
Low side
25
0
20
40
60
80
TEMPERATURE:Ta[℃]
1.2
1.0
0.8
0.6
100
20
40
60
80
100
Fig.8 Ta - Fosc
250
200
150
100
VCC=5V
50
0
0.0
-40
-20
0
20
40
60
80
-40
100
-20
0
20
40
60
80
100
TEMPERATURE:Ta[℃]
TEMPERATURE:Ta[℃]
Fig.10 Fig.11 Ta - VEN
Fig.9 Ta – RONN, RONP
0
300
VCC=5V
0.2
0
-20
1.4
0.4
VCC=3.3V
-40
CIRCUIT CURRENT:I CC[μA]
EN VOLTAGE:VEN[V]
1.6
100
-20
TEMPERATURE:Ta[℃]
Fig.7 Efficiency
125
75
0
10000
OUTPUT CURRENT:IOUT[mA]
Fig. 6 Ta - VOUT
150
8
Fig.5 IOUT - VOUT
100
【VOUT=1.2V】
ON RESISTANCE:RON[Ω]
1.6
0.0
0
5
1.22
OUTPUT VOLTAGE:VOUT[V]
【VOUT=1.2V】
OUTPUT VOLTAGE:VOUT[V]
【VOUT=1.2V】
OUTPUT VOLTAGE:VOUT[V]
OUTPUT VOLTAGE:VOUT[V]
【VOUT=1.2V】
Fig.11 Ta - Icc
1.1
FREQUENCY:FOSC[MHz]
【VOUT=1.2V】
1
【SLLM
VCC=PVCC
=EN
VOUT=1.2V】
SW
0.9
0.8
VCC=5V
Ta=25℃
Io=0A
VOUT
Ta=25℃
0.7
2.7
3.4
4.1
4.8
INPUT VOLTAGE:VCC[V]
VCC=5V
Ta=25℃
5.5
Fig.12 Vcc - Fosc
【PWM
VOUT
Fig.13 Soft start waveform
Fig.14 SW waveform Io=10mA
【VOUT=1.2V】
VOUT=1.2V】
【VOUT=1.2V】
VOUT
VOUT
SW
73mV
72mV
IOUT
IOUT
VOUT
VCC=5V
Ta=25℃
VCC=5V
Ta=25℃
Fig.15 SW waveform Io=10mA
Fig. 16 Transient Response
Io=1→3A(10μs)
3/16
VCC=5V
Ta=25℃
Fig.17 Transient Response
Io=3→1A(10μs)
●Information on advantages
Advantage 1：Offers fast transient response with current mode control system.
BD9137MUV (Load response IO=1A→3A)
Conventional product (Load response IO=1A→3A)
VOUT
VOUT
72mV
145mV
IOUT
IOUT
Voltage drop due to sudden change in load was reduced by about 50%.
Fig.18 Comparison of transient response
Advantage 2： Offers high efficiency for all load range.
・For lighter load:
Utilizes the current mode control mode called SLLM for lighter load, which reduces various dissipation such as switching
dissipation (PSW), gate charge/discharge dissipation, ESR dissipation of output capacitor (PESR) and on-resistance dissipation
(PRON) that may otherwise cause degradation in efficiency for lighter load.
Achieves efficiency improvement for lighter load.
・For heavier load:
Utilizes the synchronous rectifying mode and the low on-resistance MOS FETs incorporated as power transistor.
ON resistance of Highside MOS FET : 82mΩ(Typ.)
ON resistance of Lowside MOS FET : 70mΩ(Typ.)
Efficiency η[%]
100
Achieves efficiency improvement for heavier load.
SLLM
②
50
①
PWM
①inprovement by SLLM system
②improvement by synchronous rectifier
0
0.001
Offers high efficiency for all load range with the improvements mentioned above.
0.01
0.1
Output current Io[A]
1
Fig.19 Efficiency
Advantage 3：・Supplied in smaller package due to small-sized power MOS FET incorporated.
・Output capacitor Co required for current mode control: 22μF ceramic capacitor
・Inductance L required for the operating frequency of 1 MHz: 2.2μH inductor
・Incorporates FET + Boot strap diode
Reduces a mounting area required.
VCC
EN
VCC
VREF
20mm
BST
Current
Comp
+
Gm Amp
+
Soft
Start
SLOPE
OSC
VCC
UVLO
CLK
PVCC
Current
Sense/
Protect
+
Driver
Logic
SW
3.3V
Input
Cf
Rf
Output
PVCC
15mm
R1
L
CIN
RITH
PGND
ITH
SLLM
select
CITH
GND
Co
PWM
RITH CITH
R1 R2
CBST
R2
TSD
SCP
ADJ
RQ
S
Fig.20 Example application
4/16
●Operation
BD9137MUV is a synchronous rectifying step-down switching regulator that achieves faster transient response by employing
current mode PWM control system. It utilizes switching operation in PWM (Pulse Width Modulation) mode for heavier load,
while it utilizes SLLM (Simple Light Load Mode) operation for lighter load to improve efficiency.
○Synchronous rectifier
It does not require the power to be dissipated by a rectifier externally connected to a conventional DC/DC converter IC, and its
P.N junction shoot-through protection circuit limits the shoot-through current during operation, by which the power dissipation of
the set is reduced.
○Current mode PWM control
Synthesizes a PWM control signal with a inductor current feedback loop added to the voltage feedback.
・PWM (Pulse Width Modulation) control
The oscillation frequency for PWM is 1 MHz. SET signal form OSC turns ON a highside MOS FET (while a lowside MOS FET
is turned OFF), and an inductor current IL increases. The current comparator (Current Comp) receives two signals, a current
feedback control signal (SENSE: Voltage converted from IL) and a voltage feedback control signal (FB), and issues a RESET
signal if both input signals are identical to each other, and turns OFF the highside MOS FET (while a lowside MOS FET is turned
ON) for the rest of the fixed period. The PWM control repeat this operation.
・SLLM (Simple Light Load Mode) control
When the control mode is shifted from PWM for heavier load to the one for lighter load or vise versa, the switching pulse is
designed to turn OFF with the device held operated in normal PWM control loop, which allows linear operation without voltage
drop or deterioration in transient response during the mode switching from light load to heavy load or vise versa.
Although the PWM control loop continues to operate with a SET signal from OSC and a RESET signal from Current Comp, it is
so designed that the RESET signal is held issued if shifted to the light load mode, with which the switching is tuned OFF and
the switching pulses are thinned out under control. Activating the switching intermittently reduces the switching dissipation
and improves the efficiency.
SENSE
Current
Comp
RESET
VOUT
R Q
Level
Shift
FB
SET
Gm Amp.
ITH
IL
S
Driver
Logic
VOUT
SW
Load
OSC
Fig.21 Diagram of current mode PWM control
PVCC
Current
Comp
SENSE
PVCC
SENSE
Current
Comp
FB
SET
FB
GND
SET
GND
RESET
GND
RESET
GND
SW
GND
SW
IL
GND
IL(AVE)
IL
0A
VOUT
VOUT
VOUT(AVE)
VOUT(AVE)
Not switching
Fig.22 PWM switching timing chart
Fig.23 SLLMTM switching timing chart
5/16
●Description of operations
・Soft-start function
EN terminal shifted to “High” activates a soft-starter to gradually establish the output voltage with the current limited during
startup, by which it is possible to prevent an overshoot of output voltage and an inrush current.
・Shutdown function
With EN terminal shifted to “Low”, the device turns to Standby Mode, and all the function blocks including reference voltage
circuit, internal oscillator and drivers are turned to OFF. Circuit current during standby is 0μF (Typ.).
・UVLO function
Detects whether the input voltage sufficient to secure the output voltage of this IC is supplied. And the hysteresis width of
50mV (Typ.) is provided to prevent output chattering.
Hysteresis 50mV
VCC
EN
VOUT
Tss
Tss
Tss
Soft start
Standby mode
Operating mode
UVLO
Standby
mode
Operating mode
UVLO
Standby
mode
EN
Fig.24 Soft start, Shutdown, UVLO timing chart
6/16
Operating mode
Standby mode
UVLO
・Short-current protection circuit with time delay function
Turns OFF the output to protect the IC from breakdown when the incorporated current limiter is activated continuously for the
fixed time(Hiccup delay) or more. The IC returns to normal operation after Cool down time period has elapsed (self-returning
type).
Hiccup delay
1msec
EN
Output Current in non-control
～
～
VOUT
Cool down
time
16msec
1/2VOUT
Limit
Output voltage OFF
～
～
Output Current in control by limit value
(With fall of the output voltage, limit value goes down)
Standby mode
Operated mode
～
～
IL
Cool down
EN
Operated mode
Output voltage OFF
Fig.25 Short-current protection circuit with time delay timing chart
●Switching regulator efficiency
Efficiency ŋ may be expressed by the equation shown below:
η=
VOUT×IOUT
Vin×Iin
×100[%]=
POUT
Pin
×100[%]=
POUT
POUT+PDα
×100[%]
Efficiency may be improved by reducing the switching regulator power dissipation factors PDα as follows:
Dissipation factors:
2
1) ON resistance dissipation of inductor and FET：PD(I R)
2) Gate charge/discharge dissipation：PD(Gate)
3) Switching dissipation：PD(SW)
4) ESR dissipation of capacitor：PD(ESR)
5) Operating current dissipation of IC：PD(IC)
2
2
1)PD(I R)=IOUT ×(RCOIL+RON) (RCOIL[Ω]：DC resistance of inductor, RON[Ω]：ON resistance of FET, IOUT[A]：Output current.)
2)PD(Gate)=Cgs×f×V (Cgs[F]：Gate capacitance of FET、f[H]：Switching frequency、V[V]：Gate driving voltage of FET)
2
Vin ×CRSS×IOUT×f
3)PD(SW)=
(CRSS[F]：Reverse transfer capacitance of FET、IDRIVE[A]：Peak current of gate.)
IDRIVE
2
4)PD(ESR)=IRMS ×ESR (IRMS[A]：Ripple current of capacitor、ESR[Ω]：Equivalent series resistance.)
5)PD(IC)=Vin×ICC (ICC[A]：Circuit current.)
7/16
●Consideration on permissible dissipation and heat generation
As this IC functions with high efficiency without significant heat generation in most applications, no special consideration is needed
on permissible dissipation or heat generation. In case of extreme conditions, however, including lower input voltage, higher
output voltage, heavier load, and/or higher temperature, the permissible dissipation and/or heat generation must be carefully
considered.
For dissipation, only conduction losses due to DC resistance of inductor and ON resistance of FET are considered. Because the
conduction losses are considered to play the leading role among other dissipation mentioned above including gate
charge/discharge dissipation and switching dissipation.
4.5
2
① 4 layers (copper foil area : 5505mm )
(copper foil in each layers)
θj-a=35.1℃/W
2
② 4 layers (1st,4thcopper foil area : 10.29mm )
2
(2nd ,3rd copper foil area : 5505mm )
θj-a=56.6℃/W
2
③ 1 layer (copper foil area :10.29mm )
θj-a=178.6℃/W
④IC only
θj-a=367.6℃/W
4.0
Power dissipation:Pd [W]
①3.56W
3.0
②2.21W
2
P=IOUT ×RON
RON=D×RONP+(1-D)RONN
D：ON duty (=VOUT/VCC)
RONH：ON resistance of Highside MOS FET
RONL：ON resistance of Lowside MOS FET
IOUT：Output current
2.0
1.0
③0.70W
④0.34W
0
0
25
50
75
100 105
125
150
Ambient temperature:Ta [℃]
Fig.26 Thermal derating curve
(VQFN020V4040)
If VCC=3.3V, VOUT=1.8V, RONH=82mΩ, RONL=70mΩ
IOUT=3A, for example,
D=VOUT/VCC=1.8/3.3=0.545
RON=0.545×0.082+(1-0.545)×0.07
=0.0447+0.0319
=0.0766[Ω]
P=32×0.0766＝0.6894[W]
As RONH is greater than RONL in this IC, the dissipation increases as the ON duty becomes greater. With the consideration on
the dissipation as above, thermal design must be carried out with sufficient margin allowed.
8/16
●Selection of components externally connected
1. Selection of inductor (L)
IL
The inductance significantly depends on output ripple current.
As seen in the equation (1), the ripple current decreases as the
inductor and/or switching frequency increases.
(VCC-VOUT)×VOUT
ΔIL=
[A]・・・(1)
L×VCC×f
ΔIL
VCC
IL
Appropriate ripple current at output should be 20% more or less of the
maximum output current.
VOUT
L
ΔIL=0.2×IOUTmax. [A]・・・(2)
Co
L=
Fig.27 Output ripple current
(VCC-VOUT)×VOUT
ΔIL×VCC×f
[H]・・・(3)
(ΔIL: Output ripple current, and f: Switching frequency)
※Current exceeding the current rating of the inductor results in magnetic saturation of the inductor, which decreases efficiency.
The inductor must be selected allowing sufficient margin with which the peak current may not exceed its current rating.
If VCC=5.0V, VOUT=2.5V, f=1MHz, ΔIL=0.2×3A=0.6A, for example,(BD9137MUV)
L=
(5-2.5)×2.5
0.6×5×1M
=2.08μ → 2.2[μH]
※Select the inductor of low resistance component (such as DCR and ACR) to minimize dissipation in the inductor for better
efficiency.
2. Selection of output capacitor (CO)
VCC
Output capacitor should be selected with the consideration on the stability region
and the equivalent series resistance required to smooth ripple voltage.
VOUT
L
Output ripple voltage is determined by the equation (4)：
ESR
ΔVOUT=ΔIL×ESR [V]・・・(4)
Co
(ΔIL: Output ripple current, ESR: Equivalent series resistance of output capacitor)
Fig.28 Output capacitor
※Rating of the capacitor should be determined allowing sufficient margin against
output voltage. A 22μF to 100μF ceramic capacitor is recommended.
Less ESR allows reduction in output ripple voltage.
9/16
3. Selection of input capacitor (Cin)
VCC
Input capacitor to select must be a low ESR capacitor of the capacitance
sufficient to cope with high ripple current to prevent high transient voltage. The
ripple current IRMS is given by the equation (5):
Cin
VOUT
L
IRMS=IOUT×
Co
√VOUT(VCC-VOUT)
VCC
[A]・・・(5)
< Worst case > IRMS(max.)
When Vcc=2×VOUT, IRMS=
IOUT
2
If VCC=3.3V, VOUT=1.8V, and IOUTmax.=3A, (BD9137MUV)
Fig.29 Input capacitor
IRMS=2×
√1.8(3.3-1.8)
3.3
=1.49[ARMS]
A low ESR 22μF/10V ceramic capacitor is recommended to reduce ESR dissipation of input capacitor for better efficiency.
4. Determination of RITH, CITH that works as a phase compensator
As the Current Mode Control is designed to limit a inductor current, a pole (phase lag) appears in the low frequency area due to
a CR filter consisting of a output capacitor and a load resistance, while a zero (phase lead) appears in the high frequency area
due to the output capacitor and its ESR. So, the phases are easily compensated by adding a zero to the power amplifier output
with C and R as described below to cancel a pole at the power amplifier.
fp(Min.)
A
Gain
[dB]
0
fz(ESR)
IOUTMin.
Phase
[deg]
1
2π×RO×CO
1
fz(ESR)=
2π×ESR×CO
fp=
fp(Max.)
IOUTMax.
Pole at power amplifier
When the output current decreases, the load resistance Ro
increases and the pole frequency lowers.
0
-90
fp(Min.)=
1
[Hz]←with lighter load
2π×ROMax.×CO
fp(Max.)=
1
2π×ROMin.×CO
Fig.30 Open loop gain characteristics
A
Gain
[dB]
0
0
Phase
[deg]
-90
fz(Amp.)
[Hz] ←with heavier load
Zero at power amplifier
Increasing capacitance of the output capacitor lowers the pole
frequency while the zero frequency does not change. (This
is because when the capacitance is doubled, the capacitor
ESR reduces to half.)
fz(Amp.)=
Fig.31 Error amp phase compensation characteristics
10/16
1
2π×RITH×CITH
Rf
VCC
Cin
PVCC
EN
VOUT
Cf
VCC
CBST
ADJ
ITH
L
GND,PGND
SW
VOUT
RITH
ESR
CITH
CO
RO
Fig.32 Typical application
Stable feedback loop may be achieved by canceling the pole fp (Min.) produced by the output capacitor and the load resistance
with CR zero correction by the error amplifier.
fz(Amp.)= fp(Min.)
1
2π×RITH×CITH
=
1
2π×ROMax.×CO
5. Determination of output voltage
The output voltage VOUT is determined by the equation (6):
VOUT=(R2/R1+1)×VADJ・・・(6) VADJ: Voltage at ADJ terminal (0.8V Typ.)
With R1 and R2 adjusted, the output voltage may be determined as required.
L
6
Output
SW
Co
R2
1
ADJ
R1
Adjustable output voltage range : 0.8V～3.3V
Fig.33 Determination of output voltage
Use 1 kΩ～100 kΩ resistor for R1. If a resistor of the resistance higher than 100 kΩ is used, check the assembled set carefully
for ripple voltage etc.
3.7
INPUT VOLTAGE : VCC[V]
3.5
The lower limit of input voltage depends on the output voltage.
Basically, it is recommended to use in the condition :
VCCmin = VOUT+1.2V.
Fig.34. shows the necessary output current value at the lower
limit of input voltage. (DCR of inductor : 20mΩ)
This data is the characteristic value, so it’ doesn’t guarantee the
operation range,
Vo=2.5V
3.3
Vo=2.0V
3.1
Vo=1.8V
2.9
2.7
0
1
2
3
OUTPUT CURRENT : IOUT[A]
Fig.34 minimum input voltage in each output voltage
11/16
●BD9137MUV
Cautions on PC Board layout
Fig.35 Layout diagram
①
②
Lay out the input ceramic capacitor CIN closer to the pins PVCC and PGND, and the output capacitor Co closer to the pin
PGND.
Lay out CITH and RITH between the pins ITH and GND as neat as possible with least necessary wiring.
※
VQFN020V4040 (BD9137MUV) has thermal PAD on the reverse of the package.
The package thermal performance may be enhanced by bonding the PAD to GND plane which take a large area of
PCB.
●Recommended components Lists on above application
Symbol
L
Part
Coil
Value
2.0uH
Manufacturer
Sumida
Series
CDR6D28MNP-2R0NC
2.2uH
Sumida
CDR6D26NP-2R2NC
CIN
Ceramic capacitor
22uF
Murata
GRM32EB11A226KE20
CO
Ceramic capacitor
22uF
Murata
GRM31CB30J226KE18
CITH
RITH
Ceramic capacitor
Resistance
Cf
Ceramic capacitor
Rf
Resistance
CBST
Ceramic capacitor
VOUT=1.0V
1500pF
Murata
CRM18 Serise
VOUT=1.2V
1000pF
Murata
GRM18 Serise
VOUT=1.5V
1000pF
Murata
GRM18 Serise
VOUT=1.8V
560pF
Murata
GRM18 Serise
VOUT=2.5V
560pF
Murata
GRM18 Serise
VOUT=1.0V
5.6kΩ
Rohm
MCR03 Serise
VOUT=1.2V
6.8kΩ
Rohm
MCR03 Serise
VOUT=1.5V
6.8kΩ
Rohm
MCR03 Serise
VOUT=1.8V
8.2kΩ
Rohm
MCR03 Serise
VOUT=2.5V
12kΩ
Rohm
MCR03 Serise
1000 pF
Murata
GRM18 Serise
10Ω
Rohm
MCR03 Serise
0.1 uF
Murata
GRM18 Serise
※The parts list presented above is an example of recommended parts. Although the parts are sound, actual circuit characteristics
should be checked on your application carefully before use. Be sure to allow sufficient margins to accommodate variations
between external devices and this IC when employing the depicted circuit with other circuit constants modified. Both static and
transient characteristics should be considered in establishing these margins. When switching noise is substantial and may impact
the system, a low pass filter should be inserted between the VCC and PVCC pins, and a schottky barrier diode or snubber
established between the SW and PGND pins.
12/16
●I/O equivalence circuit
【BD9137MUV】
・EN pin
PVCC
・SW pin
PVCC
PVCC
EN
SW
・ADJ pin
・ITH pin
VCC
ADJ
ITH
・BST pin
PVCC
PVCC
BST
SW
Fig.36 I/O equivalence circuit
13/16
●Cautions on use
1. Absolute Maximum Ratings
While utmost care is taken to quality control of this product, any application that may exceed some of the absolute maximum
ratings including the voltage applied and the operating temperature range may result in breakage. If broken, short-mode or
open-mode may not be identified. So if it is expected to encounter with special mode that may exceed the absolute maximum
ratings, it is requested to take necessary safety measures physically including insertion of fuses.
2. Electrical potential at GND
GND must be designed to have the lowest electrical potential In any operating conditions.
3. Short-circuiting between terminals, and mismounting
When mounting to pc board, care must be taken to avoid mistake in its orientation and alignment. Failure to do so may result
in IC breakdown. Short-circuiting due to foreign matters entered between output terminals, or between output and power
supply or GND may also cause breakdown.
4. Thermal shutdown protection circuit
Thermal shutdown protection circuit is the circuit designed to isolate the IC from thermal runaway, and not intended to protect
and guarantee the IC. So, the IC the thermal shutdown protection circuit of which is once activated should not be used
thereafter for any operation originally intended.
5. Inspection with the IC set to a pc board
If a capacitor must be connected to the pin of lower impedance during inspection with the IC set to a pc board, the capacitor
must be discharged after each process to avoid stress to the IC. For electrostatic protection, provide proper grounding to
assembling processes with special care taken in handling and storage. When connecting to jigs in the inspection process, be
sure to turn OFF the power supply before it is connected and removed.
6. Input to IC terminals
+
This is a monolithic IC with P isolation between P-substrate and each element as illustrated below. This P-layer and the
N-layer of each element form a P-N junction, and various parasitic element are formed.
If a resistor is joined to a transistor terminal as shown in Fig 37.
○P-N junction works as a parasitic diode if the following relationship is satisfied; GND>Terminal A (at resistor side), or
GND>Terminal B (at transistor side); and
○if GND>Terminal B (at NPN transistor side),
a parasitic NPN transistor is activated by N-layer of other element adjacent to the above-mentioned parasitic diode.
The structure of the IC inevitably forms parasitic elements, the activation of which may cause interference among circuits, and/or
malfunctions contributing to breakdown. It is therefore requested to take care not to use the device in such manner that the
voltage lower than GND (at P-substrate) may be applied to the input terminal, which may result in activation of parasitic
elements.
Resistor
Transistor (NPN)
Pin A
Pin B
C
Pin B
B
E
Pin A
N
P
+
N
P
P
+
N
Parasitic
element
N
P+
P substrate
Parasitic element
GND
B
N
P
P
C
+
N
E
Parasitic
element
P substrate
Parasitic element
GND
Fig.37 Simplified structure of monorisic IC
14/16
GND
GND
Other adjacent elements
7. Ground wiring pattern
If small-signal GND and large-current GND are provided, It will be recommended to separate the large-current GND pattern from the
small-signal GND pattern and establish a single ground at the reference point of the set PCB so that resistance to the wiring pattern
and voltage fluctuations due to a large current will cause no fluctuations in voltages of the small-signal GND. Pay attention not to cause
fluctuations in the GND wiring pattern of external parts as well.
8 . Selection of inductor
It is recommended to use an inductor with a series resistance element (DCR) 0.1Ω or less. Especially, in case output voltage is
set 1.6V or more, note that use of a high DCR inductor will cause an inductor loss, resulting in decreased output voltage. Should
this condition continue for a specified period (soft start time + hiccup delay), output short circuit protection will be activated and
output will be turned OFF. When using an inductor over 0.1Ω, be careful to ensure adequate margins for variation between
external devices and this IC, including transient as well as static characteristics.
●Ordering part number
B
D
9
1
ROHM part number
3
U
M
7
V
―
Package
Type
37 : Adjustable (0.8～3.3V)
E
2
Package specification
MUV : VQFN020V4040
E2 : Embossed taping
VQFN020V4040
<Dimension>
<Tape and Reel information>
1.0Max.
4.0±0.1
4.0±0.1
0.08 S
0.4±0.1
2.1±0.1
0.25 +0.05
-0.04
(Unit:mm)
Reel
1Pin
1234
11
1234
10
0.5
(The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand)
1234
6
15
E2
1234
5
16
1.0
2000pcs
Direction
of feed
1234
1
20
Quantity
1234
C0.2 2.1±0.1
Embossed carrier tape
0.02 +0.03
-0.02
(0.22)
S
Tape
Direction of feed
※When you order , please order in times the amount of package quantity.
15/16
Catalog No.08T864A '08.12 ROHM ©
Appendix
Notes
No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM
CO.,LTD.
The content specified herein is subject to change for improvement without notice.
The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you
wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM
upon request.
Examples of application circuits, circuit constants and any other information contained herein illustrate the
standard usage and operations of the Products. The peripheral conditions must be taken into account when
designing circuits for mass production.
Great care was taken in ensuring the accuracy of the information specified in this document. However, should
you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage.
The technical information specified herein is intended only to show the typical functions of and examples of
application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or
exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility
whatsoever for any dispute arising from the use of such technical information.
The Products specified in this document are intended to be used with general-use electronic equipment or
devices (such as audio visual equipment, office-automation equipment, communication devices, electronic
appliances and amusement devices).
The Products are not designed to be radiation tolerant.
While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or
malfunction for a variety of reasons.
Please be sure to implement in your equipment using the Products safety measures to guard against the
possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as
derating, redundancy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your
use of any Product outside of the prescribed scope or not in accordance with the instruction manual.
The Products are not designed or manufactured to be used with any equipment, device or system
which requires an extremely high level of reliability the failure or malfunction of which may result in a direct
threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment,
aerospace machinery, nuclear-reactor controller, fuel-controller or other safety device). ROHM shall bear no
responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended
to be used for any such special purpose, please contact a ROHM sales representative before purchasing.
If you intend to export or ship overseas any Product or technology specified herein that may be controlled under
the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law.
Thank you for your accessing to ROHM product informations.
More detail product informations and catalogs are available, please contact your nearest sales office.
ROHM Customer Support System
www.rohm.com
Copyright © 2008 ROHM CO.,LTD.
THE AMERICAS / EUROPE / ASIA / JAPAN
Contact us : webmaster@ rohm.co. jp
21 Saiin Mizosaki-cho, Ukyo-ku, Kyoto 615-8585, Japan
TEL : +81-75-311-2121
FAX : +81-75-315-0172
Appendix1-Rev3.0