Revised November 1999 100393 Low Power 9-Bit ECL-to-TTL Translator with Latches General Description Features The 100393 is a 9-bit translator for converting F100K logic levels to TTL logic levels. A LOW on the latch enable (LE) latches the data at the input state. A HIGH on the LE makes the latches transparent. A HIGH on either the ECL or TTL output enable (OE ECL or OE TTL), holds the outputs in a high impedance state. ■ 64 mA IOL drive capability ■ 2000V ESD protection ■ −4.2V to −5.7V operating range ■ Latched outputs ■ TTL outputs The 100393 is designed with TTL, 64 mA outputs for Bus Driving capability. All ECL inputs have 50 kΩ pull-down resistors. When the inputs are either unconnected or at the same potential, the outputs will go LOW. Ordering Code: Order Number Package Number 100393QC V28A Package Description 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Connection Diagram Pin Descriptions Pin Names Description D0–D8 Data Inputs (ECL) Q0–Q8 Data Outputs (TTL) LE Latch Enable Input (ECL) OE TTL Output Enable (TTL) OE ECL Output Enable (ECL) © 1999 Fairchild Semiconductor Corporation DS010650 www.fairchildsemi.com 100393 Low Power 9-Bit ECL-to-TTL Translator with Latches February 1990 100393 Truth Table Inputs Outputs QN OE TTL OE ECL LE L L H L L L L H H H L L L X Latched H X X X Z X H X X Z H = HIGH Voltage Level L = LOW Voltage Level X = Don’t Care Z = High Impedance Logic Diagram www.fairchildsemi.com DN 2 Recommended Operating Conditions −65°C to +150°C Storage Temperature (TSTG) +150°C Maximum Junction Temperature (TJ) VEE Pin Potential to Ground Pin −7.0V to +0.5V VTTL Pin Potential to Ground Pin −0.5V to +6.0V Supply Voltage VEE to +0.5V ECL Input Voltage (DC) +130 mA Output Current (DC Output HIGH) ≥2000V ESD (Note 2) VEE −5.7V to −4.2V VTTL +4.5V to +5.5V Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating. The “Recommended Operating Conditions” table will define the conditions for actual device operation. −0.5V to +7.0V TTL Input Voltage 0°C to +85°C Case Temperature (TC) 0°C to +85°C Case Temperature under Bias (TC) Note 2: ESD testing conforms to MIL-STD-883, Method 3015. DC Electrical Characteristics (Note 3) VEE = −4.2V to −5.7V; VCC = VCCA = GND, VTTL = +4.5V to +5.5V, TC = 0°C to +85°C Symbol VOH Parameter Min Output HIGH Voltage Typ Max 2.5 V 2.0 VOL Output LOW Voltage VIH Input HIGH Voltage 0.55 0.50 ECL Inputs OE TTL VIL Input LOW Voltage IBVI Input Breakdown Current IIH ECL Input HIGH Current IIL Units −1165 −870 2.0 V Conditions IOH = −1 mA VIH (Max) IOL = 64 mA VIN = VIL (Min) or IOL = 24 mA VIH (Max) mV Guaranteed HIGH Signal for All Inputs V −1475 mV OE TTL 0.8 V 10 µA VBI = 7.0V ECL Inputs 240 OE ECL 350 µA VIN = VIH (Max) µA VIN = 2.7V µA VIN = VIL (Min) −50 µA VIN = 0.5V 250 µA ECL Inputs TTL Input HIGH Current OE TTL ECL Input LOW Current ECL Inputs TTL Input LOW Current OE TTL VIN = VIL (Min) or IOH = −15 mA −1830 5.0 0.5 Guaranteed LOW Signal for All Inputs ICEX Output HIGH Leakage Current IOS Output Short-Circuit Current −225 mA VOUT = 0.0V, VTTL = +5.5V IOZH 3-STATE Current Output HIGH +50 µA VOUT = +2.7V IOZL 3-STATE Current Output LOW −50 µA VOUT = 0.5V VFCD Input Clamp Diode Voltage −1.2 V IIN = −18 mA Inputs OPEN −100 IEE VEE Power Supply Current −18 mA ICCH VTTL Power Supply Current HIGH −39 29 mA ICCL VTTL Power Supply Current LOW 65 mA ICCZ VTTL Power Supply Current 49 mA 3-STATE Note 3: The specified limits represent the “worst case” value for the parameter. Since these “worst case” values normally occur at the temperature extremes, additional noise immunity and guard banding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to guarantee operation under “worst case” conditions. 3 www.fairchildsemi.com 100393 Absolute Maximum Ratings(Note 1) 100393 AC Electrical Characteristics VEE = −4.2V to −5.7V, VCC = GND, VTTL = +4.5V to +5.5V Symbol Parameter TC = 0°C TC = +25°C TC = +85°C Units Conditions Min Max Min Max Min Max 2.3 4.8 2.3 4.8 2.3 5.3 ns Figures 1, 2 2.3 5.6 2.3 5.6 2.3 6.4 ns Figures 1, 2 ns Figure 3 ns Figure 3 ns Figure 4 ns Figure 4 tPLH Propagation Delay tPHL Data to Output tPLH Propagation Delay tPHL LE to Output tPZH Output Enable Time 2.0 5.5 2.0 5.5 2.0 5.5 tPZL OE TTL ↓ to QN 3.5 8.0 3.5 8.0 3.5 8.0 tPHZ Output Disable Time 2.0 6.0 2.0 6.0 2.0 6.0 tPLZ OE TTL ↑ to QN 2.0 5.5 2.0 5.0 2.0 5.0 tPZH Output Enable Time 2.4 5.6 2.4 5.6 2.4 5.6 tPZL OE ECL ↑ to QN 3.2 8.5 3.2 8.5 3.2 8.5 tPHZ Output Disable Time 2.4 6.0 2.4 6.0 2.4 6.0 tPLZ OE ECL ↓ to QN 3.2 7.6 3.2 7.6 3.2 7.6 tS Setup Time, DN to LE 0.7 0.7 0.7 ns Figures 1, 2 tH Hold Time, DN to LE 1.3 1.3 1.3 ns Figures 1, 2 tPW (L) Pulse Width LOW, LE 2.0 2.0 2.0 ns Figures 1Figure 2 Test Circuit Switch Positions for Parameter Testing Parameter S-Position tPLH, tPHL Open tPHZ, tPZH Open tPLZ, tPZL Open FIGURE 1. AC Test Setup www.fairchildsemi.com 4 100393 Switching Waveforms FIGURE 2. Propagation Delays, Setup and Hold Times, and Pulse Width FIGURE 3. Enable and Disable Waveforms, OE TTL FIGURE 4. Enable and Disable Waveforms, OE ECL 5 www.fairchildsemi.com 100393 Low Power 9-Bit ECL-to-TTL Translator with Latches Physical Dimensions inches (millimeters) unless otherwise noted 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square Package Number V28A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com www.fairchildsemi.com 6