PHILIPS 74LVC1G66GW

INTEGRATED CIRCUITS
DATA SHEET
74LVC1G66
Bilateral switch
Product specification
File under Integrated Circuits, IC24
2001 Oct 30
Philips Semiconductors
Product specification
Bilateral switch
74LVC1G66
FEATURES
DESCRIPTION
• Very low ON resistance:
The 74LVC1G66 is a high-speed Si-gate CMOS device.
– 10 Ω (typical) at VCC = 2.7 V
The 74LVC1G66 provides an analog switch. The switch
has two input/output pins (Y and Z) and an active HIGH
enable input pin (E). When pin E is LOW, the analog
switch is turned off.
– 8 Ω (typical) at VCC = 3.3 V
– 6 Ω (typical) at VCC = 5 V.
• ESD protection:
– HBM EIA/JESD22-A114-A exceeds 2000 V
– MM EIA/JESD22-A115-A exceeds 200 V.
• High noise immunity
• CMOS low power consumption
• Latch up performance exceeds 250 mA
• SOT353 package
• Direct interface TTL-levels.
QUICK REFERENCE DATA
Ground = 0 V; Tamb = 25 °C; tr = tf ≤ 3.0 ns.
SYMBOL
tPZH/tPZL
PARAMETER
turn-on time E to Vos
tPHZ/tPLZ
turn-off time E to Vos
CI
input capacitance
CPD
power dissipation capacitance
CS
switch capacitance
CONDITIONS
UNIT
CL = 50 pF; RL = 500 Ω; VCC = 3 V
2.6
ns
CL = 50 pF; RL = 500 Ω; VCC = 5 V
1.9
ns
CL = 50 pF; RL = 500 Ω; VCC = 3 V
3.4
ns
CL = 50 pF; RL = 500 Ω; VCC = 5 V
2.5
ns
2
pF
16
pF
CL = 50 pF; f = 10 MHz;
VCC = 3.3 V; notes 1 and 2
OFF-state
5
pF
ON-state
9.5
pF
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi + (CL + CS) × VCC2 × fo where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
CS = max. switch capacitance in pF;
VCC = supply voltage in Volts.
2. The condition is VI = GND to VCC.
2001 Oct 30
TYPICAL
2
Philips Semiconductors
Product specification
Bilateral switch
74LVC1G66
FUNCTION TABLE
See note 1.
INPUT E
SWITCH
L
OFF
H
ON
Note
1. H = HIGH voltage level;
L = LOW voltage level.
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
TEMPERATURE
RANGE
PINS
PACKAGE
MATERIAL
CODE
MARKING
−40 to +85 °C
5
SC-88A
plastic
SOT353
VL
74LVC1G66GW
PINNING
PIN
SYMBOL
DESCRIPTION
1
Y
independent input/output
2
Z
independent output/input
3
GND
ground (0 V)
4
E
enable input (active HIGH)
5
VCC
supply voltage
handbook, halfpage
handbook, halfpage
Y 1
Z 2
GND
5 VCC
Y
66
3
4
Z
E
E
MNA074
MNA657
Fig.1 Pin configuration.
2001 Oct 30
Fig.2 Logic symbol.
3
Philips Semiconductors
Product specification
Bilateral switch
74LVC1G66
handbook, halfpage
Z
handbook, halfpage
1
4 #
1
1
2
Y
X1
MNA076
E
VCC
Fig.3 IEC logic symbol.
MNA658
Fig.4 Logic diagram.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VCC
supply voltage
1.65
5.5
V
VI
input voltage
0
5.5
V
VS
switch voltage
0
VCC
V
Tamb
operating ambient temperature
tr,tf
input rise and fall times
2001 Oct 30
−40
+85
°C
VCC = 1.65 to 2.7 V
0
20
ns/V
VCC = 2.7 to 5.5 V
0
10
ns/V
4
Philips Semiconductors
Product specification
Bilateral switch
74LVC1G66
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V);
see note 1.
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
−0.5
+6.5
V
−
−50
mA
VCC
supply voltage
IIK
input diode current
ISK
switch diode current
VS < −0.5 or VS > VCC + 0.5 V
−
±50
mA
IS
switch source or sink current
−0.5 V < VO < VCC + 0.5 V
−
±50
mA
ICC
VCC or GND current
−
±100
mA
Tstg
storage temperature
−65
+150
°C
PD
power dissipation per package for temperature range from −40 to +85 °C;
note 2
−
200
mW
VI < −0.5 or VI > VCC + 0.5 V
Notes
1. To avoid drawing VCC current out of pin Z, when switch current flows into pin Y, the voltage drop across the
bidirectional switch must not exceed 0.4 V. If the switch current flows into pin Z, no VCC current will flow out of pin Y.
In this case there is no limit for the voltage drop across the switch, but the voltage at pins Y and Z may not exceed
VCC or GND.
2. Above 55 °C the value of PD derates linearly with 2.5 mW/K.
2001 Oct 30
5
Philips Semiconductors
Product specification
Bilateral switch
74LVC1G66
DC CHARACTERISTICS
With regard to recommended operating conditions; voltages are referenced to GND (ground = 0 V).
TEST CONDITIONS
SYMBOL
VIL
−40 to +85
PARAMETER
VCC (V)
OTHER
VIH
Tamb (°C)
HIGH-level input voltage
LOW-level input voltage
MIN.
TYP.(1)
UNIT
MAX.
1.65 to 1.95
0.65 × VCC −
−
V
2.3 to 2.7
1.7
−
−
V
2.7 to 3.6
2.0
−
−
V
4.5 to 5.5
0.7 × VCC
−
−
V
1.65 to 1.95 −
−
0.35 × VCC V
2.3 to 2.7
−
−
0.7
V
2.7 to 3.6
−
−
0.8
V
4.5 to 5.5
−
−
0.30 × VCC V
II
input leakage current
(control pin)
VI = 5.5 V or GND
5.5
−
±0.1
±5
µA
IS
analog switch OFF-state
current
VI = VIH or VIL;
|VS| = VCC − GND;
see Fig.6
5.5
−
±0.1
±5
µA
IS
analog switch ON-state
current
VI = VIH or VIL;
|VS| = VCC − GND;
see Fig.7
5.5
−
±0.1
±5
µA
ICC
quiescent supply current
VI = VCC or GND;
VS = GND or VCC;
IO = 0 A
5.5
−
0.1
10
µA
∆ICC
additional quiescent
VI = VCC − 0.6 V;
supply current per control VS = GND or VCC;
IO = 0 A
pin
5.5
−
5
500
µA
Note
1. All typical values are at Tamb = 25 °C.
2001 Oct 30
6
Philips Semiconductors
Product specification
Bilateral switch
74LVC1G66
Type 74LVC1G66
Tamb (°C)
TEST CONDITIONS
SYMBOL
PARAMETER
IS
(mA)
OTHER
RON
ON-resistance (peak)
ON-resistance (rail)
ON-resistance (rail)
ON-resistance
(flatness)
VS = GND to VCC;
VI = VIH; see Fig.5
VS = GND; VI = VIH;
see Fig.5
VS = VCC; VI = VIH;
see Fig.5
VS = GND to VCC;
VI = VIH;
see Figs 9 to 12
MIN.
UNIT
TYP.(1)
MAX.
1.65 − 1.95
−
35
100
Ω
8
2.3 − 2.7
−
14
30
Ω
12
2.7
−
11.5
25
Ω
24
3.0 − 3.6
−
8.5
20
Ω
32
4.5 − 5.5
−
6.5
15
Ω
4
1.65 − 1.95
−
10
30
Ω
8
2.3 − 2.7
−
8.5
20
Ω
12
2.7
−
7.5
18
Ω
24
3.0 − 3.6
−
6.5
15
Ω
32
4.5 − 5.5
−
6
10
Ω
4
1.65 − 1.95
−
12
30
Ω
8
2.3 − 2.7
−
8.5
20
Ω
12
2.7
−
7.5
18
Ω
24
3.0 − 3.6
−
6.5
15
Ω
32
4.5 − 5.5
−
6
10
Ω
1.8
−
100(2)
−
Ω
8
2.5
−
17(2)
−
Ω
12
2.7
−
10(2)
−
Ω
3.3
−
5(2)
−
Ω
5.0
−
3(2)
−
Ω
4
32
Notes
1. All typical values are measured at Tamb = 25 °C.
2. RON flatness over operating temperature range (−40 to +85 °C).
7
−40 to +85
4
24
2001 Oct 30
VCC (V)
Philips Semiconductors
Product specification
Bilateral switch
74LVC1G66
E
VIL
E
VIH
V
Y
Y
Z
Z
VS = GND to VCC
A
A
VI = VCC or GND
VO = GND or VCC
IS
GND
GND
MNA659
GND
MNA660
Fig.5
Test circuit for measuring ON-resistance
(RON).
Fig.6 Test circuit for circuit OFF-state current.
MNA673
102
handbook, halfpage
VIH
RON
(Ω)
E
Y
VCC = 1.8 V
Z
2.5 V
2.7 V
10
A
A
3.3 V
VI = VCC or GND
VO (open circuit)
5.0 V
GND
MNA661
1
Fig.8
Fig.7 Test circuit for measuring ON-state current.
2001 Oct 30
8
0
1
2
3
4
VI (V)
5
Typical ON-resistance (RON) as a function
of input voltage (VS) for VS = GND to VCC.
Philips Semiconductors
Product specification
Bilateral switch
74LVC1G66
MNA663
15
RON
RON
Tamb = +85 °C
+25 °C
−40 °C
(Ω)
10
(Ω)
Tamb = +85 °C
+25 °C
−40 °C
10
5
5
0
MNA664
15
handbook, halfpage
handbook, halfpage
0
1
2
Vl (V)
0
3
0
Fig.9 RON for VCC = 2.5 V.
1
2
Vl (V)
3
Fig.10 RON for VCC = 2.7 V.
MNA665
10
MNA666
8
handbook, halfpage
handbook, halfpage
RON
RON
(Ω)
(Ω)
Tamb =
8
7
+85 °C
6
Tamb = +85 °C
+25 °C
6
5
−40 °C
+25 °C
4
4
2
−40 °C
3
2
0
0
1
2
3
Vl (V)
0
4
Fig.11 RON for VCC = 3.3 V.
2001 Oct 30
1
2
3
4
VI (V)
Fig.12 RON for VCC = 5.0 V.
9
5
Philips Semiconductors
Product specification
Bilateral switch
74LVC1G66
AC CHARACTERISTICS
GND = 0 V; tr = tf ≤ 2.0 ns; CL = 30 pF; RL = 1 kΩ; VCC = 1.65 to 1.95 V;
GND = 0 V; tr = tf ≤ 2.0 ns; CL = 30 pF; RL = 500 Ω; VCC = 2.3 to 2.7 V;
GND = 0 V; tr = tf ≤ 2.5 ns; CL = 50 pF; RL = 500 Ω; VCC ≥ 2.7 V.
TEST CONDITIONS
SYMBOL
tPZH/tPZL
tPHZ/tPLZ
propagation delay
inA; inB to outY
turn-ON time E to VOS
turn-OFF time E to VOS
see Figs 13 and 15
see Figs 14 and 15
see Figs 14 and 15
Note
1. All typical values are measured at Tamb = 25 °C.
2001 Oct 30
−40 to +85
PARAMETER
WAVEFORMS
tPHL/tPLH
Tamb (°C)
10
VCC (V)
MIN.
TYP.(1)
UNIT
MAX.
1.65 to 1.95
−
0.8
2
ns
2.3 to 2.7
−
0.4
1.2
ns
2.7
−
0.4
1
ns
3.0 to 3.6
−
0.3
0.8
ns
4.5 to 5.5
−
0.2
0.6
ns
1.65 to 1.95
1
5.3
12
ns
2.3 to 2.7
1
3.0
6.5
ns
2.7
1
2.6
6
ns
3.0 to 3.6
1
2.5
5
ns
4.5 to 5.5
1
1.9
4.2
ns
1.65 to 1.95
1
4.2
10
ns
2.3 to 2.7
1
2.4
6.9
ns
2.7
1
3.6
7.5
ns
3.0 to 3.6
1
3.4
6.5
ns
4.5 to 5.5
1
2.5
5
ns
Philips Semiconductors
Product specification
Bilateral switch
74LVC1G66
AC WAVEFORMS
handbook, halfpage VI
VM
Y or Z
GND
t PHL
t PLH
VOH
VM
Z or Y
VOL
MNA667
INPUT
VCC
VM
VI
tr = tf
0.5 × VCC
VCC
≤ 2.0 ns
2.3 to 2.7 V
0.5 × VCC
VCC
≤ 2.0 ns
2.7; V
1.5 V
2.7 V
≤ 2.5 ns
3.0 to 3.6 V
1.5 V
2.7 V
≤ 2.5 ns
4.5 to 5.5 V
0.5 × VCC
VCC
≤ 2.5 ns
1.65 to 1.95 V
VOL and VOH are typical output voltage drop that occur with the output load.
Fig.13 The input (VS) to output (VO) propagation delays.
2001 Oct 30
11
Philips Semiconductors
Product specification
Bilateral switch
74LVC1G66
VI
handbook, full pagewidth
E
VM
GND
t PLZ
t PZL
VCC
output
LOW-to-OFF
OFF-to-LOW
Y or Z
VM
VX
VOL
t PZH
t PHZ
Y or Z
output
HIGH-to-OFF
OFF-to-HIGH
VOH
VY
VM
GND
switch
enabled
switch
disabled
switch
enabled
MNA668
INPUT
VCC
VM
VI
tr = tf
1.65 to 1.95 V
0.5 × VCC
VCC
≤ 2.0 ns
2.3 to 2.7 V
0.5 × VCC
VCC
≤ 2.0 ns
2.7 V
1.5 V
2.7 V
≤ 2.5 ns
3.0 to 3.6 V
1.5 V
2.7 V
≤ 2.5 ns
VX = VOL + 0.3 V at VCC ≥ 2.7 V;
VX = VOL + 0.1 x VCC at VCC < 2.7 V;
VY = VOH − 0.3 V at VCC ≥ 2.7 V;
VY = VOH − 0.1 x VCC at VCC < 2.7 V.
4.5 to 5.5 V
0.5 × VCC
VCC
≤ 2.5 ns
VOL and VOH are typical output voltage drop that occur with the output load.
Fig.14 The turn-on and turn-off times.
2001 Oct 30
12
Philips Semiconductors
Product specification
Bilateral switch
74LVC1G66
VEXT
handbook, full pagewidth
VCC
PULSE
GENERATOR
VI
RL
VO
D.U.T.
CL
RT
RL
MNA616
VEXT
VCC
VI
CL
RL
tPLH/tPHL
tPZH/tPHZ
tPZL/tPLZ
1.65 to 1.95 V
VCC
30 pF
1 kΩ
open
GND
2 × VCC
2.3 to 2.7 V
VCC
30 pF
500 Ω
open
GND
2 × VCC
2.7 V
2.7 V
50 pF
500 Ω
open
GND
6V
3.0 to 3.6 V
2.7 V
50 pF
500 Ω
open
GND
6V
4.5 to 5.5 V
VCC
50 pF
500 Ω
open
GND
2 × VCC
RL = Load resistor.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
Fig.15 Load circuitry for switching times.
2001 Oct 30
13
Philips Semiconductors
Product specification
Bilateral switch
74LVC1G66
ADDITIONAL AC CHARACTERISTICS FOR THE 74LVC1G66
Recommended conditions and all typical values are measured at Tamb = 25 °C.
SYMBOL
PARAMETER
sine-wave distortion
TEST CONDITIONS
RL = 10 kΩ; CL = 50 pF;
fin = 1 kHz; see Fig.17
RL = 10 kΩ; CL = 50 pF;
fin = 10 kHz; see Fig.17
switch ON signal frequency
response
RL = 600 Ω; CL = 50 pF;
fin = 1 MHz; see Fig.16;
note 1
RL = 50 Ω; CL = 5 pF;
fin = 1 MHz; see Fig.16;
note 1
switch OFF signal
feed-through attenuation
RL = 600 Ω; CL = 50 pF;
fin = 1 MHz; see Fig.18;
note 2
RL = 0 Ω; CL = 50 pF;
fin = 1 MHz; see Fig.18;
note 2
crosstalk (control input to
signal output)
minimum frequency response
(−3 dB)
2001 Oct 30
RL = 600 Ω; CL = 50 pF;
fin = 1 MHz; tr = tf = 2 ns;
see Fig.19
RL = 50 Ω; CL = 10 pF;
see Fig.16; note 1
14
VCC (V)
TYPICAL
UNIT
1.65
0.032
%
2.3
0.008
%
3
0.006
%
4.5
0.001
%
1.65
0.068
%
2.3
0.009
%
3
0.008
%
4.5
0.006
%
1.65
135
MHz
2.3
145
MHz
3
150
MHz
4.5
155
MHz
1.65
>500
MHz
2.3
>500
MHz
3
>500
MHz
4.5
>500
MHz
1.65
−46
dB
2.3
−46
dB
3
−46
dB
4.5
−46
dB
1.65
−37
dB
2.3
−37
dB
3
−37
dB
4.5
−37
dB
1.65
69
mV
2.3
87
mV
3
156
mV
4.5
302
mV
1.65
200
MHz
2.3
350
MHz
3
410
MHz
4.5
440
MHz
Philips Semiconductors
Product specification
Bilateral switch
SYMBOL
CPD
Q
74LVC1G66
PARAMETER
TEST CONDITIONS
power dissipation capacitance
charge injection
CL = 50 pF; fin = 10 MHz
VCC (V)
TYPICAL
2.5
13.7
pF
3.3
15.2
pF
5.0
18.3
pF
0.05
pC
CL = 0.1 nF; Vgen = 0 V;
1.65 to 5.5
Rgen = 0 Ω; f = 1 Mhz;
RL = 1 MΩ; see Fig.20; note 3
Notes
1. Adjust fin voltage to obtain 0 dBm level at output. Increase fin frequency until dB meter reads −3 dB.
2. Adjust fin voltage to obtain 0 dBm level at input.
3. Guaranteed by design.
handbook, full pagewidth
VIH
E
0.1 µF
fin
Y/Z
Z/Y
50 Ω
VO
RL
channel
ON
1/2VCC
CL dB
MNA669
Fig.16 Test circuit for measuring the frequency response when switch is ON.
2001 Oct 30
15
UNIT
Philips Semiconductors
Product specification
Bilateral switch
74LVC1G66
E
handbook, full pagewidth
VIH
Y/Z
600 Ω
fin
10 µF
Z/Y
VO
CL
RL
channel
ON
DISTORTION
METER
1/2VCC
MNA670
VCC
VI
1.65 V
1.4 Vp-p
2.3 V
2 Vp-p
3V
2.5 Vp-p
4V
4 Vp-p
Fig.17 Test circuit for measuring sine-wave distortion.
handbook, full pagewidth
VIL
E
0.1 µF
fin
50 Ω
Y/Z
Z/Y
RL
1/2VCC
VO
RL
channel
ON
CL dB
1/2VCC
MNA671
Fig.18 Test circuit for measuring feed-through when switch is OFF.
2001 Oct 30
16
Philips Semiconductors
Product specification
Bilateral switch
74LVC1G66
E
handbook, full pagewidth
Y/Z
Z/Y
VO
RL
600 Ω
Rin
600 Ω
50 Ω
CL
50 pF
1/2VCC
1/2VCC
MNA672
Fig.19 Crosstalk.
E
handbook, full pagewidth
Rgen
Y/Z
logic
input
Z/Y
Vgen
RL
VO
1
MΩ
CL
MNA674
handbook, full pagewidth
logic
input (E)
off
on
off
∆Vout
VO
MNA675
Q = (∆ Vout) . (CL)
Fig.20 Charge injection test.
2001 Oct 30
17
0.1
nF
Philips Semiconductors
Product specification
Bilateral switch
74LVC1G66
PACKAGE OUTLINE
Plastic surface mounted package; 5 leads
SOT353
D
E
B
y
X
A
HE
5
v M A
4
Q
A
A1
1
2
e1
3
bp
c
Lp
w M B
e
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
max
bp
c
D
E (2)
e
e1
HE
Lp
Q
v
w
y
mm
1.1
0.8
0.1
0.30
0.20
0.25
0.10
2.2
1.8
1.35
1.15
1.3
0.65
2.2
2.0
0.45
0.15
0.25
0.15
0.2
0.2
0.1
OUTLINE
VERSION
SOT353
2001 Oct 30
REFERENCES
IEC
JEDEC
EIAJ
SC-88A
18
EUROPEAN
PROJECTION
ISSUE DATE
97-02-28
Philips Semiconductors
Product specification
Bilateral switch
74LVC1G66
SOLDERING
If wave soldering is used the following conditions must be
observed for optimal results:
Introduction to soldering surface mount packages
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering can still be used for
certain surface mount ICs, but it is not suitable for fine pitch
SMDs. In these situations reflow soldering is
recommended.
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
Reflow soldering
The footprint must incorporate solder thieves at the
downstream end.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
Several methods exist for reflowing; for example,
convection or convection/infrared heating in a conveyor
type oven. Throughput times (preheating, soldering and
cooling) vary between 100 and 200 seconds depending
on heating method.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 220 °C for
thick/large packages, and below 235 °C for small/thin
packages.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Manual soldering
Wave soldering
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
To overcome these problems the double-wave soldering
method was specifically developed.
2001 Oct 30
19
Philips Semiconductors
Product specification
Bilateral switch
74LVC1G66
Suitability of surface mount IC packages for wave and reflow soldering methods
SOLDERING METHOD
PACKAGE
WAVE
BGA, LFBGA, SQFP, TFBGA
not suitable
suitable(2)
HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS
not
PLCC(3), SO, SOJ
suitable
LQFP, QFP, TQFP
SSOP, TSSOP, VSO
REFLOW(1)
suitable
suitable
suitable
not
recommended(3)(4)
suitable
not
recommended(5)
suitable
Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.
2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
2001 Oct 30
20
Philips Semiconductors
Product specification
Bilateral switch
74LVC1G66
DATA SHEET STATUS
DATA SHEET STATUS(1)
PRODUCT
STATUS(2)
DEFINITIONS
Objective data
Development
This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
Preliminary data
Qualification
This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
Product data
Production
This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Changes will be
communicated according to the Customer Product/Process Change
Notification (CPCN) procedure SNW-SQ-650A.
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
DEFINITIONS
DISCLAIMERS
Short-form specification  The data in a short-form
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
Life support applications  These products are not
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition  Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Right to make changes  Philips Semiconductors
reserves the right to make changes, without notice, in the
products, including circuits, standard cells, and/or
software, described or contained herein in order to
improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for
the use of any of these products, conveys no licence or title
under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that
these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified.
Application information  Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.
2001 Oct 30
21
Philips Semiconductors
Product specification
Bilateral switch
74LVC1G66
NOTES
2001 Oct 30
22
Philips Semiconductors
Product specification
Bilateral switch
74LVC1G66
NOTES
2001 Oct 30
23
Philips Semiconductors – a worldwide company
Contact information
For additional information please visit http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
For sales offices addresses send e-mail to: [email protected].
SCA73
© Koninklijke Philips Electronics N.V. 2001
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
613508/01/pp24
Date of release: 2001
Oct 30
Document order number:
9397 750 08977