NTMS10P02R2 Power MOSFET −10 Amps, −20 Volts P−Channel Enhancement−Mode Single SOIC−8 Package Features • • • • • • • • http://onsemi.com Ultra Low RDS(on) Higher Efficiency Extending Battery Life Logic Level Gate Drive Miniature SOIC−8 Surface Mount Package Diode Exhibits High Speed, Soft Recovery Avalanche Energy Specified SOIC−8 Mounting Information Provided Pb−Free Package is Available −10 AMPERES −20 VOLTS 14 mW @ VGS = −4.5 V P−Channel D Applications • Power Management in Portable and Battery−Powered Products, G i.e.: Cellular and Cordless Telephones and PCMCIA Cards S MAXIMUM RATINGS Rating Symbol Value Unit Drain−to−Source Voltage VDSS −20 Vdc Gate−to−Source Voltage − Continuous VGS "12 Vdc RqJA PD ID ID PD ID IDM 50 2.5 −10 −8.0 0.6 −5.5 −50 °C/W W A A W A A Thermal Resistance − Junction−to−Ambient (Note 2) Total Power Dissipation @ TA = 25°C Continuous Drain Current @ 25°C Continuous Drain Current @ 70°C Maximum Operating Power Dissipation Maximum Operating Drain Current Pulsed Drain Current (Note 3) RqJA PD ID ID PD ID IDM 80 1.6 −8.8 −6.4 0.4 −4.5 −44 °C/W W A A W A A TJ, Tstg −55 to +150 °C EAS 500 mJ Single Pulse Drain−to−Source Avalanche Energy − Starting TJ = 25°C (VDD = −20 Vdc, VGS = −4.5 Vdc, Peak IL = 5.0 Apk, L = 40 mH, RG = 25 W) Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds TL 260 °C March, 2006 − Rev. 3 1 D D D 8 1 SOIC−8 CASE 751 STYLE 12 E10P02 AYWW G G 1 S S S G E10P02 = Specific Device Code A = Assembly Location Y = Year WW = Work Week G = Pb−Free Package (Note: Microdot may be in either location) ORDERING INFORMATION Device NTMS10P02R2 Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Mounted onto a 2″ square FR−4 Board (1 in sq, Cu 0.06″ thick single sided), t = 10 seconds. 2. Mounted onto a 2″ square FR−4 Board (1 in sq, Cu 0.06″ thick single sided), t = steady state. 3. Pulse Test: Pulse Width < 300 ms, Duty Cycle < 2%. © Semiconductor Components Industries, LLC, 2006 D 8 Thermal Resistance − Junction−to−Ambient (Note 1) Total Power Dissipation @ TA = 25°C Continuous Drain Current @ 25°C Continuous Drain Current @ 70°C Maximum Operating Power Dissipation Maximum Operating Drain Current Pulsed Drain Current (Note 3) Operating and Storage Temperature Range MARKING DIAGRAM & PIN ASSIGNMENT NTMS10P02R2G Package Shipping† SOIC−8 2500/Tape & Reel SOIC−8 (Pb−Free) 2500/Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. Publication Order Number: NTMS10P02R2/D NTMS10P02R2 ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted) (Note 4) Characteristic Symbol Min Typ Max Unit −20 − − −12.1 − − − − − − −1.0 −5.0 − − −100 − − 100 −0.6 − −0.88 2.8 −1.20 − − − 0.012 0.017 0.014 0.020 gFS − 30 − Mhos Ciss − 3100 3640 pF Coss − 1100 1670 Crss − 475 1010 td(on) − 25 35 tr − 40 65 td(off) − 110 190 tf − 110 190 td(on) − 25 − tr − 100 − td(off) − 100 − tf − 125 − Qtot − 48 70 Qgs − 6.5 − Qgd − 17 − OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage (VGS = 0 Vdc, ID = −250 mAdc) Temperature Coefficient (Positive) V(BR)DSS Zero Gate Voltage Drain Current (VDS = −20 Vdc, VGS = 0 Vdc, TJ = 25°C) (VDS = −20 Vdc, VGS = 0 Vdc, TJ = 70°C) IDSS Gate−Body Leakage Current (VGS = −12 Vdc, VDS = 0 Vdc) IGSS Gate−Body Leakage Current (VGS = +12 Vdc, VDS = 0 Vdc) IGSS Vdc mV/°C mAdc nAdc nAdc ON CHARACTERISTICS Gate Threshold Voltage (VDS = VGS, ID = −250 mAdc) Temperature Coefficient (Negative) VGS(th) Static Drain−to−Source On−State Resistance (VGS = −4.5 Vdc, ID = −10 Adc) (VGS = −2.5 Vdc, ID = −8.8 Adc) RDS(on) Forward Transconductance (VDS = −10 Vdc, ID = −10 Adc) Vdc mV/°C W DYNAMIC CHARACTERISTICS Input Capacitance (VDS = −16 Vdc, VGS = 0 Vdc, f = 1.0 MHz) Output Capacitance Reverse Transfer Capacitance SWITCHING CHARACTERISTICS (Notes 5 & 6) Turn−On Delay Time (VDD = −10 Vdc, ID = −1.0 Adc, VGS = −4.5 Vdc, RG = 6.0 W) Rise Time Turn−Off Delay Time Fall Time Turn−On Delay Time (VDD = −10 Vdc, ID = −10 Adc, VGS = −4.5 Vdc, RG = 6.0 W) Rise Time Turn−Off Delay Time Fall Time Total Gate Charge (VDS = −10 Vdc, VGS = −4.5 Vdc, ID = −10 Adc) Gate−Source Charge Gate−Drain Charge ns ns nC BODY−DRAIN DIODE RATINGS (Note 5) Diode Forward On−Voltage (IS = −2.1 Adc, VGS = 0 Vdc) (IS = −2.1 Adc, VGS = 0 Vdc, TJ = 125°C) VSD − − −0.72 −0.60 −1.2 − Vdc Diode Forward On−Voltage (IS = −10 Adc, VGS = 0 Vdc) (IS = −10 Adc, VGS = 0 Vdc, TJ = 125°C) VSD − − −0.90 −0.75 − − Vdc trr − 65 100 ns ta − 25 − tb − 40 − QRR − 0.075 − Reverse Recovery Time (IS = −2.1 Adc, VGS = 0 Vdc, dIS/dt = 100 A/ms) Reverse Recovery Stored Charge 4. Handling precautions to protect against electrostatic discharge is mandatory. 5. Indicates Pulse Test: Pulse Width = 300 ms max, Duty Cycle = 2%. 6. Switching characteristics are independent of operating junction temperature. http://onsemi.com 2 mC NTMS10P02R2 −2.3 V 15 −10 V −3.1 V 10 −2.1 V VDS ≥ −10 V −I D , DRAIN CURRENT (AMPS) −I D , DRAIN CURRENT (AMPS) 20 TJ = 25°C −1.9 V 10 VGS = −1.7 V 5.0 0 0 0.25 0.50 0.75 1.00 1.25 1.50 1.75 −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) 8.0 6.0 100°C 2.0 0 2.00 25°C 4.0 0 0.5 1.0 1.5 2.0 2.5 −VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) 0.100 ID = −10 A TJ = 25°C 0.075 0.050 0.025 0 2.0 4.0 6.0 8.0 −VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) 10 R DS(on), DRAIN−TO−SOURCE RESISTANCE (OHMS) Figure 2. Transfer Characteristics 0.020 VGS = −2.5 V TJ = 25°C 0.016 VGS = −4.5 V 0.012 0.008 6.0 Figure 3. On−Resistance versus Gate−To−Source Voltage 10 14 −ID, DRAIN CURRENT (AMPS) 18 Figure 4. On-Resistance versus Drain Current and Gate Voltage 1.6 10,000 VGS = 0 V ID = −10 A VGS = −4.5 V 1.4 −I DSS , LEAKAGE (nA) R DS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) R DS(on), DRAIN−TO−SOURCE RESISTANCE (OHMS) Figure 1. On−Region Characteristics 0 TJ = −55°C 1.2 1.0 TJ = 125°C 1000 TJ = 100°C 100 0.8 0.6 −50 −25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (°C) 10 150 2.0 Figure 5. On−Resistance Variation with Temperature 6.0 10 14 18 −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 6. Drain−To−Source Leakage Current versus Voltage http://onsemi.com 3 NTMS10P02R2 C, CAPACITANCE (pF) 10,000 VGS = 0 V 8000 VDS = 0 V TJ = 25°C Ciss 6000 Crss 4000 Ciss 2000 0 Coss Crss 10 5.0 0 5.0 −VGS −VDS 10 15 20 GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS) 5.0 10 QT 4.0 8.0 VGS VDS 3.0 6.0 Q1 Q2 4.0 2.0 1.0 0 ID = −10 A TJ = 25°C Q3 0 10 20 40 30 2.0 50 Qg, TOTAL GATE CHARGE (nC) Figure 8. Gate−To−Source and Drain−To−Source Voltage versus Total Charge 1000 1000 td(off) VDD = −10 V ID = −10 A VGS = −4.5 V tf t, TIME (ns) t, TIME (ns) VDD = −10 V ID = −1.0 A VGS = −4.5 V tr 100 td(on) 10 0 −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) −VGS , GATE−TO−SOURCE VOLTAGE (VOLTS) Figure 7. Capacitance Variation 1.0 10 tr tf 100 td(on) 10 100 td(off) 1.0 10 100 RG, GATE RESISTANCE (OHMS) RG, GATE RESISTANCE (OHMS) Figure 9. Resistive Switching Time Variation versus Gate Resistance Figure 10. Resistive Switching Time Variation versus Gate Resistance http://onsemi.com 4 NTMS10P02R2 DRAIN−TO−SOURCE DIODE CHARACTERISTICS 2.0 VGS = 0 V TJ = 25°C −ID , DRAIN CURRENT (AMPS) −IS, SOURCE CURRENT (AMPS) 100 1.6 1.2 0.8 0.4 0 0.50 0.55 0.60 1.0 ms 10 10 ms VGS = 2.5 V SINGLE PULSE TC = 25°C 1.0 0.1 0.70 0.65 100 ms RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT dc 1.0 0.1 10 100 −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) −VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS) Figure 11. Diode Forward Voltage versus Current Figure 12. Maximum Rated Forward Biased Safe Operating Area di/dt IS trr ta tb TIME 0.25 IS tp IS Figure 13. Diode Reverse Recovery Waveform TYPICAL ELECTRICAL CHARACTERISTICS Rthja(t) , EFFECTIVE TRANSIENT THERMAL RESISTANCE 10 1.0 0.1 0.01 0.001 D = 0.5 0.2 0.1 0.05 Normalized to qja at 10s. 0.02 0.01 Chip 0.0163 W 0.0652 W 0.1988 W 0.0307 F 0.1668 F 0.5541 F 0.6411 W 1.9437 F 0.9502 W 72.416 F SINGLE PULSE 1.0E−05 1.0E−04 1.0E−03 1.0E−02 1.0E−01 1.0E+00 t, TIME (s) Figure 14. Thermal Response http://onsemi.com 5 1.0E+01 1.0E+02 Ambient 1.0E+03 NTMS10P02R2 PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE AG −X− NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07. A 8 5 S B 0.25 (0.010) Y M M 1 4 −Y− K G C N DIM A B C D G H J K M N S X 45 _ SEATING PLANE −Z− H 0.10 (0.004) D 0.25 (0.010) M Z Y S X M J S INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0 _ 8 _ 0.010 0.020 0.228 0.244 STYLE 12: PIN 1. SOURCE 2. SOURCE 3. SOURCE 4. GATE 5. DRAIN 6. DRAIN 7. DRAIN 8. DRAIN SOLDERING FOOTPRINT* 1.52 0.060 7.0 0.275 MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 4.0 0.155 0.6 0.024 1.270 0.050 SCALE 6:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 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