NTTD1P02R2 Power MOSFET −1.45 Amps, −20 Volts P−Channel Enhancement Mode Dual Micro8 Package Features • • • • • • http://onsemi.com Ultra Low RDS(on) Higher Efficiency Extending Battery Life Logic Level Gate Drive Miniature Dual Micro8 Surface Mount Package Diode Exhibits High Speed, Soft Recovery Micro8 Mounting Information Provided −1.45 AMPERES −20 VOLTS 160 m @ VGS = −4.5 Applications • Power Management in Portable and Battery−Powered Products, i.e.: Dual P−Channel Computers, Printers, PCMCIA Cards, Cellular and Cordless Telephones D MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Symbol Value Unit Drain−to−Source Voltage VDSS −20 V Gate−to−Source Voltage − Continuous VGS 8.0 V G S Thermal Resistance − Junction−to−Ambient (Note 1.) Total Power Dissipation @ TA = 25°C Continuous Drain Current @ TA = 25°C Continuous Drain Current @ TA = 70°C Pulsed Drain Current (Note 3.) RθJA PD ID ID IDM 250 0.50 −1.45 −1.15 −10 °C/W W A A A Thermal Resistance − Junction−to−Ambient (Note 2.) Total Power Dissipation @ TA = 25°C Continuous Drain Current @ TA = 25°C Continuous Drain Current @ TA = 70°C Pulsed Drain Current (Note 3.) RθJA PD ID ID IDM 125 1.0 −2.04 −1.64 −16 °C/W W A A A Micro8 CASE 846A STYLE 2 TJ, Tstg −55 to +150 °C MARKING DIAGRAM & PIN ASSIGNMENT Single Pulse Drain−to−Source Avalanche Energy − Starting TJ = 25°C (VDD = −20 Vdc, VGS = −4.5 Vdc, Peak IL = −3.5 Apk, L = 5.6 mH, RG = 25 Ω) EAS 35 mJ Maximum Lead Temperature for Soldering Purposes for 10 seconds TL Operating and Storage Temperature Range 8 1 Source 1 Gate 1 Source 2 Gate 2 °C 260 1 8 2 YWW 7 3 6 BC 4 5 Drain 1 Drain 1 Drain 2 Drain 2 (Top View) 1. Minimum FR−4 or G−10 PCB, Steady State. 2. Mounted onto a 2″ square FR−4 Board (1″ sq. 2 oz Cu 0.06″ thick single sided), Steady State. 3. Pulse Test: Pulse Width = 300 s, Duty Cycle = 2%. Y = Year WW = Work Week BC = Device Code ORDERING INFORMATION Device Package Shipping† NTTD1P02R2 Micro8 4000/Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. Semiconductor Components Industries, LLC, 2003 December, 2003 − Rev. 1 1 Publication Order Number: NTTD1P02R2/D NTTD1P02R2 ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted) (Note 4.) Symbol Characteristic Min Typ Max Unit −20 − − −12 − − − − − − −1.0 −10 − − −100 − − 100 −0.7 − −0.95 2.3 −1.4 − − − − 0.130 0.175 0.190 0.160 0.250 − gFS − 2.5 − Mhos Ciss − 265 − pF Coss − 100 − Crss − 60 − td(on) − 10 − tr − 25 − td(off) − 30 − tf − 25 − td(on) − 10 − tr − 20 − td(off) − 30 − tf − 20 − Qtot − 5.0 10 Qgs − 1.5 − Qgd − 2.0 − VSD − − −0.91 −0.72 −1.1 − Vdc trr − 25 − ns ta − 13 − tb − 12 − QRR − 0.015 − OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage (VGS = 0 Vdc, ID = −250 µAdc) Temperature Coefficient (Positive) V(BR)DSS Zero Gate Voltage Drain Current (VGS = 0 Vdc, VDS = −20 Vdc, TJ = 25°C) (VGS = 0 Vdc, VDS = −20 Vdc, TJ = 125°C) IDSS Gate−Body Leakage Current (VGS = −8 Vdc, VDS = 0 Vdc) IGSS Gate−Body Leakage Current (VGS = +8 Vdc, VDS = 0 Vdc) IGSS Vdc mV/°C µAdc nAdc nAdc ON CHARACTERISTICS Gate Threshold Voltage (VDS = VGS, ID = −250 µAdc) Temperature Coefficient (Negative) VGS(th) Static Drain−to−Source On−State Resistance (VGS = −4.5 Vdc, ID = −1.45 Adc) (VGS = −2.7 Vdc, ID = −0.7 Adc) (VGS = −2.5 Vdc, ID = −0.7 Adc) RDS(on) Forward Transconductance (VDS = −10 Vdc, ID = −0.7 Adc) Vdc Ω DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance (VDS = −16 16 Vdc, Vd VGS = 0 Vdc, Vd f = 1.0 MHz) Reverse Transfer Capacitance SWITCHING CHARACTERISTICS (Notes 5. & 6.) Turn−On Delay Time Rise Time Turn−Off Delay Time (VDD = −16 16 Vdc, ID = −1.45 1.45 Adc, VGS = −4.5 Vdc, RG = 6.0 Ω) Fall Time Turn−On Delay Time Rise Time Turn−Off Delay Time (VDD = −16 16 Vdc, ID = −0.7 0.7 Adc, VGS = −4.5 Vdc, RG = 6.0 Ω) Fall Time Total Gate Charge Gate−Source Charge Gate−Drain Charge (VDS = −16 Vdc, VGS = −4.5 Vdc, ID = −1.45 1 45 Adc) Ad ) ns ns nC BODY−DRAIN DIODE RATINGS (Note 5.) Diode Forward On−Voltage (IS = −1.45 Adc, VGS = 0 Vdc) (IS = −1.45 Adc, VGS = 0 Vdc, TJ = 125°C) Reverse Recovery Time (IS = −1.45 1 45 Adc, Ad VGS = 0 Vdc, Vd dIS/dt = 100 A/µs) Reverse Recovery Stored Charge 4. Handling precautions to protect against electrostatic discharge is mandatory. 5. Indicates Pulse Test: Pulse Width = 300 µs max, Duty Cycle = 2%. 6. Switching characteristics are independent of operating junction temperature. http://onsemi.com 2 µC NTTD1P02R2 3 −2.5 V −2.3 V −ID, DRAIN CURRENT (AMPS) −ID, DRAIN CURRENT (AMPS) 3 −2.7 V −2.9 V −3.1 V −3.3 V −3.7 V −4.5 V 2 TJ = 25°C −2.1 V −8 V −1.9 V 1 −1.7 V VGS = −1.5 V 0 0.25 0.5 0.75 1 1.25 1.5 TJ = −55°C 1 1.75 TJ = 100°C TJ = 25°C 1 2 1.5 2.5 3 Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics ID = −1.45 A TJ = 25°C 0.3 0.2 0.1 0 2 4 6 8 10 12 3.5 0.3 TJ = 25°C VGS = −2.5 V 0.2 VGS = −2.7 V VGS = −4.5 V 0.1 0 0 0.5 1 1.5 2 2.5 3 3.5 −VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) −ID, DRAIN CURRENT (AMPS) Figure 3. On−Resistance versus Gate−to−Source Voltage Figure 4. On−Resistance versus Drain Current and Gate Voltage 1.6 100 VGS = 0 V ID = −1.45 A VGS = −4.5 V −IDSS, LEAKAGE (nA) 1.4 0.5 −VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) 0.4 0 0 −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) RDS(on), DRAIN−TO−SOURCE RESISTANCE () RDS(on), DRAIN−TO−SOURCE RESISTANCE () 2 0 0 RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) VDS ≥ −10 V 1.2 1 TJ = 125°C TJ = 100°C 10 0.8 0.6 −50 1 −25 0 25 75 50 100 125 TJ, JUNCTION TEMPERATURE (°C) 150 4 Figure 5. On−Resistance Variation with Temperature 8 12 16 −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 6. Drain−to−Source Leakage Current versus Voltage http://onsemi.com 3 20 VDS = 0 V Ciss VGS = 0 V C, CAPACITANCE (pF) TJ = 25°C 600 Crss 400 Ciss 200 Coss Crss 0 5 10 0 −VGS −VDS 5 10 15 20 5 20 QT 18 16 4 14 −VGS 3 Q1 12 10 Q2 8 2 6 1 ID = −1.45 A TJ = 25°C −VDS 4 2 0 0 0 1 2 3 4 5 6 Qg, TOTAL GATE CHARGE (nC) GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS) −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) 800 −VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) NTTD1P02R2 Figure 8. Gate−to−Source and Drain−to−Source Voltage versus Total Charge Figure 7. Capacitance Variation 100 −IS, SOURCE CURRENT (AMPS) t, TIME (ns) VDD = −16 V ID = −1.45 A VGS = −4.5 V tr td (off) tf 10 td (on) 1.2 0.8 0.4 0 1 10 1 100 ID , DRAIN CURRENT (AMPS) VGS = 0 V TJ = 25°C 1.6 100 0.4 0.5 0.6 0.7 0.8 1 −VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS) Figure 9. Resistive Switching Time Variation versus Gate Resistance Figure 10. Diode Forward Voltage versus Current VGS = 8 V SINGLE PULSE TC = 25°C di/dt IS 10 100 s trr 1 ms ta 1 tb TIME 10 ms 0.25 IS tp 0.1 0.01 0.9 RG, GATE RESISTANCE (OHMS) IS RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 0.1 1 dc 10 100 Figure 12. Diode Reverse Recovery Waveform VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 11. Maximum Rated Forward Biased Safe Operating Area http://onsemi.com 4 NTTD1P02R2 TYPICAL ELECTRICAL CHARACTERISTICS Rthja(t), EFFECTIVE TRANSIENT THERMAL RESISTANCE (°C/W) 1000 100 10 D = 0.5 0.2 0.1 0.05 P(pk) 0.02 0.01 t1 1 t2 DUTY CYCLE, D = t1/t2 SINGLE PULSE RθJC(t) = r(t) RθJC D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t1 TJ(pk) − TC = P(pk) RθJC(t) 0.1 1.0E−05 1.0E−04 1.0E−03 1.0E−02 1.0E−01 1.0E+00 t, TIME (s) Figure 13. Thermal Response http://onsemi.com 5 1.0E+01 1.0E+02 1.0E+03 NTTD1P02R2 PACKAGE DIMENSIONS Micro8 CASE 846A−02 ISSUE F NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. 846A−01 OBSOLETE, NEW STANDARD 846A−02. −A− −B− K PIN 1 ID G D 8 PL 0.08 (0.003) M T B S A DIM A B C D G H J K L S SEATING −T− PLANE 0.038 (0.0015) C L J H MILLIMETERS MIN MAX 2.90 3.10 2.90 3.10 −−− 1.10 0.25 0.40 0.65 BSC 0.05 0.15 0.13 0.23 4.75 5.05 0.40 0.70 INCHES MIN MAX 0.114 0.122 0.114 0.122 −−− 0.043 0.010 0.016 0.026 BSC 0.002 0.006 0.005 0.009 0.187 0.199 0.016 0.028 STYLE 2: PIN 1. 2. 3. 4. 5. 6. 7. 8. SOURCE 1 GATE 1 SOURCE 2 GATE 2 DRAIN 2 DRAIN 2 DRAIN 1 DRAIN 1 SOLDERING FOOTPRINT* 8X 1.04 0.041 0.38 0.015 3.20 0.126 6X 8X 4.24 0.167 0.65 0.0256 5.28 0.208 SCALE 8:1 mm inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. Micro8 is a trademark of International Rectifier. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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