SN74LS298 Quad 2-Input Multiplexer with Storage The SN74LS298 is a Quad 2-Port Register. It is the logical equivalent of a quad 2-input multiplexer followed by a quad 4-bit edge-triggered register. A Common Select input selects between two 4-bit input ports (data sources.) The selected data is transferred to the output register synchronous with the HIGH to LOW transition of the Clock input. The LS298 is fabricated with the Schottky barrier process for high speed and is completely compatible with all ON Semiconductor TTL families. • • • • http://onsemi.com LOW POWER SCHOTTKY Select From Two Data Sources Fully Edge-Triggered Operation Typical Power Dissipation of 65 mW Input Clamp Diodes Limit High Speed Termination Effects GUARANTEED OPERATING RANGES Symbol VCC Parameter Supply Voltage 16 Min Typ Max Unit 4.75 5.0 5.25 V 0 25 70 °C TA Operating Ambient Temperature Range IOH Output Current – High – 0.4 mA IOL Output Current – Low 8.0 mA 1 PLASTIC N SUFFIX CASE 648 16 1 SOIC D SUFFIX CASE 751B ORDERING INFORMATION Semiconductor Components Industries, LLC, 1999 December, 1999 – Rev. 6 1 Device Package Shipping SN74LS298N 16 Pin DIP 2000 Units/Box SN74LS298D 16 Pin 2500/Tape & Reel Publication Order Number: SN74LS298/D SN74LS298 CONNECTION DIAGRAM DIP (TOP VIEW) VCC Qa Qb Qc Qd CP S I0c 16 15 14 13 12 11 10 9 NOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-Line Package. 1 I1b 2 I1a 3 I0a 4 I0b 5 I1c 6 I1d 7 I0d 8 GND LOADING (Note a) PIN NAMES S CP I0a – I0d I1a – I1d Qa – Qd Common Select Input Clock (Active LOW Going Edge) Input Data Inputs from Source 0 Data Inputs from Source 1 Register Outputs NOTES: a) 1 TTL Unit Load (U.L.) = 40 mA HIGH/1.6 mA LOW. LOGIC SYMBOL 3 2 4 1 9 5 7 6 I0a I1a I0b I1b I0c I1c I0d I1d 10 11 S CP Qa Qb Qc Qd 15 14 13 12 VCC = PIN 16 GND = PIN 8 http://onsemi.com 2 HIGH LOW 0.5 U.L. 0.5 U.L. 0.5 U.L. 0.5 U.L. 10 U.L. 0.25 U.L. 0.25 U.L. 0.25 U.L. 0.25 U.L. 5 U.L. SN74LS298 LOGIC OR BLOCK DIAGRAM I0a I1a 2 I1b 3 I0b 1 I1c 4 I0c 5 I1d 9 I0d 6 7 S 10 CP 11 R R R R CP CP CP CP S Qa S Qb S Qc S Qd 15 14 Qa VCC = PIN 16 GND = PIN 8 = PIN NUMBERS 12 13 Qb Qc Qd FUNCTIONAL DESCRIPTION The LS298 is a high speed Quad 2-Port Register. It selects four bits of data from two sources (ports)under the control of a Common Select Input (S). The selected data is transferred to the 4-bit output register synchronous with the HIGH to LOW transition of the Clock input (CP). The 4-bit output register is fully edge-triggered. The Data inputs (I) and Select input (S) must be stable only one setup time prior to the HIGH to LOW transition of the clock for predictable operation. TRUTH TABLE INPUTS OUTPUT S I0 I1 Q I I h h I h X X X X I h L H L H L = LOW Voltage Level H = HIGH Voltage Level X = Don’t Care I = LOW Voltage Level one setup time prior to the HIGH to LOW clock transition. h = HIGH Voltage Level one setup time prior to the HIGH to LOW clock transition. http://onsemi.com 3 SN74LS298 DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified) Limits Symbol Parameter VIH Input HIGH Voltage VIL Input LOW Voltage VIK Input Clamp Diode Voltage VOH Output HIGH Voltage VOL O Output LOW Voltage IIH Input HIGH Current IIL Input LOW Current IOS Short Circuit Current (Note 1) ICC Power Supply Current Min Typ Max 2.0 0.8 – 0.65 2.7 – 1.5 3.5 Unit Test Conditions V Guaranteed Input HIGH Voltage for All Inputs V Guaranteed Input LOW Voltage for All Inputs V VCC = MIN, IIN = – 18 mA V VCC = MIN, IOH = MAX, VIN = VIH or VIL per Truth Table VCC = VCC MIN, VIN = VIL or VIH per Truth Table 0.25 0.4 V IOL = 4.0 mA 0.35 0.5 V IOL = 8.0 mA 20 µA VCC = MAX, VIN = 2.7 V 0.1 mA VCC = MAX, VIN = 7.0 V – 0.4 mA VCC = MAX, VIN = 0.4 V – 100 mA VCC = MAX 21 mA VCC = MAX – 20 Note 1: Not more than one output should be shorted at a time, nor for more than 1 second. AC CHARACTERISTICS (TA = 25°C, VCC = 5.0 V) Limits Symbol tPLH tPHL Parameter Min Propagation g Delay, y Clock to Output Typ Max Unit Test Conditions 18 27 ns 21 32 ns VCC = 5.0 V, CL = 15 pF Max Unit Test Conditions AC SET-UP REQUIREMENTS (TA = 25°C, VCC = 5.0 V) Limits Symbol Parameter Min Typ tW Clock Pulse Width 20 ns ts Data Setup Time 15 ns ts Select Setup Time 25 ns th Data Hold Time 5.0 ns th Select Hold Time VCC = 5.0 V 0 DEFINITIONS OF TERMS SETUP TIME (ts) — is defined as the minimum time required for the correct logic level to be present at the logic input prior to the clock transition from LOW to HIGH in order to be recognized and transferred to the outputs. HOLD TIME (th) — is defined as the minimum time following the clock transition from LOW to HIGH that the logic level must be maintained at the input in order to ensure continued recognition. A negative HOLD TIME indicates that the correct logic level may be released prior to the clock transition from LOW to HIGH and still be recognized. http://onsemi.com 4 SN74LS298 AC WAVEFORMS I0 I1* 1.3 V ts(L) CP 1.3 V th(L) 1.3 V th(H) tW(L) 1.3 V tPHL Q S* ts(H) ts(L) 1.3 V CP 1.3 V th(L) = 0 th(H) = 0 ts(H) 1.3 V 1.3 V tW(H) tPLH 1.3 V 1.3 V Q Q = I0 *The shaded areas indicate when the input is permitted to *change for predictable output performance. Figure 1. Figure 2. http://onsemi.com 5 Q = I1 SN74LS298 PACKAGE DIMENSIONS N SUFFIX PLASTIC PACKAGE CASE 648–08 ISSUE R NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. –A– 16 9 1 8 B F C L S –T– SEATING PLANE K H G D M J 16 PL 0.25 (0.010) M T A M http://onsemi.com 6 DIM A B C D F G H J K L M S INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0_ 10 _ 0.020 0.040 MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0_ 10 _ 0.51 1.01 SN74LS298 PACKAGE DIMENSIONS D SUFFIX PLASTIC SOIC PACKAGE CASE 751B–05 ISSUE J –A– 16 9 1 8 –B– P NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 8 PL 0.25 (0.010) M B S G R K F X 45 _ C –T– SEATING PLANE J M D 16 PL 0.25 (0.010) M T B S A S http://onsemi.com 7 DIM A B C D F G J K M P R MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.229 0.244 0.010 0.019 SN74LS298 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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