MC100EPT26
1:2 Fanout Differential
LVPECL to LVTTL
Translator
The MC100EPT26 is a 1:2 Fanout Differential LVPECL to LVTTL
translator. Because LVPECL (Positive ECL) levels are used only
+3.3V and ground are required. The small outline 8–lead SOIC
package and the 1:2 fanout design of the EPT26 makes it ideal for
applications which require the low skew duplication of a signal in a
tightly packed PC board.
The VBB output allows the EPT26 to be used in a single–ended
input mode. In this mode the VBB output is tied to the D0 input for a
non–inverting buffer or the D0 input for an inverting buffer. If used,
the VBB pin should be bypassed to ground via a 0.01µF capacitator.
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MARKING
DIAGRAMS*
8
SO–8
D SUFFIX
CASE 751
8
1
HPT26
ALYW
1
8
1.4ns Typical Propagation Delay
275MHz Fmax (Clock bit stream, not pseudo–random)
Differential LVPECL inputs
Small Outline SOIC Package
24mA TTL outputs
Flowthrough Pinouts
ESD Protection: >2KV HBM, >100V MM
Internal Input Resistors: Pulldown on D, Pulldown and Pullup on D
Q Outputs will default LOW with inputs open or at VEE
VBB Output
New Differential Input Common Mode Range
Moisture Sensitivity Level 1, Indefinite Time Out of Drypack.
For Additional Information, See Application Note AND8003/D
Flammability Rating: UL–94 code V–0 @ 1/8”,
Oxygen Index 28 to 34
Transistor Count = 117 devices
NC 1
8
TSSOP–8
DT SUFFIX
CASE 948R
8
1
HR26
ALYW
1
A
L
Y
W
= Assembly Location
= Wafer Lot
= Year
= Work Week
*For additional information, see Application Note
AND8002/D
PIN DESCRIPTION
FUNCTION
PIN
Q0, Q1
LVTTL Outputs
D, D
Differential LVPECL Input Pair
VCC
VBB
Reference Voltage
GND
Ground
Positive Supply
VCC
ORDERING INFORMATION
D
2
7
Device
Q0
LVTTL
D
VBB
3
4
6
LVPECL
5
Q1
Package
Shipping
MC100EPT26D
SO–8
98 Units / Rail
MC100EPT26DR2
SO–8
2500 / Reel
MC100EPT26DT
TSSOP–8
98 Units / Rail
MC100EPT26DTR2
TSSOP–8
2500 / Reel
GND
Figure 1. 8–Lead Pinout (Top View) and Logic Diagram
Semiconductor Components Industries, LLC, 2000
May, 2000 – Rev. 2
1
Publication Order Number:
MC100EPT26/D
MC100EPT26
MAXIMUM RATINGS*
Value
Unit
VCC
Symbol
Power Supply (GND = 0V)
Parameter
0 to 3.8
VDC
VI
Input Voltage (GND = 0V, VI not more positive than VCC)
0 to 3.8
VDC
Iout
Output Current
50
100
mA
IBB
VBB Sink/Source Current{
± 0.5
mA
TA
Operating Temperature Range
–40 to +85
°C
Tstg
Storage Temperature
–65 to +150
°C
θJA
Thermal Resistance (Junction–to–Ambient)
190
130
°C/W
θJC
Thermal Resistance (Junction–to–Case)
41 to 44 ± 5%
°C/W
Tsol
Solder Temperature (<2 to 3 Seconds: 245°C desired)
265
°C
Continuous
Surge
Still Air
500lfpm
* Maximum Ratings are those values beyond which damage to the device may occur.
{ Use for inputs of same package only.
DC CHARACTERISTICS (VCC = 3.3V ± 0.3V; GND = 0V; TA = –40°C to 85°C)
Symbol
Characteristic
Min
Typ
Max
Unit
ICCH
Power Supply Current (Outputs set to HIGH)
10
20
18
mA
ICCL
Power Supply Current (Outputs set to LOW)
15
28
35
mA
VIH
Input HIGH Voltage (VCC = 3.3) (Note 1.)
2135
2420
mV
VIL
Input LOW Voltage (VCC = 3.3) (Note 1.)
1490
1825
mV
IIH
Input HIGH Current
150
µA
IIL
Input LOW Current
0.5
µA
D
D
VOH
Output HIGH Voltage (IOH = –3.0mA) (Note 2.)
VOL
Output LOW Voltage (IOL = 24mA) (Note 2.)
IOS
Output Short Circuit Current
–150
2.4
VIHCMR Input HIGH Voltage Common Mode Range (Note 3.)
V
0.5
V
–50
–150
mA
2.0
3.3
V
VBB
Output Voltage Reference
2.0
V
NOTE: 100EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The
circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500lfpm is maintained.
1. All values vary 1:1 with VCC.
2. All loading with 500 ohms to GND, CL = 20pF.
3. VIHCMR min varies 1:1 with GND, max varies 1:1 with VCC.
AC CHARACTERISTICS (VCC = 3.3V ± 0.3V; GND = 0V)
–40°C
Symbol
Characteristic
Min
Typ
25°C
Max
Min
Typ
275
350
1.2
1.2
1.5
1.5
85°C
Max
Min
Typ
275
350
1.3
1.2
1.7
1.5
Max
Unit
fmax
Maximum Toggle
Frequency (Note 4.)
275
350
tPLH,
tPHL
Propagation Delay to
Output Differential (Note 5.)
1.2
1.2
1.5
1.5
tSK+ +
tSK– –
tSKPP
Output–to–Output Skew++
Output–to–Output Skew– –
Part–to–Part Skew (Note 6.)
60
25
500
60
25
500
60
25
500
ps
tJITTER
Cycle–to–Cycle Jitter
TBD
TBD
TBD
ps
VPP
Input Voltage Swing (Diff.)
150
800
1.8
1.8
1200
150
800
tr
Output Rise/Fall Times
tf
330
600
900
330
600
(0.8V – 2.0V)
Q, Q
4. Fmax guaranteed for functionality only. VOL and VOH levels are guaranteed at DC only.
5. Reference (VCC = 3.3V ± 5%, GND = 0V)
6. Skews are measured between outputs under identical transitions.
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2
1.8
1.8
MHz
2.2
1.8
1200
150
800
1200
900
330
650
900
ns
mV
ps
MC100EPT26
PACKAGE DIMENSIONS
SO–8
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751–06
ISSUE T
D
A
8
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. DIMENSIONS ARE IN MILLIMETER.
3. DIMENSION D AND E DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS
OF THE B DIMENSION AT MAXIMUM MATERIAL
CONDITION.
C
5
0.25
H
E
M
B
M
1
4
h
B
e
X 45 _
q
A
C
SEATING
PLANE
L
0.10
A1
B
0.25
M
C B
S
A
S
DIM
A
A1
B
C
D
E
e
H
h
L
q
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3
MILLIMETERS
MIN
MAX
1.35
1.75
0.10
0.25
0.35
0.49
0.19
0.25
4.80
5.00
3.80
4.00
1.27 BSC
5.80
6.20
0.25
0.50
0.40
1.25
0_
7_
MC100EPT26
PACKAGE DIMENSIONS
TSSOP–8
DT SUFFIX
PLASTIC TSSOP PACKAGE
CASE 948R–02
ISSUE A
8x
0.15 (0.006) T U
K REF
0.10 (0.004)
S
2X
L/2
8
1
PIN 1
IDENT
S
S
V
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH. PROTRUSIONS OR GATE BURRS. MOLD
FLASH OR GATE BURRS SHALL NOT EXCEED
0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL NOT
EXCEED 0.25 (0.010) PER SIDE.
5. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
6. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE –W–.
S
5
0.25 (0.010)
B
–U–
L
0.15 (0.006) T U
T U
M
M
4
A
–V–
F
DETAIL E
C
0.10 (0.004)
–T– SEATING
PLANE
D
–W–
G
DETAIL E
DIM
A
B
C
D
F
G
K
L
M
MILLIMETERS
MIN
MAX
2.90
3.10
2.90
3.10
0.80
1.10
0.05
0.15
0.40
0.70
0.65 BSC
0.25
0.40
4.90 BSC
0_
6_
INCHES
MIN
MAX
0.114
0.122
0.114
0.122
0.031
0.043
0.002
0.006
0.016
0.028
0.026 BSC
0.010
0.016
0.193 BSC
0_
6_
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are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
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4
MC100EPT26/D