CS8321 Micropower 5.0 V, 150 mA Low Dropout Linear Regulator The CS8321 is a precision 5.0 V micropower voltage regulator with very low quiescent current (140 mA typ at 1.0 mA load). The 5.0 V output is accurate within ±2% and supplies 150 mA of load current with a typical dropout voltage of only 300 mV. This combination of low quiescent current and outstanding regulator performance makes the CS8321 ideal for any battery operated equipment. The regulator is protected against reverse battery and short circuit conditions. The device can withstand 45 V load dump transients making it suitable for use in automotive environments. • • TO−220−3 T SUFFIX CASE 221A 1 Features • • • • http://onsemi.com 5.0 V ± 2% Output Low 140 mA (typ) Quiescent Current 150 mA Output Current Capability Fault Protection ♦ −15 V Reverse Voltage Output Current Limit Low Reverse Current (Output to Input) Pb−Free Packages are Available* 2 3 D2PAK−3 DP SUFFIX CASE 418AB 12 3 MARKING DIAGRAMS VOUT R QP CS 8321 AWLYWWG QN D2PAK−3 TO−220−3 VIN Current Source (Circuit Bias) Pin 1. VIN 2. GND 3. VOUT CS 8321 AWLYWWG 1 Current Limit Sense 1 + − Error Amplifier A WL Y WW G R1 Bandgap Reference = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package R2 GND ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. *Lead Shorted to VOUT in 3−Pin Applications Figure 1. Block Diagram *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2005 October, 2005 − Rev. 7 1 Publication Order Number: CS8321/D CS8321 ABSOLUTE MAXIMUM RATINGS Rating Transient Input Voltage Output Current Value Unit −15, 45 V Internally Limited − 2.0 kV Junction Temperature −40 to 150 °C Storage Temperature −65 to 150 °C 260 peak 230 peak °C °C ESD Susceptibility (Human Body Model) Lead Temperature Soldering Wave Solder (through hole styles only) Note 1 Reflow (SMD styles only) Note 2 Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. 10 seconds max 2. 60 seconds max above 183°C ELECTRICAL CHARACTERISTICS (6.0 V < VIN < 26 V, IOUT = 1.0 mA, −40°C ≤ TA ≤ 125°C, −40°C ≤ TJ ≤ 150°C; unless otherwise specified.) Characteristic Test Conditions Min Typ Max Unit Output Stage Output Voltage, VOUT 9.0 V < VIN 16 V, 100 mA ≤ IOUT ≤ 150 mA 4.9 5.0 5.1 V Dropout Voltage (VIN − VOUT) IOUT = 150 mA, −40°C ≤ TA ≤ 85°C IOUT = 150 mA, TA = 125°C − − 0.3 − 0.5 0.6 V V Quiescent Current, (IQ) IOUT = 1.0 mA @ VIN = 13 V IOUT < 50 mA @ VIN = 13 V IOUT < 150 mA @ VIN = 13 V − − − − 4.0 15 200 6.0 25 mA mA mA Load Regulation VIN = 14 V, 100 mA < IOUT < 150 mA − 5.0 50 mV Line Regulation 6.0 V ≤ V ≤ 26 V, IOUT = 1.0 mA − 5.0 50 mV Ripple Rejection 7.0 ≤ VIN ≤ 17 V, IOUT = 150 mA, f = 120 Hz 60 75 − dB 175 250 − mA Current Limit − Short Circuit Output Current VOUT = 0 V 60 200 − mA Reverse Current VOUT = 5.0 V, VIN = 0 V − 140 200 mA PACKAGE PIN DESCRIPTION PACKAGE PIN # TO−220−3 D2PAK−3 PIN SYMBOL FUNCTION 1 1 VIN Input voltage. 2 2 GND Ground. All GND leads must be connected to ground. 3 3 VOUT 5.0 V, ±2%, 150 mA Output. ORDERING INFORMATION* Package Shipping † CS8321YT3 TO−220−3 50 Units / Rail CS8321YT3G TO−220−3 (Pb−Free) 50 Units / Rail CS8321YDP3 D2PAK−3 50 Units / Rail CS8321YDP3G D2PAK−3 (Pb−Free) 50 Units / Rail CS8321YDPR3 D2PAK−3 750 Units / Tape & Reel CS8321YDPR3G D2PAK−3 (Pb−Free) 750 Units / Tape & Reel Device *Contact your local sales representative for SO−16, DIP−16, SO−8, and DIP−8 package options. †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 2 CS8321 CIRCUIT DESCRIPTION AND APPLICATION NOTES VOLTAGE REFERENCE AND OUTPUT CIRCUITRY 0.34257 The CS8321 is a series pass voltage regulator. It consists of an error amplifier, bandgap voltage reference, PNP pass transistor with antisaturation control, and current limit. As the voltage at the input, VIN, is increased (Figure 1), QN is forward biased via R. QN provides base drive for QP. As QP becomes forward biased, the output voltage, VOUT, begins to rise as QP’s output current charges the output capacitor. Once VOUT rises to a certain level, the error amplifier becomes biased and provides the appropriate amount of base current to QP. The error amplifier monitors the scaled output voltage via an internal voltage divider, R1 and R2, and compares it to the bandgap voltage reference. The error amplifier’s output is a current which is equal to the error amplifier’s differential input voltage times its transconductance. Therefore, the error amplifier varies the base drive current to QN, which provides bias to QP, based on the difference between the reference voltage and the scaled output voltage, VOUT. 0.30831 0.27405 Load Current 0.23980 0.17128 0.13703 0.10277 0.06851 0.03426 Curve will vary with temperature and process variation. 0.0 0.0 0.51 1.02 1.52 2.03 2.54 3.05 3.56 4.06 4.57 5.08 Output Voltage Figure 3. Typical Current Limit and Fold Back Waveform The capacitor value and type should be based on cost, availability, size and temperature constraints. A tantalum or aluminum electrolytic capacitor is best, since a film or ceramic capacitor with almost zero ESR can cause instability. The aluminum electrolytic capacitor is the least expensive solution, but, if the circuit operates at low temperatures (−25°C to −40°C), both the value and ESR of the capacitor will vary considerably. The capacitor manufacturers data sheet usually provides this information. The value for the output capacitor COUT shown in Figure 4 should work for most applications, however it is not necessarily the best solution. Antisaturation Protection An antisaturation control circuit has also been added to prevent the pass transistor from going into deep saturation, which would cause excessive power dissipation due to large bias currents lost to the substrate via a parasitic PNP transistor, as shown in Figure 2. VIN QP QParasitic 0.20554 VIN VOUT VOUT CIN* 0.1 mF Substrate CS8321 COUT** 0.1 mF VOUTSense† Figure 2. The Parasitic PNP Transistor Which Is Part of the Pass Transistor (QP) Structure Current Limit Limit The output stage is protected against short circuit conditions. As shown in Figure 3, the output current will fold back when the faulted load is continually increased. This technique has been incorporated to limit the total power dissipation across the device during a short circuit condition, since the device does not contain overtemperature shutdown. *CIN required if regulator is located far from the power supply filter. **COUT required for stability. Capacitor must operate at minimum temperature expected. †Pin internally shorted to VOUT in 3−pin applications. Figure 4. Test and Application Circuit Showing Output Compensation STABILITY CONSIDERATIONS To determine an acceptable value for COUT for a particular application, start with a tantalum capacitor of the The output or compensation capacitor helps determine three main characteristics of a linear regulator: start−up delay, load transient response and loop stability. http://onsemi.com 3 CS8321 VIN(max) is the maximum input voltage, VOUT(min) is the minimum output voltage, IOUT(max) is the maximum output current for the application, and IQ is the quiescent current the regulator consumes at IOUT(max). Once the value of PD(max) is known, the maximum permissible value of RqJA can be calculated: recommended value and work towards a less expensive alternative part. Step 1: Place the completed circuit with a tantalum capacitor of the recommended value in an environmental chamber at the lowest specified operating temperature and monitor the outputs with an oscilloscope. A decade box connected in series with the capacitor will simulate the higher ESR of an aluminum capacitor. Leave the decade box outside the chamber, the small resistance added by the longer leads is negligible. Step 2: With the input voltage at its maximum value, increase the load current slowly from zero to full load while observing the output for any oscillations. If no oscillations are observed, the capacitor is large enough to ensure a stable design under steady state conditions. Step 3: Increase the ESR of the capacitor from zero using the decade box and vary the load current until oscillations appear. Record the values of load current and ESR that cause the greatest oscillation. This represents the worst case load conditions for the regulator at low temperature. Step 4: Maintain the worst case load conditions set in step 3 and vary the input voltage until the oscillations increase. This point represents the worst case input voltage conditions. Step 5: If the capacitor is adequate, repeat steps 3 and 4 with the next smaller valued capacitor. A smaller capacitor will usually cost less and occupy less board space. If the output oscillates within the range of expected operating conditions, repeat steps 3 and 4 with the next larger standard capacitor value. Step 6: Test the load transient response by switching in various loads at several frequencies to simulate its real working environment. Vary the ESR to reduce ringing. Step 7: Raise the temperature to the highest specified operating temperature. Vary the load current as instructed in step 5 to test for any oscillations. Once the minimum capacitor value with the maximum ESR is found, a safety factor should be added to allow for the tolerance of the capacitor and any variations in regulator performance. Most good quality aluminum electrolytic capacitors have a tolerance of ±20% so the minimum value found should be increased by at least 50% to allow for this tolerance plus the variation which will occur at low temperatures. The ESR of the capacitor should be less than 50% of the maximum allowable ESR found in step 3 above. The value of RqJA can then be compared with those in the package section of the data sheet. Those packages with RqJA’s less than the calculated value in equation 2 will keep the die temperature below 150°C. In some cases, none of the packages will be sufficient to dissipate the heat generated by the IC, and an external heatsink will be required. IIN VIN IOUT VOUT CS8321 IQ Figure 5. Single Output Regulator with Key Performance Parameters Labeled HEATSINKS A heatsink effectively increases the surface area of the package to improve the flow of heat away from the IC and into the surrounding air. Each material in the heat flow path between the IC and the outside environment will have a thermal resistance. Like series electrical resistances, these resistances are summed to determine the value of RqJA: RqJA + RqJC ) RqCS ) RqSA (3) where: RqJC = the junction−to−case thermal resistance, RqCS = the case−to−heatsink thermal resistance, and RqSA = the heatsink−to−ambient thermal resistance. RqJC appears in the package section of the data sheet. Like RqJA, it too is a function of package type. RqCS and RqSA are functions of the package type, heatsink and the interface between them. These values appear in heatsink data sheets of heatsink manufacturers. CALCULATING POWER DISSIPATION IN A SINGLE OUTPUT LINEAR REGULATOR The maximum power dissipation for a single output regulator (Figure 5) is: PD(max) + (VIN(max) * VOUT(min))IOUT(max) ) VIN(max)IQ (2) RqJA + 150°C * TA PD (1) where: http://onsemi.com 4 CS8321 PACKAGE DIMENSIONS TO−220−3 T SUFFIX CASE 221A−08 ISSUE AA −T− F −B− 4 Q C T S DIM A B C D F G H J K L N Q R S T U V A U 1 2 3 −Y− NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. SEATING PLANE H K L R V G J N D 3 PL 0.25 (0.010) M B M INCHES MIN MAX 0.560 0.625 0.380 0.420 0.140 0.190 0.025 0.035 0.139 0.155 0.100 BSC −−− 0.280 0.012 0.045 0.500 0.580 0.045 0.060 0.200 BSC 0.100 0.135 0.080 0.115 0.020 0.055 0.235 0.255 0.000 0.050 0.045 −−− Y PACKAGE THERMAL DATA TO−220−3 D2PAK−3 Unit RqJC Typical 3.5 1.0* °C/W RqJA Typical 50 10−50† °C/W Parameter *Depending on die area. †Depending on thermal properties of substrate. RqJA = RqJC + RqCA. http://onsemi.com 5 MILLIMETERS MIN MAX 14.23 15.87 9.66 10.66 3.56 4.82 0.64 0.89 3.53 3.93 2.54 BSC −−− 7.11 0.31 1.14 12.70 14.73 1.15 1.52 5.08 BSC 2.54 3.42 2.04 2.92 0.51 1.39 5.97 6.47 0.00 1.27 1.15 −−− CS8321 PACKAGE DIMENSIONS D2PAK−3 DP SUFFIX CASE 418AB−01 ISSUE O A K E S TERMINAL 4 U V B M H DIM A B C D E G H K L M N P R S U V W L P G D R NOTES: 1. DIMENSIONS AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. PACKAGE OUTLINE EXCLUSIVE OF MOLD FLASH AND METAL BURRS. 4. PACKAGE OUTLINE INCLUSIVE OF PLATING THICKNESS. 5. FOOT LENGTH MEASURED AT INTERCEPT POINT BETWEEN DATUM A AND LEAD SURFACE. W N −A− C INCHES MIN MAX 0.396 0.406 0.330 0.340 0.170 0.180 0.026 0.036 0.045 0.055 0.100 REF 0.580 0.620 0.055 0.066 0.000 0.010 0.098 0.108 0.017 0.023 0.090 0.110 0° 8° 0.095 0.105 0.30 REF 0.305 REF 0.010 MILLIMETERS MIN MAX 10.05 10.31 8.38 8.64 4.31 4.57 0.66 0.91 1.14 1.40 2.54 REF 14.73 15.75 1.40 1.68 0.00 0.25 2.49 2.74 0.43 0.58 2.29 2.79 0° 8° 2.41 2.67 7.62 REF 7.75 REF 0.25 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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