ETC CS8271/D

CS8271
Adjustable Micropower
Low Dropout Linear
Regulator with ENABLE
The CS8271 is an adjustable micropower voltage regulator with
very low quiescent current (60 µA typical at 100 µA load). The output
supplies 100 mA of load current with a maximum dropout voltage of
only 600 mV. Control logic includes ENABLE. The combination of
low quiescent current, outstanding regulator performance and control
logic makes the CS8271 ideal for any battery operated equipment.
The logic level ENABLE compatible pin allows the user to put the
regulator into a shutdown mode where it draws only 50 µA of
quiescent current.
The regulator is protected against reverse battery, short circuit,
over voltage, and over temperature conditions. The device can
withstand 60 V load dump transients making it suitable for use in
automotive environments.
The CS8271 is pin compatible with the National Semiconductor
LM2931.
http://onsemi.com
SO–8
D SUFFIX
CASE 751
8
1
DIP–8
N SUFFIX
CASE 626
8
1
PIN CONNECTIONS AND
MARKING DIAGRAM
Features
Low Quiescent Current
Adjustable Output: 5.0 V to 12 V
ENABLE for Sleep Mode Control
100 mA Output Current Capability
Fault Protection
– +60 V Load Dump
– –15 V Reverse Voltage Short Circuit
– Thermal Shutdown
• Low Reverse Current (Output to Input)
SO–8
VOUT
1
8
8271
ALYWX
•
•
•
•
•
GND
NC
Adj
1
DIP–8
VOUT
NC
Adj
A
WL, L
YY, Y
WW, W
NC
NC
ENABLE
8
VIN
CS8271
AWL
YYWW
GND
VIN
NC
NC
ENABLE
= Assembly Location
= Wafer Lot
= Year
= Work Week
ORDERING INFORMATION*
Device
Package
Shipping
CS8271YD8
SO–8
95 Units/Rail
CS8271YDR8
SO–8
2500 Tape & Reel
CS8271YN8
DIP–8
50 Units/Rail
*Consult your local sales representative for other
package options.
 Semiconductor Components Industries, LLC, 2001
March, 2001 – Rev. 4
1
Publication Order Number:
CS8271/D
CS8271
VOUT
VIN
Current Source
(Circuit Bias)
Over Voltage
Shutdown
ENABLE
Input
Current Limit
Sense
Adj
+
–
Error
Amplifier
Thermal
Shutdown
Bandgap
Reference
GND
Figure 1. Block Diagram
ABSOLUTE MAXIMUM RATINGS*
Rating
Value
Unit
Internally Limited
–
–50, 60
V
Reverse Battery
–15
V
Output Current
Internally Limited
–
2.0
kV
Junction Temperature
–40 to +150
°C
Storage Temperature
–55 to +150
°C
260 peak
230 peak
°C
°C
Adj, ENABLE
–0.3, 10
V
VOUT
–0.3, 20
V
Power Dissipation
Peak Transient Voltage (46 V Load Dump @ VIN = 14 V
ESD Susceptibility (Human Body Model)
Lead Temperature Soldering:
Wave Solder (through hole styles only) (Note 1.)
Reflow (SMD styles only) (Note 2.)
1. 10 second maximum.
2. 60 second maximum above 183°C.
*The maximum package power dissipation must be observed.
http://onsemi.com
2
CS8271
ELECTRICAL CHARACTERISTICS (VOUT + 1.0 V ≤ VIN ≤ 30 V, 5.0 V ≤ VOUT ≤ 12 V, IOUT = 10 mA,
–40°C ≤ TA ≤ 125°C, –40°C ≤ TJ ≤ 150°C, VENABLE = 0 V; unless otherwise specified.)
Characteristic
Test Conditions
Min
Typ
Max
Unit
Output Voltage
Dropout Voltage
IOUT = 100 µA, VDROP = (VIN – VOUT)
IOUT = 100 mA, VDROP = (VIN – VOUT)
–
–
100
400
150
600
mV
mV
Load Regulation
Measure VOUT when IOUT = 100 µA, 100 mA.
LDREG = ABS (∆VOUT)
–
0.1
1.0
%VOUT
Line Regulation
IOUT = 1.0 mA. Measure VOUT when VIN = VOUT + 1.0 V, 30 V,
LNREG = ABS (∆VOUT)
–
0.1
0.5
%VOUT
Quiescent Current, (IQ) Active Mode
VIN = 6.0 V, IOUT = 100 µA, VOUT setup for 5.0 V,
IQ = IVIN – IOUT
VIN = 13 V, IOUT = 100 µA, VOUT setup for 12 V,
IQ = IVIN – 100 µA
VIN = 30 V, IOUT = 100 µA, VOUT setup for 5.0 V.
IQ = IVIN – 100 µA
VIN = 30 V, IOUT = 100 µA, VOUT setup for 12 V.
IQ = IVIN – 100 µA
IOUT = 50 mA, IQ = IVIN – 50 mA
IOUT = 100 mA, IQ = IVIN – 100 mA
–
55
120
µA
–
130
200
µA
–
150
450
µA
–
20
500
µA
–
–
4.0
12
7.0
21
mA
mA
Quiescent Current, (IQ) Sleep Mode
VIN = 6.0 V, ENABLE = 2.5 V, IQSLEEP = IVIN
VIN = 30 V, ENABLE = 2.5 V, IQSLEEP = IVIN
–
–
20
75
50
350
µA
µA
Ripple Rejection
f = 120 Hz, Note 3.
60
75
–
dB
Current Limit
VOUT = VOUT – 500 mV, ILIM = IVOUT
105
200
300
mA
Short Circuit Output Current
VOUT = 0 V, ISHRT = IVOUT
15
100
215
mA
Thermal Limit
Note 3.
150
180
210
°C
Overvoltage Shutdown
Adjust VIN from 28 V to 40 V until VOUT ≤ 1.0 V
30
34
38
V
Reverse Current
VIN = 0 V, IREV = IVOUT, VOUT = 13.2 V
–
100
200
µA
1.15
2.0
2.6
V
–
–
10
35
20
50
µA
µA
ENABLE
Enable Threshold
–
Enable Input Current
Adjustment Pin
VENABLE = 2.6 V
VENABLE = 5.0 V
R1: Feedback resistor between VOUT and Adjust, R2: Adjust resistor to ground.
Reference Voltage
100 µA ≤ IOUT ≤ 100 mA
Adjustment Pin Current
IADJ = (VREF/R2) – ((VOUT – VREF)/R1)
1.246
1.272
1.297
V
–
20
500
nA
3. Guaranteed by design, not 100% tested in production.
PACKAGE LEAD DESCRIPTION
PACKAGE LEAD #
SO–8
DIP–8
LEAD SYMBOL
1
1
VOUT
100 mA output; adjustable from 5.0 V to 12 V.
2
2
GND
Ground.
3, 6, 7
3, 6, 7
NC
No connection.
4
4
Adj
Resistor divider from VOUT to Adj, sets output voltage.
5
5
ENABLE
8
8
VIN
FUNCTION
Logic level switch, when High, regulator is in sleep mode.
Input voltage.
http://onsemi.com
3
CS8271
CIRCUIT DESCRIPTION
OUTPUT VOLTAGE ADJUSTMENT
Short circuit protection limits the amount of current the
output transistor can supply. In the case of a CS8271 under
a short circuit condition, the output transistor current is
limited to 100 mA.
Should the junction temperature of the power device
exceed 180°C (typ) the power transistor is turned off.
Thermal shutdown is an effective means to prevent die
overheating since the power transistor is the principle heat
source in the IC.
The output voltage of the CS8271 is adjustable to any
value between 5.0 V and the maximum input voltage minus
the dropout voltage. To adjust the output voltage, a pair of
external resistors R1 and R2 are connected as shown in
Figure 2.
The equation for the output voltage is
VOUT VREF R1 R2 IAdj R1
R2
where VREF is the typical reference voltage and IAdj is the
adjust pin bias current. This is usually 500 nA maximum.
> 30 V
VIN
VOUT
VOUT
VOUT
CS8271
R1
IOUT
Adj
VREF
Load
Dump
R2
Short
Circuit
Thermal
Shutdown
Figure 3. Typical Circuit Waveforms for Output
Stage Protection
Figure 2. Output Voltage Adjustment
ENABLE
OUTPUT STAGE PROTECTION
The ENABLE function switches the output transistor.
When the voltage on the ENABLE pin exceeds 2.0 V typ, the
output pass transistor turns off, leaving a high impedance
facing the load. The IC will remain in Sleep mode, drawing
only 20 µA (typ), until the voltage on this input drops below
the ENABLE threshold.
The output stage is protected against overvoltage, short
circuit and thermal runaway conditions (Figure 3).
If the input voltage rises above 30 V (e.g. load dump), the
output shuts down. This response protects the internal
circuitry and enables the IC to survive unexpected voltage
transients up to 60 V in magnitude.
http://onsemi.com
4
CS8271
APPLICATION NOTES
SELECTING THE RIGHT CAPACITOR VALUE
Step 3: Increase the ESR of the capacitor from zero using
the decade box and vary the load current until oscillations
appear. Record the values of load current and ESR that cause
the greatest oscillation. This represents the worst case load
conditions for the regulator at low temperature.
Step 4: Maintain the worst case load conditions set in
step 3 and vary the input voltage until the oscillations
increase. This point represents the worst case input voltage
conditions.
Step 5: If the capacitor is adequate, repeat steps 3 and 4
with the next smaller valued capacitor. (A smaller capacitor
will usually cost less and occupy less board space.) If the
capacitor oscillates within the range of expected operating
conditions, repeat steps 3 and 4 with the next larger standard
capacitor value.
Step 6: Test the load transient response by switching in
various loads at several frequencies to simulate its real work
environment. Vary the ESR to reduce ringing.
Step 7: Raise the temperature to the highest specified
operating temperature. Vary the load current as instructed in
step 5 to test for any oscillations.
The output compensation capacitor COUT, determines
three main characteristics of a linear regulator: start–up
delay, load transient response and loop stability.
The selection of a capacitor value and type should be
based on cost, availability, size and temperature constraints.
A tantalum or aluminum electrolytic capacitor is best, since
a film or ceramic capacitor with almost zero ESR, can cause
instability. The aluminum electrolytic capacitor is the least
expensive solution, but, if the circuit operates at low
temperatures (–25°C to –40°C), both the value and ESR of
the capacitor will vary considerably. The capacitor
manufacturers data sheet usually provide this information.
The value for the output compensation capacitor COUT
shown in Figure 4 should work for most applications, but it
is not necessarily the least expensive or the optimal solution.
VIN
VOUT
CIN
0.1 µF
CS8271
Adj
ENABLE
COUT
10 µF
RRST
RL
CAdj
(optional)
Once the minimum capacitor value with the maximum
ESR is found, a safety factor should be added to allow for the
tolerance of the capacitor and any variations in regulator
performance. Most good quality aluminum electrolytic
capacitors have a tolerance of ± 20% so the minimum value
found should be increased by at least 50% to allow for this
tolerance plus the variation which will occur at low
temperatures. The ESR of the capacitor should be less than
50% of the maximum allowable ESR found in step 3 above.
Capacitance on the Adjust pin combined with the
feedback resistors R1 and R2 can affect loop stability and
should also be considered. The CS8271 internal circuitry
produces about 5.0 pF to Ground on the Adjust pin. This
capacitance, plus any additional external capacitance on the
Adjust pin will create a pole when combined with the
resistive feedback network. The effect can be significant
when using large values for the feedback resistors to
minimize quiescent current.
A capacitor connected from the Adjust pin to Ground
provides additional means to compensate the regulator by
creating a pole. Alternately, a capacitor can be connected
from the Adjust pin to VOUT to create a zero.
Figure 4. Test and Application Circuit Showing
An Output Compensation Capacitor
To determine an acceptable value for COUT for a particular
application, start with a tantalum capacitor of the
recommended value and work towards a less expensive
alternative part.
Step 1: Place the completed circuit with a tantalum
capacitor of the recommended value in an environmental
chamber at the lowest specified operating temperature and
monitor the outputs with an oscilloscope. A decade box
connected in series with the capacitor will simulate the
higher ESR of an aluminum capacitor. (Leave the decade
box outside the chamber, the small resistance added by the
longer leads is negligible).
Step 2: With the input voltage at its maximum value,
increase the load current slowly from zero to full load while
observing the output for any oscillations. If no oscillations
are observed, the capacitor is large enough to ensure a stable
design under steady state conditions.
http://onsemi.com
5
CS8271
CALCULATING POWER DISSIPATION IN A SINGLE
OUTPUT LINEAR REGULATOR
RΘJA’s less than the calculated value in equation 2 will keep
the die temperature below 150°C.
In some cases, none of the packages will be sufficient to
dissipate the heat generated by the IC, and an external
heatsink will be required.
The maximum power dissipation for a single output
regulator (Figure 5) is:
PD(max) VIN(max) VOUT(min)IOUT(max) VIN(max)IQ
(1)
where:
VIN(max) is the maximum input voltage,
VOUT(min) is the minimum output voltage,
IOUT(max) is the maximum output current for the
application, and
IQ is the quiescent current the regulator consumes at
IOUT(max).
Once the value of PD(max) is known, the maximum
permissible value of RΘJA can be calculated:
RJA 150°C TA
PD
IIN
VOUT
SMART
REGULATOR
Control
Features
IQ
(2)
Figure 5. Single Output Regulator With Key
Performance Parameters Labeled
The value of RΘJA can then be compared with those in the
package section of the data sheet. Those packages with
VIN
VOUT
VOUT
R1
CS8271
C1 *
0.1 µF
IOUT
VIN
ENABLE
Adj
C2**
10 µF
VREF
GND
R2
C1* Required if regulator is away from power supply filter.
C2** Required for output stability.
Figure 6. Application Diagram
http://onsemi.com
6
VOUT VREF R1 R2 IAdj R1
R2
CS8271
PACKAGE DIMENSIONS
SO–8
D SUFFIX
CASE 751–07
ISSUE W
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER
SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN
EXCESS OF THE D DIMENSION AT MAXIMUM
MATERIAL CONDITION.
–X–
A
8
5
0.25 (0.010)
S
B
1
M
Y
M
4
K
–Y–
G
C
N
X 45 SEATING
PLANE
–Z–
0.10 (0.004)
H
D
0.25 (0.010)
M
Z Y
S
X
M
S
http://onsemi.com
7
J
DIM
A
B
C
D
G
H
J
K
M
N
S
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0
8
0.25
0.50
5.80
6.20
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0
8
0.010
0.020
0.228
0.244
CS8271
PACKAGE DIMENSIONS
DIP–8
N SUFFIX
CASE 626–05
ISSUE L
8
NOTES:
1. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
2. PACKAGE CONTOUR OPTIONAL (ROUND OR
SQUARE CORNERS).
3. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
5
–B–
1
4
DIM
A
B
C
D
F
G
H
J
K
L
M
N
F
–A–
NOTE 2
L
C
J
–T–
N
SEATING
PLANE
D
H
STYLE 1:
PIN 1.
2.
3.
4.
5.
6.
7.
8.
M
K
G
0.13 (0.005)
M
T A
M
B
M
MILLIMETERS
MIN
MAX
9.40
10.16
6.10
6.60
3.94
4.45
0.38
0.51
1.02
1.78
2.54 BSC
0.76
1.27
0.20
0.30
2.92
3.43
7.62 BSC
--10
0.76
1.01
INCHES
MIN
MAX
0.370
0.400
0.240
0.260
0.155
0.175
0.015
0.020
0.040
0.070
0.100 BSC
0.030
0.050
0.008
0.012
0.115
0.135
0.300 BSC
--10
0.030
0.040
AC IN
DC + IN
DC - IN
AC IN
GROUND
OUTPUT
AUXILIARY
VCC
PACKAGE THERMAL DATA
Parameter
SO–8
DIP–8
Unit
RΘJC
Typical
45
52
°C/W
RΘJA
Typical
165
100
°C/W
SMART REGULATOR is a registered trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or
death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold
SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable
attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
NORTH AMERICA Literature Fulfillment:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303–675–2175 or 800–344–3860 Toll Free USA/Canada
Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada
Email: [email protected]
Fax Response Line: 303–675–2167 or 800–344–3810 Toll Free USA/Canada
N. American Technical Support: 800–282–9855 Toll Free USA/Canada
EUROPE: LDC for ON Semiconductor – European Support
German Phone: (+1) 303–308–7140 (Mon–Fri 2:30pm to 7:00pm CET)
Email: ONlit–[email protected]
French Phone: (+1) 303–308–7141 (Mon–Fri 2:00pm to 7:00pm CET)
Email: ONlit–[email protected]
English Phone: (+1) 303–308–7142 (Mon–Fri 12:00pm to 5:00pm GMT)
Email: [email protected]
CENTRAL/SOUTH AMERICA:
Spanish Phone: 303–308–7143 (Mon–Fri 8:00am to 5:00pm MST)
Email: ONlit–[email protected]
Toll–Free from Mexico: Dial 01–800–288–2872 for Access –
then Dial 866–297–9322
ASIA/PACIFIC: LDC for ON Semiconductor – Asia Support
Phone: 1–303–675–2121 (Tue–Fri 9:00am to 1:00pm, Hong Kong Time)
Toll Free from Hong Kong & Singapore:
001–800–4422–3781
Email: ONlit–[email protected]
JAPAN: ON Semiconductor, Japan Customer Focus Center
4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031
Phone: 81–3–5740–2700
Email: [email protected]
ON Semiconductor Website: http://onsemi.com
EUROPEAN TOLL–FREE ACCESS*: 00–800–4422–3781
*Available from Germany, France, Italy, UK, Ireland
For additional information, please contact your local
Sales Representative.
http://onsemi.com
8
CS8271/D