ONSEMI MC74HC1G08DFT1

MC74HC1G08
Single 2-Input AND Gate
The MC74HC1G08 is a high speed CMOS 2–input AND gate
fabricated with silicon gate CMOS technology.
The internal circuit is composed of multiple stages, including a
buffer output which provides high noise immunity and stable output.
The MC74HC1G08 output drive current is 1/2 compared to
MC74HC series.
•
•
•
•
•
•
http://onsemi.com
High Speed: tPD = 7 ns (Typ) at VCC = 5 V
Low Power Dissipation: ICC = 1 A (Max) at TA = 25°C
MARKING
DIAGRAMS
High Noise Immunity
5
Balanced Propagation Delays (tpLH = tpHL)
1
Symmetrical Output Impedance (IOH = IOL = 2 mA)
Chip Complexity: FET = 44
IN B
1
IN A
2
GND
3
H2d
SC70–5/SC–88A/SOT–353
DF SUFFIX
CASE 419A
5
VCC
Pin 1
5
H2d
1
4
SOT23–5/TSOP–5/SC59–5
DT SUFFIX
CASE 483
OUT Y
Pin 1
d = Date Code
Figure 1. Pinout
PIN ASSIGNMENT
1
IN A
IN B
&
OUT Y
Figure 2. Logic Symbol
IN B
2
IN A
3
GND
4
OUT Y
5
VCC
FUNCTION TABLE
Inputs
Output
A
B
Y
L
L
H
H
L
H
L
H
L
L
L
H
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
 Semiconductor Components Industries, LLC, 2001
September, 2001 – Rev. 7
1
Publication Order Number:
MC74HC1G08/D
MC74HC1G08
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
VCC
DC Supply Voltage
0.5 to 7.0
V
VIN
DC Input Voltage
0.5 to VCC 0.5
V
VOUT
DC Output Voltage
0.5 to VCC 0.5
V
IIK
DC Input Diode Current
20
mA
IOK
DC Output Diode Current
20
mA
IOUT
DC Output Sink Current
12.5
mA
ICC
DC Supply Current per Supply Pin
25
mA
TSTG
Storage Temperature Range
65 to 150
C
TL
Lead Temperature, 1 mm from Case for 10 Seconds
260
C
TJ
Junction Temperature Under Bias
JA
Thermal Resistance
PD
Power Dissipation in Still Air at 85C
MSL
Moisture Sensitivity
FR
Flammability Rating
VESD
ESD Withstand Voltage
Human Body Model (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
2000
200
N/A
V
ILATCH–UP
Latch–Up Performance
Above VCC and Below GND at 125C (Note 5)
500
mA
150
C
SC70–5/SC–88A/SOT–353 (Note 1)
SOT23–5/TSOP–5/SC59–5
350
230
C/W
SC70–5/SC–88A/SOT–353
SOT23–5/TSOP–5/SC59–5
150
200
mW
Level 1
Oxygen Index: 28 to 34
UL 94 V–0 @ 0.125 in
Maximum Ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those
indicated may adversely affect device reliability. Functional operation under absolute–maximum–rated conditions is not implied. Functional
operation should be restricted to the Recommended Operating Conditions.
1. Measured with minimum pad spacing on an FR4 board, using 10 mm–by–1 inch, 20 ounce copper trace with no air flow.
2. Tested to EIA/JESD22–A114–A.
3. Tested to EIA/JESD22–A115–A.
4. Tested to JESD22–C101–A.
5. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
Min
Max
Unit
VCC
DC Supply Voltage
Parameter
2.0
6.0
V
VIN
DC Input Voltage
0.0
VCC
V
VOUT
DC Output Voltage
0.0
VCC
V
TA
Operating Temperature Range
55
125
C
tr , tf
Input Rise and Fall Time
0
0
0
0
1000
600
500
400
ns
VCC = 2.0 V
VCC = 3.0 V
VCC = 4.5 V
VCC = 6.0 V
117.8
90
419,300
47.9
100
178,700
20.4
110
79,600
9.4
120
37,000
4.2
130
17,800
2.0
140
8,900
1.0
TJ = 80C
1,032,200
TJ = 90C
80
TJ = 100C
Time, Years
TJ = 110C
Time, Hours
FAILURE RATE OF PLASTIC = CERAMIC
UNTIL INTERMETALLICS OCCUR
TJ = 120C
Junction
Temperature °C
NORMALIZED FAILURE RATE
DEVICE JUNCTION TEMPERATURE VERSUS
TIME TO 0.1% BOND FAILURES
TJ = 130C
Symbol
1
1
10
100
1000
TIME, YEARS
Figure 3. Failure Rate vs. Time Junction Temperature
http://onsemi.com
2
MC74HC1G08
DC ELECTRICAL CHARACTERISTICS
VCC
Symbol
Parameter
Test Conditions
(V)
Min
VIH
Minimum High–Level
Input Voltage
2.0
3.0
4.5
6.0
1.5
2.1
3.15
4.20
VIL
Maximum Low–Level
Input Voltage
2.0
3.0
4.5
6.0
VOH
Minimum High–Level
Output Voltage
VIN = VIH or VIL
VIN = VIH or VIL
IOH = –20 A
VIN = VIH or VIL
IOH = –2 mA
IOH = –2.6 mA
VOL
Maximum Low–Level
Output Voltage
VIN = VIH or VIL
VIN = VIH or VIL
IOL = 20 A
TA 85C
TA = 25C
Typ
Max
Min
55C TA 125C
Max
Min
1.5
2.1
3.15
4.20
0.5
0.9
1.35
1.80
Max
1.5
2.1
3.15
4.20
0.5
0.9
1.35
1.80
V
0.5
0.9
1.35
1.80
2.0
3.0
4.5
6.0
1.9
2.9
4.4
5.9
2.0
3.0
4.5
6.0
1.9
2.9
4.4
5.9
1.9
2.9
4.4
5.9
4.5
6.0
4.18
5.68
4.31
5.80
4.13
5.63
4.08
5.58
Unit
V
V
2.0
3.0
4.5
6.0
0.0
0.0
0.0
0.0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
VIN = VIH or VIL
IOL = 2 mA
IOL = 2.6 mA
4.5
6.0
0.17
0.18
0.26
0.26
0.33
0.33
0.40
0.40
V
IIN
Maximum Input
Leakage Current
VIN = 6.0 V or GND
6.0
0.1
1.0
1.0
A
ICC
Maximum Quiescent
Supply Current
VIN = VCC or GND
6.0
1.0
10
40
A
AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 6.0 ns)
ÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎ
ÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎ
ÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎÎ
ÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎÎ
ÎÎÎÎÎÎ
TA 85C
TA = 25C
Symbol
Parameter
Test Conditions
tPLH,
tPHL
Maximum
Propagation Delay
Delay,
Input A or B to Y
tTLH,
tTHL
Output Transition
Time
CIN
Maximum Input
Capacitance
CPD
Power Dissipation Capacitance (Note 6)
Min
Typ
Max
Min
55C TA 125C
Max
Min
Max
Unit
ns
VCC = 5.0 V
CL = 15 pF
3.5
15
20
25
VCC = 2.0 V
VCC = 3.0 V
VCC = 4.5 V
VCC = 6.0 V
CL = 50 pF
20
11
8
7
100
27
20
17
125
35
25
21
155
90
35
26
VCC = 5.0 V
CL = 15 pF
3
10
15
20
VCC = 2.0 V
VCC = 3.0 V
VCC = 4.5 V
VCC = 6.0 V
CL = 50 pF
25
16
11
9
125
35
25
21
155
45
31
26
200
60
38
32
5
10
10
10
ns
pF
Typical @ 25C, VCC = 5.0 V
10
pF
6. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no–load dynamic
power consumption; PD = CPD VCC2 fin + ICC VCC.
http://onsemi.com
3
MC74HC1G08
VCC
tr
tf
VCC
90%
50%
10%
INPUT
A or B
OUTPUT
INPUT
CL*
GND
tPHL
tPLH
90%
50%
10%
OUTPUT Y
tTLH
*Includes all probe and jig capacitance.
A 1–MHz square input wave is recommended for
propagation delay tests.
tTHL
Figure 4. Switching Waveforms
Figure 5. Test Circuit
DEVICE ORDERING INFORMATION
Device Nomenclature
Package
Suffix
Tape
and
Reel
Suffix
Package
Type
(Name/SOT#/
Common Name)
Tape and
Reel Size
08
DF
T1
SC70–5/SC–88A/
SOT–353
178 mm (7 in)
3000 Unit
HC1G
08
DF
T2
SC70–5/SC–88A/
SOT–353
178 mm (7 in)
3000 Unit
HC1G
08
DT
T1
SOT23–5/TSOP–5/
SC59–5
178 mm (7 in)
3000 Unit
Device Order
Number
Logic
Circuit
Indicator
Temp
Range
Identifier
Technology
Device
Function
MC74HC1G08DFT1
MC
74
HC1G
MC74HC1G08DFT2
MC
74
MC74HC1G08DTT1
MC
74
http://onsemi.com
4
MC74HC1G08
CAVITY
TAPE
TOP TAPE
TAPE TRAILER
(Connected to Reel Hub)
NO COMPONENTS
160 mm MIN
COMPONENTS
TAPE LEADER
NO COMPONENTS
400 mm MIN
DIRECTION OF FEED
Figure 6. Tape Ends for Finished Goods
TAPE DIMENSIONS mm
4.00
1.50 TYP
4.00
2.00
1.75
3.50 0.50
8.00 0.30
1.00 MIN
DIRECTION OF FEED
Figure 7. DFT1 Reel Configuration/Orientation
TAPE DIMENSIONS mm
4.00
1.50 TYP
4.00
2.00
1.75
3.50 0.50
8.00 0.30
1.00 MIN
DIRECTION OF FEED
Figure 8. DFT2/DTT1 Reel Configuration/Orientation
http://onsemi.com
5
MC74HC1G08
t MAX
1.5 mm MIN
(0.06 in)
A
13.0 mm 0.2 mm
(0.512 in 0.008 in)
50 mm MIN
(1.969 in)
20.2 mm MIN
(0.795 in)
FULL RADIUS
G
Figure 9. Reel Dimensions
REEL DIMENSIONS
Tape Size
T and R Suffix
A Max
G
t Max
8 mm
T1, T2
178 mm
(7 in)
8.4 mm, 1.5 mm, 0.0
(0.33 in 0.059 in, 0.00)
14.4 mm
(0.56 in)
DIRECTION OF FEED
BARCODE LABEL
POCKET
Figure 10. Reel Winding Direction
http://onsemi.com
6
HOLE
MC74HC1G08
PACKAGE DIMENSIONS
SC70–5/SC–88A/SOT–353
DF SUFFIX
5–LEAD PACKAGE
CASE 419A–01
ISSUE E
A
G
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
V
5
DIM
A
B
C
D
G
H
J
K
N
S
V
4
–B–
S
1
2
3
D 5 PL
0.2 (0.008)
M
B
M
N
INCHES
MIN
MAX
0.071
0.087
0.045
0.053
0.031
0.043
0.004
0.012
0.026 BSC
--0.004
0.004
0.010
0.004
0.012
0.008 REF
0.079
0.087
0.012
0.016
J
C
0.4 mm (min)
0.5 mm (min)
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
1.9 mm
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
http://onsemi.com
7
0.65 mm 0.65 mm
K
H
MILLIMETERS
MIN
MAX
1.80
2.20
1.15
1.35
0.80
1.10
0.10
0.30
0.65 BSC
--0.10
0.10
0.25
0.10
0.30
0.20 REF
2.00
2.20
0.30
0.40
MC74HC1G08
PACKAGE DIMENSIONS
SOT23–5/TSOP–5/SC59–5
DT SUFFIX
5–LEAD PACKAGE
CASE 483–01
ISSUE B
D
S
5
4
1
2
3
B
L
G
A
J
C
0.05 (0.002)
H
M
K
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
0.094
2.4
0.037
0.95
0.074
1.9
0.037
0.95
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE
MATERIAL.
DIM
A
B
C
D
G
H
J
K
L
M
S
MILLIMETERS
MIN
MAX
2.90
3.10
1.30
1.70
0.90
1.10
0.25
0.50
0.85
1.05
0.013
0.100
0.10
0.26
0.20
0.60
1.25
1.55
0
10 2.50
3.00
INCHES
MIN
MAX
0.1142 0.1220
0.0512 0.0669
0.0354 0.0433
0.0098 0.0197
0.0335 0.0413
0.0005 0.0040
0.0040 0.0102
0.0079 0.0236
0.0493 0.0610
0
10 0.0985 0.1181
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
0.039
1.0
0.028
0.7
inches
mm
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or
death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold
SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable
attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
Literature Fulfillment:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303–675–2175 or 800–344–3860 Toll Free USA/Canada
Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada
Email: [email protected]
JAPAN: ON Semiconductor, Japan Customer Focus Center
4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031
Phone: 81–3–5740–2700
Email: [email protected]
ON Semiconductor Website: http://onsemi.com
For additional information, please contact your local
Sales Representative.
N. American Technical Support: 800–282–9855 Toll Free USA/Canada
http://onsemi.com
8
MC74HC1G08/D